Commit graph

89042 commits

Author SHA1 Message Date
Rong Tao
ba4034a504 binman: Fix SyntaxWarning: invalid escape sequence '\('
Reproduct warning:

    $ git clean -dfx
    $ make CROSS_COMPILE="" qemu-x86_64_defconfig
    $ make -j8
    ...
    u-boot/tools/binman/etype/section.py:25:
    SyntaxWarning: invalid escape sequence '\('
    """Entry that contains other entries

Signed-off-by: Rong Tao <rongtao@cestc.cn>
2023-09-23 09:00:37 -06:00
Simon Glass
305114eb83 buildman: Fix full help for Python 3.8
With Python versions older than 3.9 Buildman produces an error on
start-up. Fix this with a workaround for importlib.

There is already a workaround for v3.6 but I am not sure if that is still
functioning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-23 09:00:37 -06:00
Maxim Cournoyer
8acdb70c10 tools: Fix patman launcher script.
There is no "run_patman" procedure in patman's __main__.py file, which
would cause the following error at execution:

  "AttributeError: module 'patman.__main__' has no attribute 'run_patman'"

Signed-off-by: Maxim Cournoyer <maxim.cournoyer@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-23 09:00:37 -06:00
Tom Rini
4cb31a9f35 Merge branch '2023-09-22-assorted-bugfixes'
- A few driver fixes and MAINTAINER updates
2023-09-22 18:25:37 -04:00
Kunihiko Hayashi
ff6156f030 MAINTAINERS: Step up as maintainers of UniPhier SoC platform
Update maintainers for UniPhier SoC platform.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2023-09-22 15:54:39 -04:00
Fabio Estevam
ee9245853e pico-imx7d: Remove Vanessa from MAINTAINERS
Vanessa's NXP e-mail is no longer active.

Contacted her offline and she told me that she does not have
access to the board anymore and it is OK to remove her
from MAINTAINERS.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-22 15:54:39 -04:00
Francois Berder
8cf61051ae drivers: mediatek: Fix error handling in mtk_i2c_do_transfer
Errors were handled only if an I2C transfer timed out
and received a NACK which is very unlikely. This commit
changes the condition such that errors are handled if
an I2C transfer times out or received a NACK.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-09-22 15:54:39 -04:00
Ryosuke Saito
c5b42e3e9e net: sni_netsec: Add workaround for timeout error
The NETSEC GMAC occasionally falls into a weird state where
MAC_REG_DESC_SOFT_RST has never been cleared and shows errors like the
below when networking commands are issued:

    => ping 192.168.1.1
    ethernet@522d0000 Waiting for PHY auto negotiation to complete... done
    netsec_wait_while_busy: timeout
    Using ethernet@522d0000 device

    ARP Retry count exceeded; starting again
    ping failed; host 192.168.1.1 is not alive

It happens on not only 'ping' but also 'dhcp', 'tftp' and so on.

Luckily, restarting the NETSEC GMAC and trying again seems to fix the
problematic state. So first ensure that we haven't entered the state by
checking MAC_REG_DESC_SOFT_RST to be cleared; otherwise, restarting
NETSEC/PHY and trying again would work as a workaround.

Signed-off-by: Ryosuke Saito <ryosuke.saito@linaro.org>
Tested-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2023-09-22 15:54:35 -04:00
Ravi Gunasekaran
65adf86f1a configs: am65x_evm_r5_usbmsc_defconfig: Enable DWC3 wrapper for SPL
commit 280f45d239 ("configs: get rid of build warnings due to
SPL_USB_DWC3_GENERIC") missed enabling DWC3 glue layer for
usbmsc_defconfig and this broke boot from USB mass storage.
Fix this by enabling DWC3 glue layer.

Fixes: 280f45d239 ("configs: get rid of build warnings due to SPL_USB_DWC3_GENERIC")
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
2023-09-22 13:58:51 -04:00
Richard Weinberger
a8bd5ec000 net: wget: Avoid packet queue overflow
Make sure to stay within bounds, as a misbehaving HTTP server
can trigger a buffer overflow if not properly handled.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2023-09-22 13:58:51 -04:00
Tom Rini
b05a184379 - Add bootstd support to 64-bit efi payload
- Fix a bug of missing setting size of initrd in pxeboot
 - Allow Python packages to be dropped
 - Reland "x86: Move FACP table into separate functions"
 - Fixes for chromebook_link64 and chromebook_samus_tpl
 - Fixes and improvements for coreboot
 - x86 documentation updates
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Merge tag 'x86-pull-20230922' of https://source.denx.de/u-boot/custodians/u-boot-x86 into next

- Add bootstd support to 64-bit efi payload
- Fix a bug of missing setting size of initrd in pxeboot
- Allow Python packages to be dropped
- Reland "x86: Move FACP table into separate functions"
- Fixes for chromebook_link64 and chromebook_samus_tpl
- Fixes and improvements for coreboot
- x86 documentation updates
2023-09-22 11:16:22 -04:00
Simon Glass
5728246dfa x86: doc: coreboot: Mention 64-bit Linux distros
Add a little more detail as to why coreboot64 is preferred for booting
Linux distros.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
ad57b98e21 x86: doc: Split out manual booting into its own file
Move this out of the main file since for simple users it is easier to
rely on standard boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
f0733d26a5 x86: doc: Update summaries and add links
Refresh the summary information so it is more up-to-date. Add links to
the coreboot and slimbootloader docs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
0cdf6a778e x86: doc: Move into its own directory
There is enough material that it makes sense to split this up into
several files. Create an x86/ directory for this purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
9354330935 x86: coreboot: Record the position of the SMBIOS tables
Make a note of where coreboot installed the SMBIOS tables so that we can
pass this on to EFI.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
53fab13a7b efi: Use the installed SMBIOS tables
U-Boot should set up the SMBIOS tables during startup, as it does on x86.
Ensure that it does this correctly on non-x86 machines too, by creating
an event spy for last-stage init.

Tidy up the installation-condition code while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
50834884a8 Record the position of the SMBIOS tables
Remember where these end up so that we can pass this information on to
the EFI layer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
1b1d36ec58 bootstd: Keep track of use of usb stop
When 'usb stop' is run, doing 'bootflow scan' does not run the USB hunter
again so does not see any devices. Fix this by telling bootstd about the
state of USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-22 06:05:40 +08:00
Simon Glass
8c11d19e75 x86: smbios: Add a Kconfig indicating SMBIOS-table presence
When booted from coreboot, U-Boot does not build the SMBIOS tables, but
it should still pass them on to the OS. Add a new option which indicates
whether SMBIOS tables are present, however they were built.

Flip the ordering so that the dependency is listed first, which is less
confusing.

Adjust GENERATE_SMBIOS_TABLE to depend on this new symbol.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
53e8e6f986 efi: x86: Correct the condition for installing ACPI tables
It is not always the case that U-Boot builds the ACPI tables itself. For
example, when booting from coreboot, the ACPI tables are built by
coreboot.

Correct the Makefile condition so that U-Boot can pass on tables built
by a previous firmware stage.

Tidy up the installation-condition code while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
3fef0def84 x86: coreboot: Enable VIDEO_COPY
At least on modern machines the write-back mechanism for the frame buffer
is quite slow when scrolling, since it must read the entire frame buffer
and write it back.

Enable the VIDEO_COPY feature to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
85c35c794e x86: coreboot: Align options between coreboot and coreboot64
These two builds are similar but have some different options for not good
reason. Line them up to be as similar as possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
9a1447d85e x86: coreboot: Drop USB init on startup
This is very annoying as it is quite slow on many machines. Also, U-Boot
has an existing 'preboot' mechanism to enable this feature if desired.

Drop this code so that it is possible to choose whether to init USB or
not.

Use the existing USE_PREBOOT mechanism instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
028d1f8dc2 x86: coreboot: Enable CONFIG_SYS_NS16550_MEM32
The debug UART on modern machines uses a 32-bit wide transfer. Without
this, setting debug output causes a hang or no output. It is not obvious
(when enabling CONFIG_DEBUG_UART) that this is needed.

Enable 32-bit access to avoid this trap.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
b1350636e6 x86: coreboot: Look for DBG2 UART in SPL too
If coreboot does not set up sysinfo for the UART, SPL currently hangs.
Use the DBG2 technique there as well. This allows coreboot64 to boot from
coreboot even if the console info is missing from sysinfo

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
0c45c76ced x86: Allow APCI in SPL
This is needed so we can find the DBG2 table provided by coreboot. Add a
Kconfig so it can be enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
8ebca32b2d x86: Set the CPU vendor in SPL
We don't read this information in 64-bit mode, since we don't have the
macros for doing it. Set it to Intel by default. This allows the TSC timer
to work correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
2c6b979ec1 x86: coreboot: Rearrange arch_cpu_init()
Init errors in SPL are currently ignored by this function.

Change the code to init the CPU, reporting an error if something is wrong.
After that, look for the coreboot table.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
04ecda0e1d x86: coreboot: Enable standard boot
Enable bootstd options and provide instructions on how to boot a linux
distro using coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
350c0df30d x86: coreboot: Add IDE and SATA
Add these options to permit access to more disk types.

Add some documentation as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
fb5cfbe17d x86: Update cbmem driver
This driver is not actually built since a Kconfig was never created for
it.

Add a Kconfig (which is already implied by COREBOOT) and update the
implementation to avoid using unnecessary memory. Drop the #ifdef at the
top since we can rely on Kconfig to get that right.

To enable it (in addition to serial and video), use:

   setenv stdout serial,vidconsole,cbmem

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Modified the comment about overflow a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
7739b2793b x86: coreboot: Document cbmem console struct
Coreboot changed a few years ago to include an overflow flag. Update the
structure to match this.

This comes from coreboot commit:

   6f5ead14b4 ("mb/google/nissa/var/joxer: Update eMMC DLL settings")

Note: There are several implementations of this in coreboot. I have chosen
to follow the one in src/lib/cbmem_console.c

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
35307ba776 x86: doc: Update the list of supported Chromebooks
One is missing, so add it. Also mention the SoC used in each.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
6acc072365 x86: dm: Mark driver model as dead when disabling CAR
When turning off CAR, set the flag to make sure that nothing tries to use
driver model in SPL before jumping to U-Bot proper, since its tables are
in CAR.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
cd1ee5d96e x86: broadwell: Set up MTRRs
The current condition does not handle the samus_tpl case where it sets
up the RAM in SPL but needs to commit the MTRRs in U-Boot proper.

Add another case to handle this and update the comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
3ca9b86e23 x86: broadwell: Avoid initing the CPU twice
When TPL has already set up the CPU, don't do it again. This existing
code actually has this backwards, so fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
623b3e8f97 x86: spl: Change the condition for copying U-Boot to RAM
Make this depend on whether the address matches the offset, rather than
a particular board build. For samus_tpl we don't need to copy, for
example.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
9d69324e7f x86: samus_tpl: Correct text base and alloc sizes
Make sure that CONFIG_X86_OFFSET_U_BOOT is the same as CONFIG_TEXT_BASE
as it is changing CONFIG_X86_OFFSET_U_BOOT

Samus boots into U-Boot proper in flash, not RAM. Also expand the SPL
malloc() size a little, to avoid an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
02de9199bc x86: Add some log categories
Add some missing log categories to a few files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
8e34ddc113 x86: broadwell: Show the memory delay
Samus only takes 7 seconds but it is long enough to think it has hung. Add
a message about what it is doing, similar to the approach on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
15a23b6f16 dm: core: Allow marking driver model as dead
On x86 devices we use CAR (Cache-As-RAM) to hold the malloc() region in
SPL, since SDRAM is not set up yet. This means that driver model stores
its tables in this region.

When preparing to jump from SPL to U-Boot proper, we must disable CAR, so
that the CPU can uses the caches normally. This means that driver model
tables become inaccessible. From there until we jump to U-Boot proper, we
must avoid using driver model.

This is only a problem on boards which operate this way, for example
chromebook_link64

Add a flag to indicate that driver model is dead and should not be used.
It can be used in SPL to avoid hanging the machine.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
9804e572cf x86: doc: Document the -cdrom issues I ran into
Add a note about using -cdrom with QEMU.

Suggested-by: Bin Meng <bmeng@tinylab.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
2023-09-22 06:03:46 +08:00
Andy Shevchenko
b95bc64b06 x86: Prevent from missing the FADT chaining
Recent approach with FADT writer shows that there is
a room for subtle errors. Prevent this from happening
again by introducing acpi_add_fadt() helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
2e977b2ce8 Reland "x86: Move FACP table into separate functions""
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.

Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-09-22 06:03:46 +08:00
Simon Glass
0879de0e8b x86: coreboot: Avoid a declaration after a label
Declare the global_data pointer at the top of the file, to avoid an
error:

   arch/x86/include/asm/global_data.h:143:35: error: a label can
      only be part of a statement and a declaration is not a statement
   board/coreboot/coreboot/coreboot.c:60:2: note: in expansion of macro
      ‘DECLARE_GLOBAL_DATA_PTR’

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
48bf738e36 Allow Python packages to be dropped
When building in a portage chroot, we do not have the environment needed
to build pylibfdt. It is instead build as a separate package.

Provide a build option to tell U-Boot to skip this part of the build. We
still need it to use binman, etc. but don't need it to build its
dependencies.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
[s/build bytes/builds bytes in tools.rst]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Thomas Mittelstaedt
1a075d4e0d x86: pxeboot: bugfix: Set variable for size of initrd
The problem was, that zboot() didn't work because of missing
ramdisc size.

Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@de.bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-22 06:03:46 +08:00
Thomas Mittelstaedt
fde0df92b5 x86: efi-payload64: Add bootstd support
Enable bootstd support for U-Boot at VirtualBox described at
https://source.denx.de/u-boot/u-boot/-/blob/master/doc/develop/bootstd.rst

This is used to boot system images at Virtualbox via
- distroboot (extlinux.conf)
- boot script

Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Added 'efi-payload64' tag]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Thomas Mittelstaedt
c323921ba9 x86: efi-payload64: Add support for SCSI devices
U-Boot at VirtualBox must load Linux and boot configuration from disk devices.
Here the discs at AHCI (scsi) bus are used to load the needed boot data.

Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@de.bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Added 'efi-payload64' tag and rebased on top of u-boot/master]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00