Commit graph

63 commits

Author SHA1 Message Date
Kim Phillips
b211575740 mpc83xx: bump loadaddr over fdtaddr to 0x500000
this seems as a good compromise between human memory, typing,
and last but not least, to accommodate for current and future kernel bloat.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
2008-04-25 10:54:06 -05:00
Michael Barkowski
5b2793a3f3 mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.

It also makes the board take MAC addresses, if found, from EEPROM.

User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr.  Any unused addresses should be zero.  This group of
four six-byte values should have it's CRC at the end.  crc32 and
eeprom commands can be used to accomplish this.

If CRC fails, MAC addresses come from the environment.  If CRC
succeeds, the environment is overwritten at startup.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:02:27 -05:00
Michael Barkowski
8f325cff31 mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE
Commit 55774b512f broke the onboard USB
controller on the PCI bus in Linux on the MPC8323ERDB.

This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
config file.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:02:27 -05:00
Michael Barkowski
0fa7a1b471 mpc8323erdb: remove RTC and add EEPROM
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:44 -05:00
Michael Barkowski
5bbeea86eb mpc8323erdb: Improve the system performance
The following changes are based on kernel UCC ethernet performance:

1.  Make the CSB bus pipeline depth as 4, and enable the repeat mode
2.  Optimize transactions between QE and CSB.  Added CFG_SPCR_OPT
    switch to enable this setting.

The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:

3.  CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4.  CS0_CONFIG[ODT_WR_CONFIG] set to 1.  Was a reserved setting
    previously.
5.  TIMING_CFG_1[WRREC] is changed from 3clks to 2clks  (based on
    Twr=15ns, and this was already the setting in DDR_MODE)
6.  TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
    Trp=15ns)
7.  TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
    Tras=40ns)
8.  TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
    Trcd=15ns)
9.  TIMING_CFG_1[REFREC] changed from 21 clks to 11clks.  (based on
    Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks.  (based
    on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
    on CL=3 and WL=2).

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:44 -05:00
Michael Barkowski
fc549c871f mpc8323erdb: use readable DDR config macros
Use available shift/mask macros to define DDR configuration.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:43 -05:00
Timur Tabi
73bf1e2de7 Remove #undef DEBUG from MPC83xx board header files
Remove the "#undef DEBUG" line from all Freescale 83xx board header files.
The inclusion of this line makes it impossible to enable debug code in
other source files, because "#define DEBUG" typically needs to be defined
before any header files are included.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-02-12 00:39:45 +01:00
Kim Phillips
711a794627 mpc83xx: fix QE ETHPRIMEs to correct 'FSL UEC0' value
continuation of commit b96c83d4ae

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-16 12:00:50 -06:00
Dave Liu
2c5b48fc20 mpc83xx: Remove cache config from config.h
clean up the cache config from configs.h of board

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-10 21:06:32 -06:00
Kim Phillips
977b57583a mpc83xx: add missing CONFIG_HAS_ETH0 defines
the new libfdt code only updates eth0 if CONFIG_HAS_ETH0
is defined; add the define to the missing board configs.

Thanks to Emilian Medve for finding this.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-10 20:52:38 -06:00
Kim Phillips
5b8bc606c6 mpc83xx: convert to using do_fixup_*()
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:56:42 -06:00
Timur Tabi
b2893e1fcb 83xx: fix CFG_ENV_ADDR and CFG_ENV_SECT_SIZE definitions
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the
currently-defined 83xx boards.  This change guarantees that the environment
will be located on the first flash sector after the U-Boot image.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-08 09:55:39 -06:00
Kim Phillips
1c274c4e05 mpc83xx: add support for the MPC8323E RDB
MPC8323E based board with 64MB fixed SDRAM, 16MB flash,
five 10/100 ethernet ports connected via an ICPlus IP175C
switch, one PCI slot, and serial.  Features not supported
in this patch are SD card interface, 2 USB ports, and the
two phone ports.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-10 01:12:25 -05:00