ll_temac driver was used by Xilinx Microblaze big endian and
Xilinx ppc405/ppc440 SoCs.
ppc support was removed by: "powerpc: remove 4xx support"
(sha1: 98f705c9ce)
and Microblaze BE is not tested for a long time that's why this driver
can be removed because none is going to updated it to DM anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Drop the whole map/unmap_physmem stuff and just use the address
already obtained from DT in ofdata_to_platdata(), instead of
repeating that, wrongly, in probe.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Fix minor checkpatch warning about udelay(3000) being too long
and should be replaced by mdelay(3).
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Drop the len variable, it's useless.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Inline this variable which is quite useless.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Reset and initialize the PHY once in the probe() function rather than
doing it over and over again is start() function. This requires us to
keep the clock enabled while the driver is in use. This significantly
reduces the time between transfers as the PHY doesn't have to restart
autonegotiation between transfers, which takes forever.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
There is no value to enable phylib without networking support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Implement programming MAC address to the hardware, i.e. external flash
seen as EEPROM.
MAC address is only written if it differs from what is already stored in
flash or if reading the current MAC address fails.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.
This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Port functions for writing to EEPROM, updating the checksum and
committing data to flash from the Linux kernel igb driver.
Functions were ported from Linux 4.8-rc2 (694d0d0bb20).
Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
For for case of lazyapply method, API fdt_fixup_board_enet() gets
invoked before DPL being deployed. This leads to an issue that
fsl-mc fdt fixup status marked as fail and dprc driver didn't get
registered in linux boot.
Fixes this issue by calling fdt_fixup_board_enet() for case when
DPL is deployed successfully in lazyapply method.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
When we have a driver that is used on both 32bit and 64bit targets and
we are talking about address space we cannot use u64 nor u32 and instead
need to use phys_addr_t.
Fixes: 377883f16d ("net: mvpp2x: fix phy connected to wrong mdio issue")
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
The GMAC in the RK3228 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.
This adds the RK3368-specific logic necessary to reuse this driver.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The GMAC2IO in the RK3328 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.
This adds the RK3328-specific logic necessary to reuse this driver.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The rv1108 GMAC only support rmii interface, so need to add the
set_rmii() ops. Use the phy current interface to set rmii or
rgmii ops. At the same time, need to set the mac clock rate of
rmii with 50M, the clock rate of rgmii with 125M.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add DM capable code into the SH ethernet driver and support probing
both from DT and pdata. The legacy non-DM, non-DT support is retained
as there are still systems in the tree which are not DM or DT capable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Move the legacy functions around, so that they can be wrapped in a
massive ifdef CONFIG_DM_ETH once DM support is added. No functional
change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Split sh_eth_init() function into smaller chunks, which can
be called from both DM and non-DM code while handling the
specifics of both configurations.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Pull out the code for writing MAC address into the NIC into a
separate function, so it can be reused by both DM and non-DM
code. This is done in preparation for DM support, which handles
MAC address programming separately.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Split sh_eth_recv into two functions, one which checks whether
a packet was received and one which handles the received packet.
This is done in preparation for DM support, which handles these
two parts separately.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Pass sh_eth_dev structure around instead of eth_device, since the
later is specific to the legacy networking support. This change is
done in preparation for the DM addition.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
wait_for_bit callers use the 32 bit LE version
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
When we using network on board using sh-eth, it prints a lot of
"CACHE: Misaligned operation at range" messages.
This commit fixes this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This changes Change structure used in sh_eth_read and sh_eth_write function
from struct sh_eth_dev to struct sh_eth_info. This is necessary to convert
to Driver Model.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
bd_t is not used in sh_eth_config(). This deletes bd_t from sh_eth_config()
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This fixes the chord style checked by checkpatch.pl.
Details of change details are as follows:
- Fix typo
Change from alligned to aligned.
- Remove whitespace before ','
- Add spaces preferred around that '|'
- Fix missing a blank line after declarations
- Remove space after a cast declaration
- Fix format of block comments
- Add a blank line after function/struct/union/enum declarations
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add a b53_reg read/write command which allows inspecting the switch
registers. Because the Broadcom BCM53xx registers have different sizes,
we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain
expected results.
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Make sure that we pad small packets to a minimum length of 60 bytes
(without FCS). This is necessary to interface with Ethernet switches
that will reject RUNT frames unless padded correctly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar
to the Marvell MV88E617x. This takes care of configuring the minimum
amount out of the switch hardware such that each user visible port
(configurable) and the CPU port can forward packets between each other
while preserving isolation with other ports.
This is useful for e.g: the Lamobo R1 board featuring a Broadcom
BCM53125 switch.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This implementation manages several clocks, disable and
free all of them in case of error during probe and in remove
callback.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch fixes a problem in the mvneta driver where if more than
one packet arrives between calls to mvneta_recv(), the additional
descriptors will be marked as free even though only one descriptor
has been read and processed from the receive queue. This causes
the additional packet(s) to be delayed until the next packet arrives.
>From this point on all packets will be delayed because the receive
queue will contain unprocessed packets but the hardware shows no
busy descriptors.
Signed-off-by: Jason Brown <jason.brown@apcon.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Since the return value is a signed int, if the leading MSB of rdreg is a 1,
it will get signed extended and will return a negative value which is an
error even though we read the correct value.
Fixes: dfcc496ed7 ("net: mii: Changes not made by spatch")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
First, this table could never be included in the build anyway because
SH_ETH_TYPE_RZ is not defined until later in the file.
Second, the register PIR was missing, so PHY MDIO never worked.
Third, after adding the PIR register, the table is EXACTLY the same as
sh_eth_offset_gigabit, so there is no value to it.
Therefore, just delete it use the gigabit one.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The macros inl and outl maybe already be defined from file
arch/arm/include/asm/io.h so there may be no reason to define them.
And if you do try defined them here, you get a redefined complier warning.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit allows extended Marvell registers to be read with:
foo > mdio rx FEC 3.10
Reading from bus FEC
PHY at address 0:
3.16 - 0x1063
foo > mdio wx FEC 3.10 0x1011
The above code changes the way ETH connector LEDs blink.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Although Xilinx Zynq SoC was using MACB similar hardware. However,
U-boot MACB driver was not supporting Xilinx Zynq SoC. This patch is
to add support for the Xilinx Zynq SoC to the existing MACB network
driver.
This patch is to add Zynq GEM DMA Config, provide callback
function for different linkspeed for case of using Xilinx Zynq
Programmable Logic as GMII to RGMII converter.
This patch convert the return value to use error codes.
Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The CONFIG_SYS_DPAA_QBMAN define is used by DPAA1 freescale SOCs to
add device tree fixups that allow deep sleep in Linux. The define was
placed in header files included by a number of boards, but was not
explicitly documented in any of the Kconfigs. A description was added
to the drivers/networking menuconfig and default selection for
current SOCs that have this part
Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Until now, Armada 3700 SoCs could not enable the mvneta driver, and thus
did not benefit from Ethernet support. Add ARMADA_3700 in the
"depends on" list of the MVNETA Kconfig entry.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
