Commit graph

1454 commits

Author SHA1 Message Date
Martin Krause
341cc69d23 Merge branch 'u-boot' of /home/mkr/git/u-boot-tq-group into bugfix 2007-10-23 08:30:06 +02:00
Wolfgang Denk
27d2b1ed21 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2007-10-18 22:02:35 +02:00
Tony Li
d2646554f5 mpc83xx: pq-mds-pib.c typo error
Correct to val8 from val.

Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-10-18 10:05:34 -05:00
Stefan Roese
3e11ae80fe ppc4xx: Add 667/133 (CPU/PLB) frequency setup to Sequoia bootstrap command
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-18 07:44:56 +02:00
Stefan Roese
e2e93442e5 ppc4xx: Fix bug in I2C bootstrap values for Sequoia/Rainier
The I2C bootstrap values that can be setup via the "bootstrap" command,
were setup incorrect regarding the generation of the internal sync PCI
clock. The values for PLB clock == 133MHz were slighly incorrect and the
values for PLB clock == 166MHz were totally incorrect. This could
lead to a hangup upon booting while PCI configuration scan.

This patch fixes this issue and configures valid PCI divisor values
for the sync PCI clock, with respect to the provided external async
PCI frequency.

Here the values of the formula in the chapter 14.2 "PCI clocking"
from the 440EPx users manual:

AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz

33MHz async PCI frequency:
PLB = 133:
=>      32 <= 44.3 <= 65        (div = 3)

PLB = 166:
=>      32 <= 55.3 <= 65        (div = 3)

66MHz async PCI frequency:
PLB = 133:
=>      65 <= 66.5 <= 132       (div = 2)

PLB = 166:
=>      65 <= 83 <= 132         (div = 2)

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-15 11:39:00 +02:00
Stefan Roese
5a5958b7de ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite
The BCSR status bit for the 66MHz PCI operation was correctly
addressed (MSB/LSB problem). Now the correct currently setup
PCI frequency is displayed upon bootup.

This patch also fixes this problem on Rainier & Yellowstone, since these
boards use the same souce code as Sequoia & Yosemite do.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-15 11:29:33 +02:00
Jens Gehrlein
9d29250e2e TQM8xx: Fix CAN timing.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-10-15 09:46:55 +02:00
Wolfgang Denk
fc19e36f74 Fix warning differ in signedness in board/mpl/vcma9/vcma9.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-10-13 23:51:14 +02:00
Wolfgang Denk
b005838132 Merge branch 'master' of git://www.denx.de/git/u-boot-avr32 2007-10-13 23:01:27 +02:00
Wolfgang Denk
2885634d64 Merge branch 'master' of git://www.denx.de/git/u-boot-arm 2007-10-13 18:48:23 +02:00
Haavard Skinnemoen
7b624ad254 AVR32: Initialize bi_flash* in board_init_r
The ATSTK1000-specific flash driver intializes bi_flashstart,
bi_flashsize and bi_flashoffset, but other flash drivers, like the CFI
driver, don't.

Initialize these in board_init_r instead so that things will still be
set up correctly when we switch to the CFI driver.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-10-06 20:17:37 +02:00
Bartlomiej Sieka
92869195ef CM5200: Fix missing null-termination in hostname manipulation code
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2007-10-05 09:46:06 +02:00
Peter Pearse
e81a95a9e7 Merge with git://www.denx.de/git/u-boot.git 2007-10-04 11:00:44 +01:00
Stefan Roese
738815c0cc ppc4xx: Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-02 11:44:46 +02:00
Grzegorz Bernacki
2db6478406 Program EPLD to force full duplex mode for PHY.
EPLD forces modes of PHY operation. By default full duplex is turned off.
This fix turns it on.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-10-02 11:30:37 +02:00
Peter Pearse
afd477b227 Merge with git://www.denx.de/git/u-boot.git 2007-09-18 11:12:58 +01:00
Wolfgang Denk
67c31036ac TQM8xx[LM]: Fix broken environment alignment.
With recent toolchains, the environment sectors were no longer aligned to
sector boundaries. The reason was a combination of two bugs:

1) common/environment.c assumed that CONFIG_TQM8xxL would be defined
   for all TQM8xxL and TQM8xxM boards. But "include/common.h", where
   this gets defined, is not included here (and cannot be included
   without causing lots of problems).

   Added a new #define CFG_USE_PPCENV for all boards which really
   want to put the environment is a ".ppcenv" section.

2) The linker scripts just include environment.o, silently assuming
   that the objects in that file are really in the order in which
   they are coded in the C file, i. e. "environment" first, then
   "redundand_environment", and "env_size" last. However, current
   toolchains (GCC-4.x) reorder the objects, causing the environment
   data not to start on a flash sector boundary:

   Instead of:					we got:

	40008000 T environment			40008000 T env_size
	4000c000 T redundand_environment	40008004 T redundand_environment
	40010000 T env_size			4000c004 T environment

   Note: this patch fixes just the first part, and cures the alignment
   problem by making sure that "env_size" gets placed correctly. However,
   we still have a potential issue because primary and redundant
   environment sectors are actually swapped, i. e. we have now:

	40008000 T redundand_environment
	4000c000 T environment
	40010000 T env_size

   This shall be fixed in the next version.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-09-16 17:20:37 +02:00
Liew Tsi Chung-r5aahp
dcb8863029 ColdFire: fix build error becasue of bad type of mii_init()
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-09-15 21:04:27 +02:00
Liew Tsi Chung-r5aahp
314d5b6ce5 ColdFire: Fix build error caused by pixis.c
Moved the #include <asm/cache.h> inside the #ifdef CONFIG_FSL_PIXIS.

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-09-15 21:03:09 +02:00
Wolfgang Denk
1218abf1b5 Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as global
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-09-15 20:48:41 +02:00
Dirk Behme
66b3f24d66 Make DECLARE_GLOBAL_DATA_PTR global for DaVinci
As discussed in [1], DECLARE_GLOBAL_DATA_PTR has to be global and not
function local.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>

[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/31805
2007-09-15 18:46:20 +02:00
Bartlomiej Sieka
6e7b7b6ea1 cm5200: Fix a typo introduced by afaac86fe2
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2007-09-13 18:21:48 +02:00
Wolfgang Denk
f34024d4a3 Fix memory corruption problem on STX GP3 SSA Board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-09-12 00:48:57 +02:00
Peter Pearse
1fc11f736c Merge with git://www.denx.de/git/u-boot.git 2007-09-11 15:31:55 +01:00
Grzegorz Bernacki
38ad82da0c [GP3SSA] Add define CONFIG_MPC85XX_PCI2 in config file to allow u-boot to
scan on second pci bus.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-11 15:42:11 +02:00
Peter Pearse
7d54d64e9c Merge with git://www.denx.de/git/u-boot.git 2007-09-10 10:11:15 +01:00
Wolfgang Denk
87eb200ea8 Merge with /home/raj/git/u-boot#440SPe_PCIe_fixes 2007-09-08 20:52:57 +02:00
Wolfgang Denk
fd63d832cd Merge with /home/raj/git/u-boot#ads5121_fixes 2007-09-08 20:45:59 +02:00
Grzegorz Bernacki
6efc1fc0b6 [PPC440SPe] PCIe environment settings for Katmai and Yucca
- 'pciconfighost' is set by default in order to be able to scan bridges
behind the primary host/PCIe

- 'pciscandelay' env variable is recognized to allow for user-controlled
delay before the PCIe bus enumeration; some peripheral devices require a
significant delay before they can be scanned (e.g. LSI8408E); without the
delay they are not detected

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 18:35:37 +02:00
Grzegorz Bernacki
7f19139389 [PPC440SPe] Improve PCIe configuration space access
- correct configuration space mapping
- correct bus numbering
- better access to config space

Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2007-09-07 18:20:23 +02:00
Rafal Jaworowski
8d17979d03 [MPC512x] Correct fixup relocation
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-09-07 17:05:36 +02:00
Peter Pearse
470ffef72c Merge with git://www.denx.de/git/u-boot.git 2007-09-07 13:26:51 +01:00
Wolfgang Denk
a89cbbd27a Update CHANGELOG, minor coding style cleanup. 2007-09-07 01:21:25 +02:00
stefano babic
5e5803e119 PXA270: Added support for TrizepsIV board.
This patch add support for the Trizeps IV module (520Mhz).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2007-09-07 01:06:19 +02:00
Wolfgang Denk
3dd42fd5e2 Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xx 2007-09-07 00:15:04 +02:00
Wolfgang Denk
bf72a4ca9e Merge with /home/wd/git/u-boot/custodian/u-boot-mpc5xxx 2007-09-07 00:13:11 +02:00
Grant Likely
cf2817a84c Migrate 5xxx boards from CONFIG_OF_FLAT_TREE to CONFIG_OF_LIBFDT
Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200

Tested on: lite5200b

Note: the fixup functions have not been moved to a common place.  This
patch is targeted for immediate merging as in solves a build issue, but
the final name/location of the fixups is still subject to debate.  I
propose to merge this now, and move the fixups in the next merge window
to be usable by all targets.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-09-06 09:46:23 -06:00
Peter Pearse
80767a6cea Changed API name to coloured_led.h
Removed code using deprecated ifdef CONFIG_BOOTBINFUNC
Tidied other cpu/arm920t/start.S code
2007-09-05 16:04:41 +01:00
Kumar Gala
56a9270521 Fix ULI RTC support on MPC8544 DS
The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC.  We accomplish this by adding a
second memory region to the PHB the ULI is on and read from it.

The second region is added to maintain compatiabilty with Linux's
view of the PCI memory map.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-04 16:00:48 -05:00
Ed Swarthout
f75e89e9b5 ft_board_setup update 85xx/86xx of pci/pcie bus-range property.
pcie is now differentiated from pci.  Add 8641 bus-range updates.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2007-09-04 16:00:41 -05:00
Peter Pearse
9f5c3d3720 Add coloured led interface for ARM boards.
Use it in cpu/arm920t/start.S to indicate U-Boot code has been entered.
2007-09-04 16:18:38 +01:00
Peter Pearse
7462fe0d5a Move include/led.h to board/at91rm9200dk 2007-09-04 14:49:28 +01:00
Stefan Roese
1d1ab638f8 Merge with git://www.denx.de/git/u-boot.git 2007-09-02 14:02:19 +02:00
Gary Jennejohn
81b73dec16 ppc4xx: (Re-)Enable CONFIG_PCI_PNP on AMCC 440EPx Sequoia
The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
set to non-zero, because it doesn't support MRM (memory-read-
multiple) correctly. We now added the possibility to configure
this register in the board config file, so that the default value
of 8 can be overridden.

Here the details of this patch:

o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
  board-specific settings. As an example the sequoia board requires 0.
  Idea from Stefan Roese <sr@denx.de>.
o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
  PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
  CFG_PCI_CACHE_LINE_SIZE to 0.

Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-31 15:21:46 +02:00
Ed Swarthout
4bf4abb8a4 8548cds fixes
Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the
correct consoledev needed for linux boot.
Standardize on fdt{file,addr} var to hold dtb file name.

Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2007-08-29 00:11:59 -05:00
Jason Jin
94c47fdaf1 Remove the bios emulator binary files from MAI board
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2007-08-29 02:18:13 +02:00
Kim Phillips
7608d75f9c support board vendor-common makefiles
if a board/$(VENDOR)/common/Makefile exists, build it.

also add the first such case, board/freescale/common/Makefile, to
handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as
dictated by board configuration.

thusly get rid of alternate build dir errors such as:

FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory

by putting the common/ mkdir command in its proper place (the common
Makefile). Common bits from existing individual board Makefiles have
been removed.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-29 02:15:46 +02:00
Dirk Behme
9bb8b209ed Fix compilation error for omap2420h4_config.
omap2420h4 switched to cfi, so remove old (already disabled) flash.c
and flash_probe() calls in env_flash.c.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
2007-08-29 02:01:47 +02:00
Wolfgang Denk
20640002e6 Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx 2007-08-29 00:53:51 +02:00
Heiko Schocher
f98984cb19 IDE: - make ide_inb () and ide_outb () "weak", so boards can
define there own I/O functions.
          (Needed for the pcs440ep board).
        - The default I/O Functions are again 8 Bit accesses.
        - Added CONFIG_CMD_IDE for the pcs440ep Board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-08-28 17:39:14 +02:00