Commit graph

65485 commits

Author SHA1 Message Date
Madalin Bucur
3374264df9 drivers: net: qe: deselect QE when DM_ETH is enabled
A compilation error appears when QE is compiled with DM_ETH
enabled:

drivers/qe/uec.c: In function 'init_phy':
drivers/qe/uec.c:425:28: error: dereferencing pointer to incomplete type 'struct eth_device'
  uec = (uec_private_t *)dev->priv;
                            ^~
drivers/qe/uec.c: In function 'uec_initialize':
drivers/qe/uec.c:1357:43: error: invalid application of 'sizeof' to incomplete type 'struct eth_device'
  dev = (struct eth_device *)malloc(sizeof(struct eth_device));
                                           ^~~~~~

The patch disables CONFIG_QE when CONFIG_DM_ETH is set.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03 12:14:27 +05:30
Madalin Bucur
03fe5d5116 powerpc: mpc85xx: fix unused variable warning
Fix unused variable warning when CONFIG_QE is not set.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03 12:14:27 +05:30
Madalin Bucur
9e998d5dc1 powerpc/mpc85xx: Fix compiling error with DM_GPIO
P4080DS compilation fails with DM_GPIO enabled:

drivers/gpio/gpio-uclass.c:355:5: error: redefinition of 'gpio_request'
 int gpio_request(unsigned gpio, const char *label)
     ^~~~~~~~~~~~
In file included from ./arch/powerpc/include/asm/arch/gpio.h:17:0,
                 from ./arch/powerpc/include/asm/gpio.h:1,
                 from drivers/gpio/gpio-uclass.c:16:
./arch/powerpc/include/asm/mpc85xx_gpio.h:68:19: note: previous definition of 'gpio_request' was here
 static inline int gpio_request(unsigned gpio, const char *label)
                   ^~~~~~~~~~~~

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03 12:14:27 +05:30
Madalin Bucur
94472223c6 drivers: net: e1000: with DM_ETH needs DM_PCI too
Compilation error occur when DM_ETH is enabled without DM_PCI.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-06-03 12:14:27 +05:30
Tom Rini
ecd4d99f65 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Corrected some FSP-M/FSP-S settings for Chromebook Coral
- ICH SPI driver and mrccache fixes for obtaining the SPI memory map
- Fixed various warnings generated by latest version IASL when compiling
  ACPI tables
2020-06-01 23:34:18 -04:00
Bin Meng
95cfa1d46c x86: quark: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former. This fixes the following warning
reported by ACPICA 20200430:

  Warning 3073 - Multiple types (Device object requires either a _HID
  or _ADR, but not both)

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02 09:16:13 +08:00
Bin Meng
d8b5f5d436 x86: baytrail: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former. This fixes the following warning
reported by ACPICA 20200430:

  Warning 3073 - Multiple types (Device object requires either a _HID
  or _ADR, but not both)

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02 09:16:13 +08:00
Bin Meng
319506c7a9 x86: baytrail: acpi: Create buffers outside of the methods
Create buffers outside of the methods as ACPICA 20200430 complains
about this:

  Remark 2173 - Creation of named objects within a method is highly
  inefficient, use globals or method local variables instead
  (\_SB.PCI0.LPCB.IURT._CRS)

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02 09:16:13 +08:00
Andy Shevchenko
b9ce32ec3a x86: tangier: acpi: Drop _HID() where enumerated by _ADR()
ACPICA complains that either _HID() or _ADR() should be used.
For General Purpose DMA we may not drop the _ADR() because
the device is enumerated by PCI. Thus, simple drop _HID().

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Andy Shevchenko
10a428ed15 x86: tangier: acpi: Drop _ADR() where _HID() is present
ACPICA complains that either _HID() or _ADR() should be used.
Drop _ADR() where _HID() is present.

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Andy Shevchenko
55f54538f8 x86: tangier: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former.

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Andy Shevchenko
d8177a94ca x86: tangier: acpi: Create buffers outside of the methods
Create buffers outside of the methods as ACPICA 20200214 complains about this:

	Remark 2173 - Creation of named objects within a method is
	highly inefficient, use globals or method local variables
	instead

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
b523c174d6 x86: minnowmax: Add support for Winbond flash
This allows the use of the Dediprog em100pro so I can test SPI flash on
this board in my lab.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
4711c1f548 x86: apl: Add hex offsets for registers in FSP-S
When comparing hex dumps it is useful to see the offsets of the registers.
Add them in where they correspond to a multiple of 16.

Possibly it would be useful to have a a command to output the FSP values
in human-readable form, making use of the fsp_bindings implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
501ba58ae6 x86: coral: Correct some FSP-S settings
Some settings were modified slightly in the device-tree conversion. Return
these to their original values. This includes some audio settings and a
few others that have changed.

Note that we still rely on the FSP defaults for most values, so there is
no need to specify a value if the FSP default is suitable.

This makes WiFi work again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
6e5ac59ec3 x86: apl: Add hex offsets for registers in FSP-M
When comparing hex dumps it is useful to see the offsets of the registers.
Add them in where they correspond to a multiple of 16.

Possibly it would be useful to have a a command to output the FSP values
in human-readable form, making use of the fsp_bindings implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
537558b226 x86: coral: Correct some FSP-M settings
Some settings were modified slightly in the device-tree conversion. Return
these to their original values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
70c3c911cc x86: mrccache: Allow use before driver model is active
The change to avoid searching the device tree does not work on boards
wich don't have driver model set up this early, for example minnowmax.
Put back the old code (converted to livetree) as a fallback for these
devices. Also update the documentation.

This is tested on minnowmax, link, samus and coral.

Fixes: 87f1084a63 (x86: Adjust mrccache_get_region() to use livetree)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-02 09:16:13 +08:00
Simon Glass
d7413deadd x86: spl: Print the error on SPL failure
The error code is often useful to figure out what is going on. Printing it
does not increase code size much, so print out the error and then hang.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
609b90a6a9 x86: spi: Rewrite logic for obtaining the SPI memory map
At present this logic does not work on link and samus, since their SPI
controller is not a PCI device, but a child of the PCH.

Unfortunately, fixing this involves a lot of extra logic. Still, this was
requested in the review of the fix-up patch, so here it is.

Fixes: 92842147c3 ("spi: ich: Add support for get_mmap() method")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-02 09:16:13 +08:00
Simon Glass
8e2922e357 x86: spi: Add a way to access the SPI mapping via registers
At present the PCI BDF (bus/device/function) is needed to access the SPI
mapping, since the registers are at BAR0. This doesn't work when PCI
auto-config has not been done yet, since BARs are unassigned.

Add another way to find the mapping, using the MMIO base, if the caller
knows this.

Also add a missing function comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Tom Rini
b5d54d26ea rpi4:
- set ARCH_FIXUP_FDT_MEMORY
 - bump NR_DRAM_BANKS to four to enable 8 GB of RAM
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Merge tag 'rpi-next-2020.07.2' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi

rpi4:
- set ARCH_FIXUP_FDT_MEMORY
- bump NR_DRAM_BANKS to four to enable 8 GB of RAM
2020-06-01 11:42:47 -04:00
Tom Rini
42c8a112d2 - stm32mp15: fix DT on DHCOR SOM and avenger96 board
- stm32mp15: re-enable KS8851 on DHCOM
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Merge tag 'u-boot-stm32-20200528' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp15: fix DT on DHCOR SOM and avenger96 board
- stm32mp15: re-enable KS8851 on DHCOM
2020-06-01 11:42:22 -04:00
Tom Rini
9452b7496f Merge tag 'u-boot-rockchip-20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix mmc of path after syncfrom kernel dts;
- Add dwc3 host support with DM for rk3399;
- Add usb2phy and typec phy for rockchip platform;
- Migrate board list doc to rockchip.rst;
- Add rk3399 Pinebook Pro board support;
- Update dram_init in board_init and add memory node in SPL;
2020-05-31 20:07:39 -04:00
Heiko Stuebner
a343b4fe73 spl: add fixed memory node in target fdt also when loading ATF
In a loading chain SPL -> ATF (->OP-TEE) -> U-Boot, ATF and a subsequent
OP-TEE will re-use the same fdt as the U-Boot target and may need the
information about usable memory ranges.

Especially OP-TEE needs this to initialize dynamic shared memory
(the only type U-Boot implements when talking to OP-TEE).

So allow spl_fixup_fdt() to take a fdt_blob argument, falling back to
the existing CONFIG_SYS_SPL_ARGS_ADDR if needed and call it from the
ATF path as well.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2020-05-31 22:22:07 +08:00
Heiko Stuebner
b6740fb116 rockchip: spl: do full dram_init instead of only probing
Parts of later SPL may need RAM information as well, so do full
dram_init() call, which includes the existing dram probing but also
initializes the ram information in gd.

dram_init() from sdram.c does the following steps:
- uclass_get_device(UCLASS_RAM, ...) like the current code
- ret = ram_get_info(dev, &ram);
- gd->ram_size = ram.size;

CONFIG_SPL_RAM already makes sure that sdram.c gets compiled
and thus no other variant of dram_init() can exist.

So it's the same functionality as before and only adds that the
SPL now aquires knowledge about the amount of available ram,
which it didn't know about before.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 22:22:07 +08:00
Peter Robinson
9fb8e24804 rockchip: Add initial support for the Pinebook Pro laptop from Pine64.
Specification:
- Rockchip RK3399
- 4GB Dual-Channel LPDDR4
- eMMC socket
- mSD card slot
- 128Mbit (16Mb) SPI Flash
- AP6256 for 11AC WiFi + BT5
- 14 inch 1920*1080 eDP MiPi display
- Camera
- USB 3.0, 2.0 ports
- Type-C port with alt-mode display (DP 1.2) and 15W charge
- DC 5V/3A
- optional PCIe slot for NVMe SSD drive

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 22:22:07 +08:00
Peter Robinson
7390fb9999 arm: dts: rockchip: Add initial DT for Pinebook Pro
Sync initial support for Pinebook Pro device tree from Linux 5.7-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 20:46:08 +08:00
Peter Robinson
5b13c1030d dt-bindings: input: adopt Linux gpio-keys binding constants
Sync the gpio-keys input bindings from linux 5.7-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2020-05-31 20:44:23 +08:00
Tom Rini
d09b832cd8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- r2dplus fixes
2020-05-30 20:11:38 -04:00
Tom Rini
8309157ff1 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- ehci-mx6, eth/r8152 bugfixes
2020-05-30 20:11:06 -04:00
Matthias Brugger
a61cf765f7 configs: rpi: set NR_DRAM_BANKS to four
With the new RPi4 which has 8 GB of RAM, we can have up to four DRAM
banks. Bump up the configuration files to detect all the memory in
U-Boot.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-30 23:05:47 +02:00
Corentin Labbe
5c7f5c5b00 rpi_4_defconfig: add missing CONFIG_ARCH_FIXUP_FDT_MEMORY
As discussed at https://lore.kernel.org/linux-arm-kernel/b726290c-1038-3771-5187-6ac370bc92c9@arm.com/T/
the defconfig for rpi4 miss CONFIG_ARCH_FIXUP_FDT_MEMORY.
Without it, booting with an initrd fail.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-30 23:05:47 +02:00
Tom Rini
a08e0a28eb Patman changelog enhancements
Sandbox SPI flash doc update
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Merge tag 'dm-pull-30may20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

Patman changelog enhancements
Sandbox SPI flash doc update
2020-05-30 11:37:32 -04:00
Tom Rini
29b0540d5a Merge tag 'bugfixes-for-v2020.07-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for v2020.07-rc4
- fix eeprom issue with AT24MAC402 (address != 0)
- fix in i2c-uclass.c when compiling compiling with -Wtype-limits
- designware_i2c: small fixes:
  - check if the device is powered
  - tidy up use of NULL priv
2020-05-29 23:54:01 -04:00
Sean Anderson
dc03ba48be patman: Modify functional tests for new behavior
This patch adds or modifies functional tests for the Cover-changes,
Commit-changes, and Series-process-log tags in order to account for new
behavior added in the previous few patches. The '(no changes since v1)'
case is not tested for, since that would need an additional commit to test
in addition to testing the existing code paths.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Sean Anderson
0411fff36f patman: Support multi-line changes in changelogs
This patch adds support to multi-line changes. That is, if one has a line
in a changelog like
- Do a thing but
  it spans multiple lines
Using Series-process-log sort would sort as if those lines were unrelated.
With this patch, any change line starting with whitespace will be
considered part of the change before it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Sean Anderson
6949f70c6d patman: Add new tags for finer-grained changelog control
By default patman generates a combined changelog for the cover letter. This
may not always be desirable.

Many patches may have the same changes. These can be coalesced with
"Series-process-log: uniq", but this is imperfect. Similar changes like
"Move foo to patch 7" will not be merged with the similar "Move foo to this
patch from patch 6".

Changes may not make sense outside of the patch they are written for. For
example, a change line of "Add check for bar" does not make sense outside
of the context in which bar might be checked for. Some changes like "New"
or "Lint" may be repeated many times throughout different change logs, but
carry no useful information in a summary.

Lastly, I like to summarize the broad strokes of the changes I have made in
the cover letter, while documenting all the details in the appropriate
patches. I think this makes it easier to get a good feel for what has
changed, without making it difficult to wade through every change in the
whole series.

This patch adds two new tags to add changelog entries which only appear in
the cover letter, or only appear in the commit. Changes documented with
"Commit-changes" will only appear in the commit, and will not appear in the
cover letter. Changes documented with "Cover-changes" will not appear in
any commit, and will only appear in the cover letter.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Sean Anderson
b0436b9404 patman: Suppress empty changelog entries
Patman outputs a line for every edition of the series in every patch,
regardless of whether any changes were made. This can result in many
redundant lines in patch changelogs, especially when a patch did not exist
before a certain revision. For example, the existing behaviour could result
in a changelog of

Changes in v7: None
Changes in v6: None
Changes in v5:
- Make a change

Changes in v4: None

Changes in v3:
- New

Changes in v2: None

With this patch applied and with --no-empty-changes, the same patch would
look like

(no changes since v5)

Changes in v5:
- Make a change

Changes in v3:
- New

This is entirely aesthetic, but I think it reduces clutter, especially for
patches added later on in a series.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Bin Meng
14aa35ad55 patman: Add an option to create patches without binary contents
Some mailing lists have size limits and when we add binary contents
to our patches it's easy to exceed the size limits.

Git supports a command line option "--no-binary" to generate patches
without any binary contents. Add an option in patman to handle this.
Note with this option patches cannot be applied properly, but they
are still useful for code review.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Bin Meng
0fc01bf826 patman: Sort the command line options
Sort the existing command line options by:

- help comes first
- option starts with '-'
- option starts with '--'

Lower case followed by upper case letters, in alphabetical order.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Stefan Roese
979afd14c3 dm: core: Reorder include files in read.c
Including the assembler headers before including common.h etc leads to
compilation errors upon MIPS64 based platforms using OF_LIVE. This
patch reorders the include files to the "correct" oder.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
AKASHI Takahiro
5e61c4e89d sandbox: update documents regarding spi_sf
Since the commit 1289e96797 ("sandbox: spi: Drop command-line SPI
option"), "--spi_sf" command line option is no longer supported.

So update the following documents to sync them up with the change.
	doc/arch/sandbox.rst
	doc/SPI/README.sandbox-spi

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
AKASHI Takahiro
02c770b4e4 sandbox: drop CONFIG_SYS_RELOC_GD_ENV_ADDR
As we discussed in [1], this option is not needed for sandbox build.

[1] https://lists.denx.de/pipermail/u-boot/2020-February/400182.html

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Marcin Juszkiewicz
63a3c89855 rockchip: rockpro64: enable DM_KEYBOARD
USB stack uses DM so DM_KEYBOARD is needed to get USB keyboard working.

Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Jagan Teki
2c7cff0d3c roc-rk3399-pc: Enable USB3.0 Host
Enable USB3.0 Host support for ROC-RK3399-PC boards.

Tested USB3.0 SSD on Type C1 port on board.

=> usb start
starting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: USB EHCI 1.00
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found
scanning bus dwc3 for devices... 6 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
     u-boot EHCI Host Controller

  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Hub (480 Mb/s, 100mA)
        USB 2.0 Hub [MTT]

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Hub (480 Mb/s, 0mA)
  | |  VIA Labs, Inc. USB2.0 Hub
  | |
  | +-4  Hub (480 Mb/s, 100mA)
  |   |   USB 2.0 Hub
  |   |
  |   +-5   (480 Mb/s, 100mA)
  |        VIA Technologies Inc. USB 2.0 BILLBOARD  0000000000000001
  |
  +-3  Hub (5 Gb/s, 0mA)
    |  VIA Labs, Inc. USB3.0 Hub
    |
    +-6  Mass Storage (5 Gb/s, 224mA)
         JMicron External Disk 3.0 DB12345678A2

=> usb reset
resetting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: USB EHCI 1.00
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found
scanning bus dwc3 for devices... 6 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Frank Wang
7db6b71b49 configs: evb-rk3399: update support usb3.0 host
Update evb-rk3399 default config to support USB3.0 Host.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Frank Wang
86554ab10a ARM: dts: rk3399-evb: usb3.0 host support
Configure 'tcphy1' and 'usbdrd_dwc3_1' nodes to support USB3.0 host
for Rockchip RK3399 Evaluation Board.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Frank Wang
604ab3ecda driver: usb: drop legacy rockchip xhci driver
We have changed to use dwc3 generic driver for usb3.0 host, so the
legacy Rockchip's xHCI driver is not needed, and drop it.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Frank Wang
5d422ab26d usb: dwc3: add make compatible for rockchip platform
RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller
in resetting to hold pipe power state in P2 before initializing the PHY.
This commit fixed it and added device compatible for rockchip platform.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00