Commit graph

21 commits

Author SHA1 Message Date
Stefan Agner
80b9c3bb80 board: toradex: colibri_vf: Add DCU support for Colibri Vybrid
The Vybrid SoC family has the same display controller unit (DCU)
like the LS1021A SoC. This patch adds platform data, pinmux defines
and clock control to enable the driver for Toradex Colibri Vybrid
module.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-04-14 14:03:07 +02:00
Peng Fan
c40d612b1a serial: lpuart: restructure lpuart driver
Drop CONFIG_LPUART_32B_REG.
Move the register structure to a common file include/fsl_lpuart.h
Define lpuart_serial_platdata structure which includes the reg base and flags.
For 32Bit register access, use lpuart_read32/lpuart_write32 which handles
big/little endian.
For 8Bit register access, still use the orignal code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@nxp.com>
Cc: Alison Wang <b18965@freescale.com>
2017-03-17 09:27:08 +01:00
Albert ARIBAUD \\(3ADEV\\)
3f353ceccb vf610: refactor DDRMC code
The VF610 DDRMC driver code contains settings which are
board-specific. Move these out to boards so that new boards
can define their own without having to modify the driver.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-10-02 10:42:31 +02:00
Albert ARIBAUD \(3ADEV\)
b44e60ac04 i2c: fix vf610 support
Add support in mxc_i2c driver, iomux_v3 and vf610 architecture for the four
I2C instances available in VF610.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-07-10 10:10:48 +02:00
Bhuvanchandra DV
d348a943e7 dm: gpio: vf610: Add GPIO driver support
Add GPIO driver support to Freescale VF610

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
2015-06-08 08:41:54 +02:00
Heiko Schocher
e6c8b716c7 i2c, mxc: rework i2c base address names for different SoCs
rework and unify i2c address names for different SoCs, which
use the mxc_i2c driver.

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-05-26 14:17:00 +02:00
Sanchayan Maity
a94bb7a42c usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
This driver adds support for the USB peripheral on Freescale Vybrid
SoC's.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:09 -04:00
Sanchayan Maity
e7b860fa4d ARM: vf610: Initial integration for Colibri VF50/VF61
This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.

- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
  - for VF50, use PLL2 as memory clock (synchronous mode)
  - for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default

Tested on Colibri VF50/VF61 booting using serial loader over UART.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-23 14:56:09 -04:00
Sanchayan Maity
1db503c4b9 ARM: vf610: Add SoC and CPU type detection
Vybrid product family consists of several rather similar SoC which
can be determined by softare during boot time. This allows use of
variable ${soc} for Linux device tree files. Detect VF5xx CPU's by
reading the CPU count register. We can determine the second number
of the CPU type (VF6x0) which indicates the presence of a L2 cache.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:08 -04:00
Stefan Agner
8b4f9afac0 ARM: vf610: Enable external 32KHz oscillator
Enable the SCSC (Slow Clock Source Controller) and select the external
32KHz oscillator. This improves the accuracy of the RTC.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:08 -04:00
Sanchayan Maity
c7ea243cc0 ARM: vf610: Move DDR3 initialization to imx-common
In order to avoid code duplication, move the DDR3 initialization to the
common place under imx-common. Currently ROW_DIFF and COL_DIFF can be
chosen from the board file. The JEDEC timings are specified using a
common ddr3_jedec_timings structure.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-04-23 14:56:08 -04:00
Stefan Agner
9e89a64fbd arm: vf610: improve evaluation of reset source
Improve the evaluation of the reset source. Bit description according
to latest reference manual rev. 7.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2014-12-01 10:20:22 +01:00
Anthony Felice
c19a8bc571 vf610twr: Tune DDR initialization settings
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.

Changed register settings to comply with JEDEC required values.

Changed timing parameters because they included full clock
periods that were doing nothing.

Signed-off-by: Anthony Felice <tony.felice@timesys.com>
[rebased on v2014.10-rc2]
Signed-off-by: Stefan Agner <stefan@agner.ch>
2014-10-07 13:08:31 +02:00
Stefan Agner
b0e31c7b66 arm: vf610: add NFC clock support
Add NFC (NAND Flash Controller) clock support and enable them
at board initialization time.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2014-08-30 07:46:40 -04:00
Chao Fu
cb6d04d606 arm: vf610: Add QSPI support for VF610TWR
Add QSPI support for VF610TWR, such as clock and iomux.

Signed-off-by: Alison Wang <Huan.Wang@freescale.com>
Signed-off-by: Chao Fu <b44548@freescale.com>
2014-06-09 09:18:15 +02:00
Stefan Agner
56d83d1c04 arm: vf610: add DDR_SEL_PAD_CONTR register
Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2014-05-25 15:46:12 +02:00
Marcel Ziswiler
6c81a93db7 arm: vf610: add enet1 support
This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secondary Ethernet (enet1) MAC RMII1 base address definition
- RMII1 iomux definitions
- VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for
  internal (e.g. crystal-less) Ethernet clocking.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>
2014-04-07 20:15:44 +02:00
Tom Rini
c2120fbfbc Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.

Conflicts:
	board/sandburst/common/ppc440gx_i2c.c
	board/sandburst/common/ppc440gx_i2c.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:50:24 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Alison Wang
1221b3d74a vf610: Add I2C support for Vybrid VF610 platform
This patch adds I2C support for Vybrid VF610 platform and adds
I2C0 support to VF610TWR board.

Signed-off-by: Alison Wang <b18965@freescale.com>
2013-07-23 08:34:57 +02:00
Alison Wang
24e8bee508 arm: vf610: Add Vybrid VF610 CPU support
This patch adds generic codes to support Freescale's Vybrid VF610 CPU.

It aligns Vybrid VF610 platform with i.MX platform. As there are
some differences between VF610 and i.MX platforms, the specific
codes are in the arch/arm/cpu/armv7/vf610 directory.

Signed-off-by: Alison Wang <b18965@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-06-03 10:56:53 +02:00