Fix the following DT dtc warnings for stm32mp1 boards:
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@0:
node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@1:
node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@2:
node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@3:
node has a unit name, but no reg property
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Device tree and binding alignment with kernel v5.4
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
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Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
ACPI GPEs are used to signal interrupts from peripherals that are accessed
via ACPI. In U-Boot these are modelled as interrupts using a separate
interrupt controller. Configuration is via the device tree.
Add a simple driver for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present driver model supports the IRQ uclass but there is no way to
request a particular interrupt for a driver.
Add a mechanism, similar to clock and reset, to read the interrupts
required by a device from the device tree and to request those interrupts.
U-Boot itself does not have interrupt-driven handlers, so just provide a
means to read and clear an interrupt. This can be useful to handle
peripherals which must use an interrupt to determine when data is
available, for example.
Bring over the basic binding file as well, from Linux v5.4. Note that the
older binding is not supported in U-Boot; the newer 'special form' must be
used.
Add a simple test of the new functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a new device-tree property to control the colour depth. At present we
support 16bpp and 32bpp.
While we are here, update the code to use livetree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
DS3232 is an i2c RTC with 236 bytes of battery-backed SRAM.
Add an RTC driver for DS3232 device, which provides time and
date support. Also read and write functions are provided,
which can be used to access the SRAM memory.
Signed-off-by: Nandor Han <nandor.han@vaisala.com>
Bring in the following merges:
commit 8fbbec12f7
Merge: 87f69f467a63618e71e8
Author: Tom Rini <trini@konsulko.com>
Date: Fri Jan 3 09:48:47 2020 -0500
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
- updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support
commit 87f69f467a
Merge: c0912f9bbf4466b99703
Author: Tom Rini <trini@konsulko.com>
Date: Tue Dec 24 08:18:19 2019 -0500
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next
- Enable DM driver on ppc/km boards
- Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x,
T104x, P4080, P2041, P2020, P1020, P3041
- Some updates in mpc85xx-ddr driver, km boards
commit c0912f9bbf
Merge: 533c9f5714a1d6dc3f84
Author: Tom Rini <trini@konsulko.com>
Date: Wed Dec 18 07:20:19 2019 -0500
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next
- Various x86 common codes updated for TPL/SPL
- I2C designware driver updated for PCI
- ICH SPI driver updated to support Apollo Lake
- Add Intel FSP2 base support
- Intel Apollo Lake platform specific drivers support
- Add a new board Google Chromebook Coral
commit 533c9f5714
Merge: 553cb06887033e18b47b
Author: Tom Rini <trini@konsulko.com>
Date: Tue Dec 17 07:53:08 2019 -0500
Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next
i2c: for next
- misc: i2c_eeprom:
Add partition support and add ability to query size
of eeprom device and partitions
- i2c common:
add support for offset overflow in to address and add
sandbox tests for it.
commit 553cb06887
Merge: f39abbbc53b4f98b3b16
Author: Tom Rini <trini@konsulko.com>
Date: Thu Dec 12 08:18:59 2019 -0500
Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next
buildman improvements including toolchain environment feature
sandbox unicode support in serial
Add a GPIO driver which uses the pinctrl driver to access the pad
information. This driver relies on the GPIO nodes being subnodes to the
pinctrl device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Recent Intel SoCs share a pinctrl mechanism with many common elements. Add
an implementation of this core functionality, allowing SoC-specific
drivers to avoid adding common code.
As well as a pinctrl driver this provides a GPIO driver based on the same
code.
Once other SoCs use this driver we may consider moving more properties to
the device tree (e.g. the community info and pad definitions).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present PCI auto-configuration happens in U-Boot both before and after
relocation. This is a waste of time and may mess up static addresses used
in board_init_f(). Adjust the code to supporting doing auto-configuration
once, after relocation, under control of a device-tree property.
This is needed for Apollo Lake for debugging the silicon-init code. Once
the UART is moved to a different MMIO address the debug UART does not work
and any debug output in Apollo Lake's arch_fsp_init_r() causes a hang.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Commit 656d8da9d2 (doc: Remove duplicated documentation directory) got
rid of most of Documentation/. But there's still an obviously useless
.gitignore left behind.
Also, there's a copy of the linux kernel's net/ethernet.txt binding
imported from v5.0, while the existing one in doc/ is from 4.0-rc1. So
replace the latter by the former, and making Documentation/ finally
empty.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
A couple of optional properties have been introduced for Aquantia PHY
allowing the driver to set up wiring related configuration points that
are otherwise driven by firmware.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
It defines that PHY nodes must be children on MDIO bus nodes and defines
the only required property in U-Boot, reg. This property along with the
example provided are copied over from Linux.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit 980066e6d964 ("dt-bindings: phy: dp83867: Add documentation
for disabling clock output") of mainline linux kernel.
The clock output is generally only used for testing and development and not
used to daisy-chain PHYs. It's just a source of RF noise afterward.
Add a mux value for "off". I've added it as another enumeration to the
output property. In the actual PHY, the mux and the output enable are
independently controllable. However, it doesn't seem useful to be able
to describe the mux setting when the output is disabled.
Document that PHY's default setting will be left as is if the property
is omitted.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add support for CDCE913/925/937/949 family of devices. These are modular
PLL-based low cost, high performance, programmable clock synthesizers,
multipliers and dividers. They generate up to 9 output clocks from a
single input frequency. The initial version of the driver does not
support programming of the PLLs, and thus they run in the bypass mode
only. The code is loosely based on the linux kernel cdce9xx driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This adds a document for tphy which supports physical layer
functionality for a number of controllers on MediaTek SoCs,
such as, USB2.0, USB3.0, PCIe, and SATA.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
This adds a document for MT7623 PCIe controller.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Some Texas Instruments K3 family of SoCs have one of more Digital Signal
Processor (DSP) subsystems that are comprised of either a TMS320C66x
CorePac and/or a next-generation TMS320C71x CorePac processor subsystem.
Add the device tree bindings document for the C66x DSP devices on these
SoCs. The added example illustrates the DT nodes for the first C66x DSP
device present on the K3 J721E family of SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The Texas Instruments K3 family of SoCs have one of more dual-core
Arm Cortex R5F processor subsystems/clusters (R5FSS). Add the device
tree bindings document for these R5F subsystem devices. These R5F
processors do not have an MMU, and so require fixed memory carveout
regions matching the firmware image addresses. The nodes require more
than one memory region, with the first memory region used for DMA
allocations at runtime. The remaining memory regions are reserved
and are used for the loading and running of the R5F remote processors.
The added example illustrates the DT nodes for the single R5FSS device
present on K3 AM65x family of SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a driver
must guarantee non-concurrent accesses to this MDIO interface. The
most logical way is to have a separate driver that handles this
single MDIO interface, used by all Ethernet ports.
*) The MDIO interface is the same between the existing mv643xx_eth
driver and the new mvneta/mvpp2 driver. Even though it is for now
only used by the mvneta/mvpp2 driver, it will in the future be
used by the mv643xx_eth driver as well.
This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
802.3 Clause 45.
This patch also adds device tree binding for marvell MDIO driver.
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adds a binding document for mdio. A notable deviation from corresponding
Linux binding is the introduction of device-name optional property, which
can be used to name MDIO buses. Two reset optional properties described
by Linux binding are also not present as they don't seem to be used in
U-Boot at this time.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For U-Boot we allow a GPIO to be specified to enable the codec. Add this
to the relevant binding files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This file was missed when adding the sound driver to U-Boot. Bring it in
from Linux 5.0.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This file was missed when adding the sound driver to U-Boot. Bring it in
from Linux 5.0.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
recently added gpio hog patch was "in discussion"
state with Simon Glass. This patch now adds most
of comments from Simon Glass.
Signed-off-by: Heiko Schocher <hs@denx.de>
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
In the case of the tsec network driver, so far there has been no
mainline user of DM_ETH where the DT bindings get used.
In the case of the mdio bus, it looks like the "fsl,tsec-mdio" string
was made up for the documentation, but there is no mainline code that
parses the "compatible" property anyway.
In both cases, there are no DT blobs that contain the old strings.
So change the documentation to "fsl,etsec2" for the Ethernet ports and
"fsl,etsec2-mdio" for the MDIO buses, which are strings that Linux also
uses, at least for LS1021A. More compatible strings can be added once
other (PowerPC) SoCs are migrated to DM_ETH.
The current ls1021a.dtsi doesn't match what was documented for the MDIO
buses anyway (the "compatible" is "gianfar" currently). This will be
fixed in the next patch.
Fixes: 69a00875e3 ("doc: dt-bindings: Describe Freescale TSEC ethernet controller")
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This binding documents two properties that describe the registers used to
perform MUX selection.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adds a short bindings document describing the expected structure of a MDIO
MUX dts node. This is based on Linux binding and the example is in fact
copied from there.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
add gpio-hog support. GPIO hogging is a mechanism
providing automatic GPIO request and configuration
as part of the gpio-controller's driver probe function.
for more infos see:
doc/device-tree-bindings/gpio/gpio.txt
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Michal Simek <michal.simek@xilinx.com> (zcu102)
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Add "st,package" entry. Possibles values are:
-STM32MP_PKG_AA for LFBGA448 (18*18) package
-STM32MP_PKG_AB for LFBGA354 (16*16) package
-STM32MP_PKG_AC for TFBGA361 (12*12) package
-STM32MP_PKG_AD for TFBGA257 (10*10) package
see Linux commit 966d9b928f626a54a0c27c0fdae1e3dfe9bab416
for v5.2-rc1
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit ad7061ed74 ("doc: Move device tree bindings documentation to
doc/device-tree-bindings") moved all device tree binding documentation
to doc/device-tree-bindings directory.
The current U-Boot project still have two documentation directories:
- doc/
- Documentation/
Move all documentation and sphinx files to doc directory so all content
can be in a common place.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
- Add STM32MP1 DDR driver update:
These update introduce the DDR interactive mode described in:
https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
This mode is used by the CubeMX: DDR tuning tool.
https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
The DDR interactive mode is NOT activated by default because
it increase the SPL size and slow down the boot time
(200ms wait added).
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Merge tag 'u-boot-stm32-20190523' of https://github.com/pchotard/u-boot
- Add various STM32MP1 fixes for serial, env, clk, board, i2c ...
- Add STM32MP1 DDR driver update:
These update introduce the DDR interactive mode described in:
https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
This mode is used by the CubeMX: DDR tuning tool.
https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
The DDR interactive mode is NOT activated by default because
it increase the SPL size and slow down the boot time
(200ms wait added).
This patch adds a basic group of devicetrees, one for each
cpu family, including actually just uart and dspi devices,
since these are the drivers supporting devicetree (support
added in this patch-set).
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Force alignment of the size of parameters array with
the expected value in the binding, that allows compilation
error when the array size change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch adds description on properties about file name used for both
peripheral bitstream and core bitstream.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
