Commit graph

66166 commits

Author SHA1 Message Date
Simon Glass
566ffde8e1 bdinfo: microblaze: sh: nios2: Drop arch-specific flash info
The differences these architectures have are minor and not worth the extra
code. Use the generic version always.

Tidy up the code style by removing unnecessary tabs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
7d81641ba9 bdinfo: Drop unused __maybe_unused
Some of these are not needed now. Drop them to avoid cluttering the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
e01ce34bb0 bdinfo: Drop the option to not use the generic 'bd' command
Now that all architectures are using the generic do_bdinfo(), drop the
option to not use it. When new architectures are added, they will get at
least some useful information from the generic implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
e227c27393 bdinfo: arc: Use the generic bd command
There is nothing new in the arc 'bd' command beyond what is already there.
Switch it over to use the generic code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
1aeeaeb56e bdinfo: arm: Use the generic bd command
Unfortunately ARM has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
67145d1941 bdinfo: m68k: Use the generic bd command
Unfortunately m68k has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
2e0fa21785 bdinfo: powerpc: Use the generic bd command
Unfortunately PowerPC has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
628c85aec0 bdinfo: riscv: Use the generic bd command
This arch has none of its own info to show. Move it over to use the
generic do_bdinfo().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
aa6b898fb1 bdinfo: nds32: Use the generic bd command
This arch has none of its own info to show. Move it over to use the
generic do_bdinfo().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
c66981ccbd bdinfo: sandbox: Use the generic bd command
Sandbox has a printout of 'FB base' but this code is not used since
sandbox uses driver model for everything.

Move sandbox over to use the generic do_bdinfo().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
41ec71d184 bdinfo: x86: Use the generic bd command
This arch shows 'ethspeed' info but only the freescale drivers use it, so
it can be dropped.

It also calls print_bi_dram() which is safe to call from any arch since it
has an #ifdef inside it. Add this to the generic do_bdinfo() and move x86
over to use it. Put it first since pytests rely on seeing it before
memstart in find_ram_base().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
f41b830f24 bdinfo: sh: Use the generic bd command
This arch has no code that is not already in the generic function. Drop
the arch-specific function and change sh over to use the generic one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
271db508cc bdinfo: microblaze: Use the generic bd command
Microblaze prints out ethernet and FDT information. This is useful to
most archs, so move it into the generic code and move microblaze over to
use it.

Note that FDT information is shown for all boards, since they should be
using device tree by now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
08c56d1917 bdinfo: nios2: Use the generic bd command
Nios2 currently has some code to output SRAM information which is behind
an #ifdef. No nios2 boards define this option, so the code can be removed.

Move Nios2 over to use the generic function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
df529b5a77 bdinfo: mips: Use the generic bd command
MIPS currently has a few extra things which are generally useful. Add them
to the generic function and move MIPS over to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-06-25 13:24:11 -04:00
Simon Glass
1af9756db8 bdinfo: xtensa: Create a generic do_bdinfo for xtensa
This arch uses only the generic function. It would be nice if all the
archs did the same. As a first step, create a new generic function for the
'bd' command and make xtensa use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Simon Glass
4ac06d3525 bdinfo: m68k: Drop bd_info->bi_ipbfreq
This field is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Simon Glass
b46f989bb7 bdinfo: riscv: Use generic bd_info
At present riscv still uses its own private bd_info struct. Move it over
to use the generic one like other archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Simon Glass
5ffd5e834e bdinfo: nds32: Use generic bd_info
At present nds32 still uses its own private bd_info struct. Move it over
to use the generic one like other archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Simon Glass
989a9e1e87 tbs2910: Drop the 'bd' command
This board is very close to its limit. Drop this command before the bd
refactoring, which increases the size slightly on one toolchain.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-25 13:24:10 -04:00
Fabio Estevam
4b78b5bfda ARM: dts: imx6q-tbs2910: Fix Ethernet regression
Since commit:

commit 6333cbb381
Author: Michael Walle <michael@walle.cc>
Date:   Thu May 7 00:11:58 2020 +0200

    phy: atheros: ar8035: remove static clock config

    We can configure the clock output in the device tree. Disable the
    hardcoded one in here. This is highly board-specific and should have
    never been enabled in the PHY driver.

    If bisecting shows that this commit breaks your board it probably
    depends on the clock output of your Atheros AR8035 PHY. Please have a
    look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
    "clk-out-frequency = <125000000>" because that value was the hardcoded
    value until this commit.

    Signed-off-by: Michael Walle <michael@walle.cc>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>

, the clock output setting for the AR803x driver is removed from being
hardcoded in the PHY driver and should be passed via device tree instead.

Update the device tree with the "qca,clk-out-frequency" property so that
Ethernet can work again.

Reported-by: Soeren Moch <smoch@web.de>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Soeren Moch <smoch@web.de>
2020-06-25 10:39:48 -04:00
Tom Rini
f0e236c8d6 Xilinx changes for v2020.10
Versal:
 - xspi bootmode fix
 - Removing one clock from clk driver
 - Align u-boot memory setting with OS by default
 - Map TCM and OCM by default
 
 ZynqMP:
 - Minor DT improvements
 - Reduce console buffer for mini configurations
 - Add fix for AMS
 - Add support for XDP platform
 
 Zynq:
 - Support for AES engine
 - Enable bigger memory test by default
 - Extend documentation for SD preparation
 - Use different freq for Topic miami board
 
 mmc:
 - minor GD pointer removal
 
 net:
 - Support fixed-link cases by zynq gem
 - Fix phy looking loop in axi enet driver
 
 spi:
 - Cleanup global macros for xilinx spi drivers
 
 firmware:
 - Add support for pmufw reloading
 
 fpga:
 - Improve error status reporting
 
 common:
 - Remove 4kB addition space for FDT allocation
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Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2020.10

Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default

ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform

Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board

mmc:
- minor GD pointer removal

net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver

spi:
- Cleanup global macros for xilinx spi drivers

firmware:
- Add support for pmufw reloading

fpga:
- Improve error status reporting

common:
- Remove 4kB addition space for FDT allocation
2020-06-25 09:33:39 -04:00
Ashok Reddy Soma
b8fd54d62f common: fdt: Remove additional 4k space for fdt allocation
There is no technical reason to add additional 4k space for FDT. This space
is completely unused and just increase memory requirements. This is
problematic on systems with limited memory resources as Xilinx Zynq
CSE/ZynqMP mini and Versal mini configurations.

The patch is removing additional 4k space.

EFI code is using copy_fdt() which copy FDT to different location.
And all boot commands in case of using U-Boot's FDT pointed by
$fdtcontroladdr are copying FDT to different locations by
image_setup_libfdt().
That's why in proper flow none should modified DTB used by U-Boot that's
why there is no need for additional space.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-06-25 10:09:32 +02:00
Michal Simek
e20d88bffa xilinx: zynqmp: Enable pmufw config reloading
PMU FW has functionality to accept and reload configuration object at run
time. The patch is adding support for doing it via u-boot prompt.

For example:
tftpboot 100000 pmu_obj.bin
zynqmp pmufw 100000 $filesize

The most of pmufw configurations don't allow config reloading.
Also official Xilinx PMUFW doens't support this feature properly but the
patch should open a way to call PMUFW with this request.

Here is example of PMUFW config fragment which enables config reloading.

/* SET CONFIG SECTION */
PM_CONFIG_SET_CONFIG_SECTION_ID,        /* Section ID */
PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Michal Simek
3ccea69fc4 arm64: zynqmp: Print multiboot reg in decimal
It is better to print multiboot value in decimal because boot images are
also composed in decimal not in hex.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Heinrich Schuchardt
d80dd9e785 efi_loader: size of secure boot variables
The variables SetupMode, AuditMode, DeployedMode are explicitly defined as
UINT8 in the UEFI specification. The type of SecureBoot is UINT8 in EDK2.

Use variable name secure_boot instead of sec_boot for the value of the
UEFI variable SecureBoot.

Avoid abbreviations in function descriptions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-06-24 16:50:15 +02:00
Heinrich Schuchardt
915f15ac57 efi_loader: type of efi_secure_mode
Variable efi_secure_mode is meant to hold a value of enum efi_secure_mode.
So it should not be defined as int but as enum efi_secure_mode.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-06-24 16:50:15 +02:00
Bin Meng
b1c272d18b cmd: bootefi: Fix fdt_size variable type in efi_carve_out_dt_rsv()
Variable fdt_size should be of type 'fdt_size_t', not 'fdt_addr_t'.

Fixes 0d7c2913fd: ("cmd: bootefi: Honor the address & size cells properties correctly")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-06-24 16:50:15 +02:00
Tom Rini
922c6d5d00 Merge tag 'mmc-2020-6-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Fix fsl_esdhc_imx tunning mask
- Disable CMD CRC for normal tuning for fsl_esdhc_imx
- Retry CM1 until emmc ready
- Fix sdhci HISPD handling
- Cache-aligned extcsd reading
2020-06-24 09:05:35 -04:00
Mike Looijmans
39c5cf0e70 topic: zynqmp: Add support for zynqmp-xilinx-xdp platform
XDP - Xilinx Drone Platform is a board for drones or other UAV.

Pinmux the SD card by default, and if the SD card detect line is high
(inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on
extension card and shares connection with on board wife. That means that
when SD card is present in the board wifi can't be used.

There seems to be an issue with DDR access from PL at 2400MT/s, after
updating the PMU and ATF firmware this is causing extremely slow DDR
access. Reducing the DDR speed from 2400 to 2133 appears to solve that
issue, even though the hardware has proven to be 2400 capable.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Mike Looijmans
dfbe492ede board: zynqmp: Fix for wrong AMS setting by ROM
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register
at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to
exchange the PS supply voltages 0 and 1. On Xilinx boards this is
not noticeable since these are tied together, it's only really
noticeable if banks 500 and 501 have different supplies. Xilinx' tech
support reported this undocumented register to be the cause, and
this patch applies a fix for all boards by programming the correct
value.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Mike Looijmans
fe1eb9945b board: topic-miami: Set FCLK1 to 150MHz
In all reference designs the FCLK1 runs at 150MHz, but the bootloader
doesn't set it up like that. Set the divider to 8 to generate the
correct clock. Fixes (a.o.) the DMA speed being too slow.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Patrick van Gelder
945a55050d net: xilinx: axi_emac: Fix endless loop when no PHYs are connected
The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.

Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Johannes Krottmayer
6b3984c631 doc: board: xilinx: zynq.rst: add description how to flash a SD card
Add a short description in the ZYNQ documentation how to prepare a SD card and
copy the related images to SD card.

Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
T Karthik Reddy
33d3f8e577 arm64: xilinx: Print fpga error value in hex
Fpga returns error value when fails, error status should be
printed in hex format.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Ashok Reddy Soma
f44bd3bcfd spi: zynq_[q]spi: Convert config's to macro's
Remove below config options and convert them to macros. They have never
been configured to different values than default one. And also it makes
sense to reduce the config_whitelist.
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_XILINX_SPI_IDLE_VAL

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Michal Simek
26e62cc971 net: gem: Disable PCS autonegotiation in case of fixed-link
Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.

Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:06 +02:00
T Karthik Reddy
7831292fc9 arm64: zynqmp: Change spi-max-frequency for qspi mini
Change mini u-boot qspi spi-max-frequency to 108Mhz, make the
frequency similar to full u-boot qspi flash spi-max-frequency.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Saeed Nowshadi
3ab205c117 arm64: zynqmp: Fix si570 clock output names and references
Align clock output names with node references.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
052451c10b arm64: zynqmp: Reduce console buffer size
Reduce console buffer size to 1kbyte to accommodate memory
allocations in mini u-boot for zynqmp.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ashok Reddy Soma
a0f309ee9e arm64: versal: Enable config to map TCM and OCM
Enable CONFIG_DEFINE_TCM_OCM_MMAP to map TCM and OCM memory.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ashok Reddy Soma
032d9aa189 arm: zynq: Enable alternative memory test
Enable alternative memory test for zynq platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
b80a476faa fpga: zynqpl: Add zynq aes load & loadp commands
Added support for zynq aes load & loadp commands.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
ca0c0e07ad fpga: zynqpl: Flush dcache only for non-bitstream data
In case of aes decryption destination address range must be flushed
before transferring decrypted data to destination.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Ibai Erkiaga
c64afba2fb fpga: zynqpl: Check if aes engine is enabled
AES engine cannot be used if has not been enabled at boot time
with an encrypted boot image.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
T Karthik Reddy
1d9632a3cc fpga: zynqpl: Check fpga config completion
This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:58 +02:00
Siva Durga Prasad Paladugu
3427f4d204 fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
4c86e0834a firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()
There is no need to panic all the time when pmufw config object loading
failed. The patch improves function logic to report permission deny case
and also panic only for SPL case.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-24 13:07:57 +02:00
Rajan Vaja
2b2012d1c1 clk: versal: Remove alt_ref_clk from clock sources
alt_ref_clk is applicable only for PS extended version.
For PS base version there is no separate alt_ref_clk.
It is tied with ref_clk, so remove it from driver.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00
Michal Simek
70014a7802 arm64: versal: Let U-Boot to update memory node by default
There is no reason not to let U-Boot to update memory node by default. In
past this was disabled by purpose to be able to test different memory
configurations from one U-Boot instance.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:07:57 +02:00