Commit graph

61265 commits

Author SHA1 Message Date
Michael Walle
2efb147a0a drivers: net: fsl_enetc: set phydev->node
The saved ofnode is used by some PHY drivers to access the device tree
node of the PHY.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:23:01 +05:30
Michael Walle
762ee522e2 armv8: fsl-layerscape: introduce fsl_board_late_init()
The fsl-layerscape already occupies board_late_init(), therefore it is
not possible for a board to have its own board_late_init(). Introduce
fsl_board_late_init() which can be implemented in the board specific
code.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:39 +05:30
Michael Walle
065ee175e0 armv8: fsl-lsch3: convert CONFIG_TARGET_x to CONFIG_ARCH_x
The clocks are not dependent on the target but only on the SoC.
Therefore, convert the CONFIG_TARGET_x macros to the corresponding
CONFIG_ARCH_x. This will allow other targets to automatically use the
common code. Otherwise every new target would have to add itself to the
"#if defined(CONFIG_TARGET_x) || .." macros.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:39 +05:30
Laurentiu Tudor
b4a59115e2 armv8: ls1028a: add erratum A-050382 workaround
Erratum A-050382 states that the eDMA ICID programmed in the eDMA_AMQR
register in DCFG is not correctly forwarded to the SMMU.
The workaround consists in programming the eDMA ICID in the eDMA_AMQR
register in DCFG to 40.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
30449aea50 armv8: lx2160a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
ab04dee542 fsl-layerscape: add missing SATA3 and SATA4 base addresses
LX2160A chips have 4 sata controllers. Add missing base addresses for
SATA3 and SATA4.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
e33938acc9 armv8: ls2088a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
5047781e99 fsl-layerscape: fix compile error with sec fw disabled
If SEC FW support is not enabled (ARMV8_SEC_FIRMWARE_SUPPORT=n), below
compilation error appears
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h:169:4: error:
'CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT' undeclared here (not in a function)

Fix it by wrapping with CONFIG_IS_ENABLED().

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Laurentiu Tudor
db49c1b2de armv8: fsl-layerscape: guard caam specific defines
These macros should only be used when CONFIG_FSL_CAAM is present.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Mathew McBride
28f9393b1a fsl-layerscape: do not use layerscape EFI reset if PSCI used
If the secure world reset handlers are used (via CONFIG_PSCI_RESET),
then do not use the layerscape-specific implementation.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Mathew McBride
b50fe3fb7e armv8: dts: ls1088a: add PSCI binding for LS1088A
This allows the use of PSCI calls to trusted firmware to
initiate reset and poweroff events with CONFIG_PSCI_RESET and
CONFIG_ARM_PSCI_FW. This is desirable, for example, if the target
board has implemented a custom reset or poweroff procedure in EL3.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Pankaj Bansal
05c81d98e4 pci: layerscape: Only set EP CFG READY bit
In ls_pcie_ep_enable_cfg(), as part of EP setup,config ready bit
of pci controller is set, so that RC can read the config space of EP.

While setting the config ready bit, LTSSM_EN bit in same register was
also inadvertently getting cleared. This restarts the link training
between RC and EP.

Update code to just set the desired CFG_READY bit (bit 0),
while leaving the other bits unchanged.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:13:38 +05:30
Tom Rini
d911087889 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- mpc85xx, socrates: Add dts, enable DM support, fix warnings, disable
  video
2019-11-07 07:25:14 -05:00
Tom Rini
416b5dd5f4 Merge branch '2019-11-06-reenable-llvm-in-ci'
- Re-enable LLVM tests in Travis and add them to GitLab and Azure
2019-11-06 22:54:47 -05:00
Tom Rini
0219d014a7 gitlab/azure: Enable LLVM tests
Now that we have again fixed the problems that building with clang
exposes, enable these tests on Azure and GitLab-CI as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-06 22:54:28 -05:00
Tom Rini
626b0389ec travis: Fix the clang-7 test
When using the OVERRIDE variable we need to pass -O to buildman as well
to use the "override" option to buildman.

Fixed: e9500f49ea ("travis: Use buildman for building with clang")
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-06 22:54:28 -05:00
Tom Rini
5e63c96aa7 common/console.c: Fix unused warning with console_doenv()
Newer versions of LLVM-7 will provide an unused function warning over
console_doenv() in the case of SYS_CONSOLE_IS_IN_ENV not being enabled
as can be the case in SPL.  Add guards around this function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-06 22:54:28 -05:00
Heiko Schocher
0f282c1876 Makefile: fix dependency for imx targets
imx targets are defined in arch/arm/mach-imx/Makefile.
Some of them are dependent on targets defined in main
Makefile. For the Makefile in arch/arm/mach-imx this
targets must be finished before the imx targets are
build, if not you get for example the error:

make -f /home/hs/abb/mainlining/u-boot/scripts/Makefile.build obj=arch/arm/mach-imx u-boot-dtb.imx
make[2]: *** No rule to make target 'u-boot-fit-dtb.bin', needed by 'u-boot-dtb.imx'.  Stop.
make[1]: *** [/home/hs/abb/mainlining/u-boot/Makefile:1123: u-boot-dtb.imx] Error 2
make[1]: *** Waiting for unfinished jobs....
make[1]: Leaving directory '/work/hs/compile/u-boot/aristainetos2_defconfig'
make: *** [Makefile:148: sub-make] Error 2
compile failed

In above case of CONFIG_MULTI_DTB_FIT is defined, the
u-boot-dtb.imx is dependent on the u-boot-fit-dtb.bin
which may is not build yet ...

I could reproduce this error on a travis build also if
I build an out-of-tree build on a local machine with a
build directory on a "slow" slow storage device. If
building the same source target with a build dir on a
fast storage device, the build works.

I found no solution to tell the arch/arm/mach-imx/Makefile
to find the targets in main Makefile, if there is a way
this would be the better fix.

I solved it by adding a IMX_DEPS var, which holds a list
of main u-boot targets, which must be finished, before
calling imx targets and fixed the build for imx
targets which enabled CONFIG_MULTI_DTB_FIT.

I think it is just luck, that imx targets with
CONFIG_OF_SEPARATE enabled build, because the
u-boot-dtb.imx target depends on u-boot-dtb.bin
which gets build early enough before starting with
u-boot-dtb.imx. May this targets should be fixed too.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-06 09:22:32 -05:00
Tom Rini
a8c1846633 Merge branch 'master' of git://git.denx.de/u-boot-usb
- DFU updates
- USB Storage updates
2019-11-06 07:11:02 -05:00
Tom Rini
e64ebde12d Merge tag 'mmc-2019-11-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- fsl_esdhc driver cleanup
- fsl_esdhc_imx driver improvement and compatible string update
2019-11-06 07:10:16 -05:00
Heiko Schocher
2a51fe01be mpc85xx, socrates: add DM PCI support
add DM PCI support on the socrates board.
use PCIE_FSL now.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
98beb60a2a mpc85xx, socrates: enable DM serial
switch to DM_SERIAL support.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
92746bac88 mpc85xx, socrates: enable DM I2C
enable DM I2C support for the socrates board.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
4c65a449ae mpc85xx, socrates: disable VIDEO
disable video, as not really needed longer.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
a9c909d9e0 mpc85xx, socrates: get rid of DM_USB warning
add some defines and get rid of USB warning.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
39642abf56 mpc85xx, socrates: add DM support
enable CONFIG_DM for the socrates board.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
81a7abe593 mpc85xx, dts, socrates: add u-boot specific dtsi
add u-boot specific dtsi file for socrates board.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
7d8c77e844 mpc85xx: add socrates dts from linux
add socrates device tree from linux:

commit 71ae5fc87c34 ("Merge tag 'linux-kselftest-5.2-rc1' of
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest")

and added SPDX license identifier.
Did not fix checkpatch warnings:
arch/powerpc/dts/socrates.dts:235: check: Please don't use multiple blank lines
arch/powerpc/dts/socrates.dts:238: error: code indent should use tabs where possible

Also, add me as board maintainer.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
e4ee459e7a mpc85xx, socrates: suppress unknown flash warning
suppress warning:
Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Heiko Schocher
b61cbbdcab pci: add DM based mpc85xx driver
add DM based PCI Configuration space access support for
MPC85xx PCI Bridge. This driver is based on
arch/powerpc/cpu/mpc85xx/pci.c

In the old driver there is a fix for a hw issue on the
TARGET_MPC8555CDS and TARGET_MPC8541CDS boards. As I
have no such hardware I did not port this part.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-06 16:30:19 +05:30
Tom Rini
14d39c9e1d travis: Rework how we write the ~/.buildman file
With python3 we're now tripping over a long-standing problem with how we
add to the buildman file with some toolchains.  We cannot have multiple
toolchain-alias sections as that leads to a parse error.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-05 10:44:16 -05:00
Tom Rini
b62553736e Update to latest libfdt and pylibfdt, with added size control
Update binman, dtoc, patman, buildman to Python 3
 Update move_config, rkmux, microcode_tool to Python 3
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Merge tag 'fdt-pull-5nov19' of git://git.denx.de/u-boot-fdt

Update to latest libfdt and pylibfdt, with added size control
Update binman, dtoc, patman, buildman to Python 3
Update move_config, rkmux, microcode_tool to Python 3
2019-11-05 07:59:28 -05:00
Peng Fan
f65d08411d mmc: fsl_esdhc_imx: Update compatible string for imx8m
To enable HS400(ES) and UHS for imx8m platforms, update the driver data
to share with imx8qm esdhc_soc_data.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 11:21:25 +08:00
Peng Fan
1d01c984b9 mmc: fsl_esdhc_imx: drop redundant clock settings
During mmc initialization, there are several calls to mmc_set_clock
and mmc_set_ios. When mmc_power_off, the mmc->clock will be set,
but the imx driver will use 400KHz. So the following calls
to mmc_set_ios will set the clock several times which is redundant
in fsl_esdhc_imx driver. So let's simplify to remove redundant
clock settings.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
618704753e mmc: fsl_esdhc: clean up DM and non-DM code
Make DM and non-DM code clear using below structure.
	#if !CONFIG_IS_ENABLED(DM_MMC)
		<non-DM_MMC code>
	#else
		<DM_MMC code>
	#endif

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
0cc127c424 mmc: fsl_esdhc: always check write protect state
The QorIQ eSDHC on all platforms supports checking write protect
state through register bit. So check it always.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
08197cb8df mmc: fsl_esdhc: drop redundant code for non-removable feature
Drop redundant code for non-removable feature. "non-removable" property
has been read in mmc_of_parse().

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
5705973b09 mmc: fsl_esdhc: convert to use fsl_esdhc_get_cfg_common()
The fsl_esdhc_init() was actually to get configuration of mmc_config.
So rename it to fsl_esdhc_get_cfg_common() and make it common for both
DM_MMC and non-DM_MMC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:25 +08:00
Yangbo Lu
07bae1de38 mmc: fsl_esdhc: clean up bus width configuration code
This patch is to clean up bus width setting code.

- For DM_MMC, remove getting "bus-width" from device tree.
  This has been done in mmc_of_parse().

- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
  to fsl_esdhc_initialize() which is non-DM_MMC specific.
  And fix up bus width configuration to support only 1-bit, 4-bit,
  or 8-bit. Keep using 8-bit if it's not set because many platforms
  use driver without providing max bus width.

- Remove bus_width member from fsl_esdhc_priv structure.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:24 +08:00
Yangbo Lu
5b05fc0310 mmc: fsl_esdhc: fix voltage validation
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:24 +08:00
Yangbo Lu
531ccd407c mmc: fsl_esdhc: drop controller initialization in fsl_esdhc_init()
Controller initialization is not needed in fsl_esdhc_init().
It will be done in esdhc_init() for non-DM_MMC, and in
esdhc_init_common() in probe for DM_MMC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2019-11-05 11:21:24 +08:00
Simon Glass
388560134b binman: Move to use Python 3
Update this tool to use Python 3 to meet the 2020 deadline.

Unfortunately this introduces a test failure due to a problem in pylibfdt
on Python 3. I will investigate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00
Simon Glass
a90df2b172 dtoc: Convert fdt.py to Python 3
Drop the now-unused Python 2 code to keep code coverage at 100%.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00
Simon Glass
b6ee0cf89f binman: Convert a few tests to Python 3
Some tests have crept in with Python 2 strings and constructs. Convert
then.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00
Simon Glass
9a5d3dcff7 binman: Remember the pre-reset entry size
When preparing to possible expand or contract an entry we reset the size
to the original value from the binman device-tree definition, which is
often None.

This causes binman to forget the original size of the entry. Remember this
so that it can be used when needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00
Simon Glass
97de532e59 pylibfdt: Correct the type for fdt_property_stub()
This function should use a void * type, not char *. This causes an error:

TypeError: in method 'fdt_property_stub', argument 3 of type 'char const *'

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00
Simon Glass
903fe17aa8 pylibfdt: Sync up with upstream
Sync up the libfdt Python bindings with upstream, commit:

430419c (tests: fix some python warnings)

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00
Simon Glass
b4cf5f1df7 pylibfdt: Convert to Python 3
Build this swig module with Python 3.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00
Simon Glass
5effab0549 rkmux: Convert to Python 3
Convert this tool to Python 3 and make it use that, to meet the 2020
deadline.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00
Simon Glass
793dca34ca move_config: Convert to Python 3
Convert this tool to Python 3 and make it use that, to meet the 2020
deadline.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-11-04 18:15:32 -07:00