Commit graph

9533 commits

Author SHA1 Message Date
Tom Rini
2ef98d3316 Merge branch 'master' of git://git.denx.de/u-boot-net 2016-08-15 16:38:39 -04:00
Joe Hershberger
dfcc496ed7 net: mii: Changes not made by spatch
If the functions passed to the registration function are not in the same
C file (extern) then spatch will not handle the dependent changes.

Make those changes manually.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

For the 4xx related files:
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-15 15:29:03 -05:00
Joe Hershberger
875e0bc68a net: mii: Fix changes made by spatch
Some of the changes were a bit too complex.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-15 15:29:03 -05:00
Joe Hershberger
5a49f17481 net: mii: Use spatch to update miiphy_register
Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-15 15:26:33 -05:00
Max Filippov
0d0779c141 net/ethoc: implement MDIO bus and support phylib
Implement MDIO bus read/write functions, initialize the bus and scan for
the PHY when phylib is enabled. Limit PHY speeds to 10/100 Mbps.

Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:49 -05:00
Max Filippov
59b7dfa0d1 net/ethoc: support private memory configurations
The ethoc device can be configured to have a private memory region
instead of having access to the main memory. In that case egress packets
must be copied into that memory for transmission and pointers to that
memory need to be passed to net_process_received_packet or returned from
the recv callback.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:48 -05:00
Max Filippov
02a888b567 net/ethoc: don't mix virtual and physical addresses
Addresses used in buffer descriptors and passed in platform data or
device tree are physical. Addresses used by CPU to access packet data
and registers are virtual. Don't mix these addresses and use virt_to_phys
for translation.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:48 -05:00
Max Filippov
2de18c8d77 net/ethoc: support device tree
Add .of_match table and .ofdata_to_platdata callback to allow for ethoc
device configuration from the device tree.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:47 -05:00
Max Filippov
5d43feabf3 net/ethoc: add CONFIG_DM_ETH support
Extract reusable parts from ethoc_init, ethoc_set_mac_address,
ethoc_send and ethoc_receive, move the rest under #ifdef CONFIG_DM_ETH.
Add U_BOOT_DRIVER, eth_ops structure and implement required methods.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:47 -05:00
Max Filippov
a84a757ae7 net/ethoc: use priv instead of dev internally
Don't use physical base address of registers directly, ioremap it first.
Save pointer in private struct ethoc and use that struct in all internal
functions.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:46 -05:00
Max Filippov
f0727120a7 net/ethoc: add Kconfig entry for the driver
Add Kconfig entry for the driver, remove #define CONFIG_ETHOC from the
only board configuration that uses it and put it into that board's
defconfig.

Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:46 -05:00
Alban Bedel
eb4e8ceb47 net: e1000: Fix the build with driver model and SPI EEPROM
When adding support for the driver model the SPI EEPROM feature had
been ignored. Fix the build with both CONFIG_DM_ETH and
CONFIG_E1000_SPI enabled.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:45 -05:00
Chris Packham
70f1463686 net: smsc95xx: Use correct get_unaligned functions
The __get_unaligned_le* functions may not be declared on all platforms.
Instead, get_unaligned_le* should be used. On many platforms both of
these are the same function.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:45 -05:00
Wenyou Yang
a212b66d7c net: macb: Fix build error for CONFIG_DM_ETH enabled
Use the right phy_connect() prototype for CONFIGF_DM_ETH.
Support to get the phy interface from dt and set GMAC_UR.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-08-15 13:34:44 -05:00
Bryan Wu
3c27fa2193 i2c: tegra: add standardized clk/reset API support
clk/reset API was tested on T186 platform and previous chip like
T210/T124 will still use the old APIs.

Signed-off-by: Bryan Wu <pengw@nvidia.com>
(swarren, simplified some ifdefs, removed indent level inside an ifdef)
(swarren, added comment about the ifdefs)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:13 -07:00
Stephen Warren
bbc5b36b25 pci: tegra: port to standard clock/reset/pwr domain APIs
Tegra186 supports the new standard clock, reset, and power domain APIs.
Older Tegra SoCs still use custom APIs. Enhance the Tegra PCIe driver so
that it can operate with either set of APIs.

On Tegra186, the BPMP handles all aspects of PCIe PHY (UPHY) programming.
Consequently, this logic is disabled too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:13 -07:00
Stephen Warren
c04930762d mmc: tegra: port to standard clock/reset APIs
Tegra186 supports the new standard clock and reset APIs. Older Tegra SoCs
still use custom APIs. Enhance the Tegra MMC driver so that it can operate
with either set of APIs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:13 -07:00
Stephen Warren
34f1c9fe14 i2c: add Tegra186 BPMP driver
On Tegra186, some I2C controllers are directly controlled by the main CPU,
whereas others are controlled by the BPMP, and can only be accessed by the
main CPU via IPC requests to the BPMP. This driver covers the latter case.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:13 -07:00
Stephen Warren
24cdf1a9be power domain: add Tegra186 driver
In Tegra186, SoC power domains are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:13 -07:00
Stephen Warren
4dd99d140c reset: add Tegra186 reset driver
In Tegra186, on-SoC reset signals are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that. It is unconditionally selected by CONFIG_TEGRA186
since virtually any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:13 -07:00
Stephen Warren
d9fd7008f4 clock: add Tegra186 clock driver
In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually
any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:13 -07:00
Stephen Warren
73dd5c4cfe misc: add Tegra BPMP driver
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-15 10:26:12 -07:00
Tom Rini
f4b0df1823 Merge git://git.denx.de/u-boot-dm 2016-08-12 16:00:50 -04:00
Stephen Warren
b647f55420 misc: add "call" uclass op
The call op requests that the callee pass a message to the underlying HW
or device, wait for a response, and then pass back the response error code
and message to the callee. It is useful for drivers that represent some
kind of messaging or IPC channel to a remote device.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12 11:01:22 -06:00
John Keeping
aa26776a2d power: pmic: act8846: add missing newline to debug statements
Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:23:20 -06:00
John Keeping
65f89be2ef power: regulator: act8846: fix reading values
The voltage and control registers need to be looked up from the value in
driver_data.  Adjust the get_value and get_enable functions to match the
corresponding set_* functions.

Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:23:12 -06:00
Stephen Warren
6e06acb732 fdt: allow fdtdec_get_addr_size_*() to translate addresses
Some code may want to read reg values from DT, but from nodes that aren't
associated with DM devices, so using dev_get_addr_index() isn't
appropriate. In this case, fdtdec_get_addr_size_*() are the functions to
use. However, "translation" (via the chain of ranges properties in parent
nodes) may still be desirable. Add a function parameter to request that,
and implement it. Update all call sites to default to the original
behaviour.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Squashed in build fix from Stephen:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:20:27 -06:00
Masahiro Yamada
ab65006b08 kconfig: use bool instead of boolean for type definition attributes
Linux stopped the use of keyword 'boolean' in Kconfig.

Refer to commit 6341e62b212a2541efb0160c470e90bd226d5496 ("kconfig:
use bool instead of boolean for type definition attributes")
in Linux Kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-12 09:23:49 -04:00
Lokesh Vutla
1f01962e0f drivers: net: cpsw: always flush cache of size aligned to PKTALIGN
cpsw tries to flush dcache which is not in the range of PKTALIGN.
Because of this the following warning comes while flushing:

CACHE: Misaligned operation at range [dffecec0, dffed016]

Fix it by flushing cache of size aligned to PKTALIGN.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-08-12 09:23:47 -04:00
Max Filippov
b25732c22b drivers/sysreset: group sysreset drivers
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:22:17 -04:00
Simon Glass
2651a052d8 i2c: Drop redundant platform data setting in drivers
The i2c uclass has a default setting for per_child_platdata_auto_alloc_size
so drivers do not need to set it. Remove this from drivers to avoid
confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-08-12 06:41:41 +02:00
Tom Rini
2f1eb66e28 Merge branch 'master' of git://git.denx.de/u-boot-usb 2016-08-11 07:22:55 -04:00
Alban Bedel
76b2fad775 eth: asix88179: Add support for the driver model
Adjust this driver to support driver model for Ethernet.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
2016-08-09 12:52:05 +02:00
Alban Bedel
620452e7ae eth: asix88179: Prepare supporting the driver model
Change the prototype of a few functions to allow resuing the code for
the driver model.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
2016-08-09 12:52:05 +02:00
Vignesh R
95def3cf5d i2c: i2c-uclass-compat: avoid any BSS usage
As I2C can be used before DRAM initialization for reading EEPROM,
avoid using static variables stored in BSS, since BSS is in DRAM, which
may not have been initialised yet. Explicitly mark "static global"
variables as belonging to the .data section.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Heiko Schocher<hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-08 13:33:00 -04:00
Mugunthan V N
a61f6a5595 drivers: net: keystone_net: add support for multi slave ethernet
Keystone net can have multiple ethernet slaves, currently only
slave 1 is supported by the driver. Register multiple slaves as
individual ethernets to network framework.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-08 13:32:57 -04:00
Mugunthan V N
1610a9212a drivers: net: keystone_net: fix line termination with semi-colon
Each line should be terminated by semi-colon. It was not caught
earlier as there is a proper statement. Fix it by changing the
comma with semi-colon.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-08 13:32:56 -04:00
Vignesh R
2e205ef7eb net: cpsw: Add support to drive gpios for ethernet to be functional
On DRA72 EVM, cpsw slaves may be muxed with other modules. This
selection is controlled by a pcf gpio line. Add support for cpsw driver
to acquire mode-gpios and select the appropriate slave using gpio APIs.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-08-08 13:32:54 -04:00
Vignesh R
5746b0df9c gpio: Add driver for TI PCF8575 I2C GPIO expander
TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a
16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can
be used as an input or output without the use of a data-direction
control signal. The I/Os should be high before being used as inputs.
Read the device documentation for more details[1].

This driver is based on pcf857x driver available in Linux v4.7 kernel.
It supports basic reading and writing of gpio pins.

[1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-08-08 13:32:53 -04:00
Alban Bedel
50f5bb25b9 eth: asix88179: Fix receiving on big endian system
In asix_recv() the call to convert the endianess of the receive header
was applied on the wrong variable. Instead of converting rx_hdr it
converted pkt_hdr which is a pointer, and not yet initialiazed at this
point.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
2016-08-07 21:55:43 +02:00
Alban Bedel
652b269468 eth: asix88179: Add VID:DID for Cypress GX3 USB Ethernet Adapter
Added support for the Cypress GX3 SuperSpeed to Gigabit Ethernet
Bridge Controller (VID_04b4/PID_3610).

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
2016-08-07 21:55:43 +02:00
Rajesh Bhagat
707c866f3d usb: xhci: fsl: Add code to use CONFIG_DM_USB
Adds code to use driver model for USB XHCI FSL driver

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2016-08-07 21:55:43 +02:00
Rajesh Bhagat
ba699a5f91 usb: ehci: fsl: Add code to use CONFIG_DM_USB
Adds code to use driver model for USB EHCI FSL driver

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2016-08-07 21:55:43 +02:00
Rajesh Bhagat
1e61ce9f7e drivers: usb: fsl: Make function for initialization to use in CONFIG_DM_USB
Moves code from ehci_hcd_init to new function ehci_fsl_init
which can be re-used in CONFIG_DM_USB.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
2016-08-07 21:55:43 +02:00
Masahiro Yamada
2b58e1b76d usb: add (move) CONFIG_USB_HOST to Kconfig
The meaning of CONFIG_USB in U-Boot is different from that in Linux.

As you see in drivers/usb/Kconfig of Linux, CONFIG_USB enables the
USB host controller support, while CONFIG_USB_SUPPORT is used to
enable the whole of the USB sub-system.

When I added CONFIG_USB into Kconfig by commit 6e7e9294d3 ("usb:
add basic USB configs in Kconfig"), I planned to follow the Linux's
convention, i.e. CONFIG_USB to enable/disable the USB host support.

Then, commit 68f7c5db2d ("usb: Generic USB Kconfig option, that
fits both host and gadget and comments") changed the logic of the
CONFIG_USB to point to the whole of the USB sub-system.  As a result,
currently we do not have an option for USB host.

This commit adds CONFIG_USB_HOST, which will be useful to compile
in the USB host support code.

CONFIG_USB_HOST is not referenced at all, but strangely some boards
define it in board headers.  I removed them because USB_HOST will be
selected in Kconfig going forward.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-07 21:55:42 +02:00
Masahiro Yamada
96d8284bd5 usb: add CONFIG_USB_UHCI_HCD in Kconfig
There is no UHCI driver entry in Kconfig for now, but we have some
UHCI drivers, for example, LEON.  This is a placeholder in case we
want to move them to Kconfig in the future.

The help message was copied from Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-07 21:55:42 +02:00
Masahiro Yamada
93cb82477d usb: add CONFIG_USB_OHCI_HCD in Kconfig
Add this option as a common config for all OHCI controllers.  Its
help message was copied from Linux.  Also, I moved it below EHCI
to respect the order in Linux's Kconfig.

Add CONFIG_USB_OHCI_HCD=y to axs103_defconfig, which is the only
user of OHCI_GENERIC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-07 21:55:42 +02:00
Stefan Roese
6688452a3b net: usb: r8152: Add DM support
Add support for driver model, so that CONFIG_DM_ETH can be defined and
used with this driver.

This patch also adds the read_rom_hwaddr() callback so that the ROM MAC
address will be used to the DM part of this driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Ted Chen <tedchen@realtek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2016-08-07 21:55:42 +02:00
Peng Fan
bb42fb4f10 dm: ehci-mx6: support driver model
Support driver model for ehci mx6 driver.
Consolidate code to be shared between DM and non-DM, such as
introducing ehci_mx6_common_init.
For simplicity, some old fasion code are keeped for DM usage,
such as board_ehci_power and board_usb_phy_mode. And 'dr-mode',
usbphy and vbus handling code for DM is not added now.
These will be added in future patches.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Simon Glass <sjg@chromium.org>
2016-08-07 21:55:42 +02:00
Chin Liang See
5405817a6e spi: cadence_qspi_apb: Ensure baudrate doesn't exceed max value
Ensuring the baudrate divisor value doesn't exceed the max value
in the calculation.It will be capped at max value to ensure the
correct value being written into the register.

Example of the existing bug is when calculated div = 16. After and
with the mask, the value written to register is actually 0 (register
field for baudrate divisor). With this fix, the value written is now
15 which is max value for baudrate divisor.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jteki@openedev.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
2016-08-07 21:54:21 +02:00