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82330 commits

Author SHA1 Message Date
Xavier Drudis Ferran
2cb23b80e4 arm: rockchip: rk3399: Program PLL clock for DDR at 50 MHz in documented range
The original code set up the DDR clock to 48 MHz, not 50MHz as
requested, and did it in a way that didn't satisfy the Application
Notes in RK3399 TRM [1]. 2.9.2.B says:

   PLL frequency range requirement
   [...]
   FOUTVCO: 800MHz to 3.2GHz

2.9.2.A :
   PLL output frequency configuration
   [...]
   FOUTVCO = FREF / REFDIV * FBDIV
   FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2

FREF = 24 MHz

The original code gives FOUTVCO: 24MHz/1 * 12 = 288MHz < 800MHz
And the resulting FOUTPOSTDIV is 288MHz / 3 / 2 = 48MHz
but the requested frequency was 50MHz

Note:
2.7.2 Detail Register Description
PMUCRU_PPLL_CON0 says

   fbdiv
   Feedback Divide Value
   Valid divider settings are:
   [16, 3200] in integer mode

So .fbdiv = 12 wouldn't be right. But 2.9.2.C says:

   PLL setting consideration
   [...]
   The following settings are valid for FBDIV:
   DSMPD=1 (Integer Mode):
   12,13,14,16-4095 (practical value is limited to 3200, 2400, or 1600
   (FVCOMAX / FREFMIN))
   [...]

So .fbdiv = 12 would be right.

In any case FOUTVCO is still wrong. I thank YouMin Chen for
confirmation and explanation.

Despite documentation, I don't seem to be able to reproduce a
practical problem with the wrong FOUTVCO. When I initially found it I
thought some problems with detecting the RAM capacity in my Rock Pi 4B
could be related to it and my patch seemed to help. But since I'm no
longer able to reproduce the issue, it works with or without this
patch. And meanwhile a patch[2] by Lee Jones and YouMin Chen addresses
this issue. Btw, shouldn't that be commited?

So this patches solves no visible problem.  Yet, to prevent future
problems, I think it'd be best to stick to spec.

An alternative to this patch could be

    {.refdiv = 1, .fbdiv = 75, .postdiv1 = 6, .postdiv2 = 6};

This would theoretically consume more power and yield less jitter,
according to 2.9.2.C :

   PLL setting consideration
   [...]
   For lowest power operation, the minimum VCO and FREF frequencies
   should be used. For minimum jitter operation, the highest VCO and
   FREF frequencies should be used.
   [...]

But I haven't tried it because I don't think it matters much. 50MHz
for DDR is only shortly used by TPL at RAM init. Normal operation is
at 800MHz.  Maybe it's better to use less power until later when more
complex software can control batteries or charging or whatever ?

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>

Link: [1] https://opensource.rock-chips.com/images/e/ee/Rockchip_RK3399TRM_V1.4_Part1-20170408.pdf
Link: [2] https://patchwork.ozlabs.org/project/uboot/list/?series=305766

Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Tested-by: Michal Suchánek <msuchanek@suse.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:48 +08:00
Johan Jonker
6554464951 arm: dts: rockchip: rk3288: partial sync from Linux
Partial sync of rk3288.dtsi from Linux version 5.18

Changed:
  only properties and functions that are not yet included
  swap some clocks positions
  fix some irq numbers
  style and sort nodes

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:48 +08:00
Johan Jonker
6880ebd965 arm: dts: rockchip: update cpu and gpu nodes
In order to better compare the Linux rk3288.dtsi version
with the u-boot version update the cpu and gpu nodes.

Changed:
  use operating-points-v2
  update thermal for all cpus
  add labels to all cpus
  change gpu compatible
  change gpu interrupt names

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:48 +08:00
Johan Jonker
4fd6c2808c arm: dts: rockchip: rk3288: move thermal sub nodes to dtsi
In order to better compare the Linux rk3288.dtsi version
with the u-boot version move thermal sub nodes to the dtsi
file and remove rk3288-thermal.dtsi

Changed:
  replace underscore in nodename
  remove comments about sensor and ID
  use gpu phandle
  add #cooling-cells to gpu node
  lower critical temparature
  remove linux,hwmon property

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:48 +08:00
Simon Glass
3f2c4dd6c8 phycore-rk3288: Avoid enabling partition support in SPL
This is not needed or used, and adds code size. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:48 +08:00
Johan Jonker
f9c68a566c rockchip: phycore_rk3288: remove phycore_init() function
The phycore_rk3288 board has a SPL size problem,
so remove phycore_init() function to stay within the limits.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:48 +08:00
Tom Rini
3724ddf157 Merge branch '2022-10-18-TI-platform-updates'
- Assorted fixes and improvements to some TI platforms
2022-10-18 18:13:39 -04:00
Tom Rini
d8a1a68124 watchdog: omap_wdt: Switch required include for watchdog defines
All of the required values for using the omap_wdt.c driver are found in
<asm/ti-common/omap_wdt.h> and this is what is indirectly pulled in via
<asm/arch/hardware.h> when it exists.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-10-18 13:40:40 -04:00
Pali Rohár
892759f5a0 Nokia RX-51: Fix compilation with non-zero CONFIG_SYS_TEXT_BASE
For some unknown reason GNU assembler version 2.31.1 (arm-linux-gnueabi-as
from Debian Buster) cannot compile following code from located in file
board/nokia/rx51/lowlevel_init.S:

  kernoffs:
    .word  KERNEL_OFFSET - (. - CONFIG_SYS_TEXT_BASE)

when CONFIG_SYS_TEXT_BASE is set to 0x80008000. It throws strange compile
error which is even without line number:

    AS      board/nokia/rx51/lowlevel_init.o
  {standard input}: Assembler messages:
  {standard input}: Error: attempt to get value of unresolved symbol `L0'
  make[2]: *** [scripts/Makefile.build:293: board/nokia/rx51/lowlevel_init.o] Error 1

I have no idea about this error and my experiments showed that ARM GNU
assembler is happy with negation of that number. So changing code to:

  kernoffs:
    .word  . - CONFIG_SYS_TEXT_BASE - KERNEL_OFFSET

and then replacing mathematical addition by substraction of "kernoffs"
value (so calculation of address does not change) compiles assembler file
without any error now.

There should be not any functional change.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-10-18 13:40:40 -04:00
Andrew Davis
e1e8fdfa6d arm: mach-k3: Move hardware handling to common files
These hardware register definitions are common for all K3, remove
duplicate data them by moving them to hardware.h.

While here do some minor whitespace cleanup + grouping.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18 13:40:40 -04:00
Andrew Davis
b0931d1bd1 arm: mach-k3: security: Use dma-mapping for cache ops
This matches how this would be done in Linux and these functions
do the alignment for us which makes the code look cleaner.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18 13:40:40 -04:00
Andrew Davis
b9add6413d dma: Transfer dma_ops should use DMA address types
DMA operations should function on DMA addresses, not virtual addresses.
Although these are usually the same in U-Boot, it is more correct
to be explicit with our types here.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18 13:40:40 -04:00
Andrew Davis
b839265046 dma: ti-edma3: Add DMA map operations before and after transfers
We should clean the caches before any DMA operation and clean+invalidate
after. This matches what the DMA framework does for us already but adds
it to the two functions here in this driver that don't yet go through the
new DMA framework.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18 13:40:40 -04:00
Andrew Davis
c8d2fc7517 dma: Use dma-mapping for cache ops and sync after write
The DMA'd memory area needs cleaned and invalidated after the DMA
write so that any stale cache lines do not mask new data.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18 13:40:40 -04:00
Andrew Davis
fc95f83ec9 arm: mach-k3: common: Set boot_fit on non-GP devices
This matches what we did for pre-K3 devices. This allows us to build
boot commands that can check for our device type at runtime.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18 13:40:40 -04:00
Matt Ranostay
28ba10074b phy: ti: j721e-wiz: add j784s4-wiz-10g module support
Add support for j784s4-wiz-10g device which has two core reference
clocks (e.g core_ref_clk, core_ref1_clk) which requires an additional
mux selection option.

Signed-off-by: Matt Ranostay <mranostay@ti.com>
2022-10-18 09:48:22 -04:00
Dave Gerlach
f020cff02b arm: dts: k3-am64-evm: EMIF tool update to v0.08.40 for 1600MT/s DDR4
Move to latest DDR4 1600MT/s for k3-am64-evm based on EMIF tool
v0.08.40.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
2022-10-18 09:48:22 -04:00
Dave Gerlach
8359b9982a arm: dts: k3-am64-sk: EMIF tool update to v0.08.40 and move to 1600MT/s LPDDR4
Move k3-am64-sk to use 1600MT/s LPDDR4 configuration and update to latest EMIF
tool v0.08.40.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
2022-10-18 09:48:22 -04:00
Tom Rini
700b4fe782 Update uclass iterators to work better when devices fail to probe
Support VBE OS requests / fixups
 Minor error-handling tweaks to bootm command
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Merge tag 'dm-pull-18oct22' of https://source.denx.de/u-boot/custodians/u-boot-dm

Update uclass iterators to work better when devices fail to probe
Support VBE OS requests / fixups
Minor error-handling tweaks to bootm command
2022-10-18 07:36:52 -04:00
Tom Rini
d3031d442b - stm32mp: fix compilation issue with DEBUG_UART
- DT update :
   - Remove buck3 regulator-always-on on AV96
   - Enable btrfs support on DHSOM
   - Drop extra newline from AV96 U-Boot extras DT
   - Add DHCOR based Testbench board
   - Fix and expand PLL configuration comments
   - update SCMI dedicated file
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Merge tag 'u-boot-stm32-20221018' of https://source.denx.de/u-boot/custodians/u-boot-stm

- stm32mp: fix compilation issue with DEBUG_UART
- DT update :
  - Remove buck3 regulator-always-on on AV96
  - Enable btrfs support on DHSOM
  - Drop extra newline from AV96 U-Boot extras DT
  - Add DHCOR based Testbench board
  - Fix and expand PLL configuration comments
  - update SCMI dedicated file
2022-10-18 07:36:39 -04:00
Andre Przywara
622d27bc3f sunxi: OrangePi Zero 2: Enable SPI booting
The OrangePi Zero 2 board comes with 2MB of SPI flash, from which the
BROM is able to boot from. Please note that the fuse setup requires
PC5 (BOOT_SEL3) to be pulled to GND for that to actually work.

Enable the SPL code responsible for finding and loading U-Boot proper and
friends, so that u-boot-sunxi-with-spl.bin can be written into the flash.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Ivan Shishkin <s45rus@gmail.com>
2022-10-18 08:15:59 +01:00
Andre Przywara
e50ee3a8d7 sunxi: SPL SPI: Add SPI boot support for the Allwinner H616 SoC
The H616 SoC uses the same SPI IP as the H6, also shares the same clocks
and reset bits.
The only real difference is a slight change in the pin assignment: the
H6 uses PC5, the H616 PC4 instead. This makes for a small change in
our spi0_pinmux_setup() routine.

Apart from that, just extend the H6 #ifdef guards to also cover the H616,
using the shared CONFIG_SUN50I_GEN_H6 symbol.
Also use this symbol for the Kconfig dependency.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Ivan Shishkin <s45rus@gmail.com>
2022-10-18 08:15:59 +01:00
Andre Przywara
8094a4ed9d sunxi: defconfig: drop redundant definitions
When some configuration symbols were converted from header files to
Kconfig, their values were placed into *every* defconfig file.
Since we now have sensible per-SoC defaults defined in Kconfig, those
values are now redundant, and can just be removed.
This affects CONFIG_SPL_STACK, CONFIG_SYS_PBSIZE, CONFIG_SPL_MAX_SIZE,
and CONFIG_SYS_BOOTM_LEN.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-18 08:18:41 +01:00
Andre Przywara
177040b1eb sunxi: Kconfig: use SoC-wide values for some symbols
Some configuration symbols formerly defined in header files were
recently converted to Kconfig symbols. This moved their value definition
into *every* defconfig file, even though those values are hardly board
choices.
Use the new Kconfig option to define per-SoC default values, in just one
place, which makes the definition in each defconfig file redundant.

We refrain from setting a sunxi specific value for CONFIG_SYS_BOOTM_LEN,
so this defaults to a much better 64MB for uncompressed arm64 kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-10-18 08:18:30 +01:00
Andre Przywara
ceda40a8e6 sunxi: dts: arm: update devicetree files
Update the devicetree files from the Linux kernel, version v6.0-rc4.
This is covering the 32-bit SoCs, from arch/arm/boot/dts/.

This avoids the not backwards-compatible r_intc binding change, to allow
older kernels to boot, but the other nodes are updated.

Not much change here, the vast majority is actually cosmetic: node names
and using symbolic names for the the RTC clocks.
The R40 boards gain DVFS support.
Some A23/A33 tablet DTs are unified into a single file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-18 08:18:22 +01:00
Andre Przywara
7f53f5093b sunxi: dts: arm64: update devicetree files
Update the devicetree files from the Linux kernel, version v6.0-rc4.
This is covering the 64-bit SoCs, from arch/arm64/boot/dts/allwinner.

This avoids the not backwards-compatible r_intc binding change, to allow
older kernels to boot, but the other nodes are updated.

Not much change here, the vast majority is actually cosmetic: node names
and using symbolic names for the the RTC clocks.
Some A64 boards gain some audio nodes.
The H616 DTs are now switched to the version finally merged into the
kernel, which brings some changes, but none affecting U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-18 08:15:59 +01:00
Patrick Delaunay
c37a668481 stm32mp: fix compilation issue with DEBUG_UART
Fix the compilation issue when CONFIG_DEBUG_UART is activated

 drivers/serial/serial_stm32.o: in function `debug_uart_init':
 drivers/serial/serial_stm32.c:291: undefined reference to \
    `board_debug_uart_init'

The board_debug_uart_init is needed for SPL boot, called in
cpu.c::mach_cpu_init(); it is defined in board/st/stm32mp1/spl.c.

But with the removal #ifdefs patch, the function debug_uart_init() is
always compiled even if not present in the final U-Boot image.

This patch adds a file to provided this function when DEBUG_UART and SPL
are activated.

Fixes: c8b2eef52b ("stm32mp15: tidy up #ifdefs in cpu.c")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-10-18 08:40:59 +02:00
Patrick Delaunay
637a370251 ARM: dts: stm32: update SCMI dedicated file
The PWR regulators don't need be removed as they are already deactivated.
This patches is a alignment with the accepted patch in Linux device tree
in commit a34b42f8690c ("ARM: dts: stm32: fix pwr regulators references
to use scmi").

Fixes: 69ef98b209 ("ARM: dts: stm32mp15: alignment with v5.19")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-10-18 08:37:21 +02:00
Marek Vasut
1587e689b3 ARM: dts: stm32: Fix and expand PLL configuration comments
Fix the frequencies listed in PLL configuration comments to match
the actual frequencies programmed into hardware. Furthermore, add
a comment which explains how those frequencies are calculated, so
it won't be necessary to look it up all over the datasheet and
make more mistakes in the calculation in the future.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-10-18 08:36:10 +02:00
Marek Vasut
0de10e2fe1 ARM: dts: stm32: Add DHCOR based Testbench board
Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
variant.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-10-18 08:34:25 +02:00
Marek Vasut
f8edb1e79c ARM: dts: stm32: Drop extra newline from AV96 U-Boot extras DT
Remove duplicate newline, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-10-18 08:33:20 +02:00
Marek Vasut
08e8495ee8 ARM: stm32: Enable btrfs support on DHSOM
The btrfs filesystem provides advanced functionality like copy-on-write
and snapshots, as well as metadata and data duplication and checksumming.
Enable btrfs in U-Boot to permit even the primary partition to be btrfs
and let system boot from it.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-10-18 08:31:49 +02:00
Marek Vasut
34be2ada13 ARM: dts: stm32: Remove buck3 regulator-always-on on AV96
In case the regulator-always-on is present in regulator DT node,
the regulator is always reconfigured to the voltage set in DT on
probe, even if regulator_set_value() has been called before. Drop
the property from AV96 U-Boot DT and enable the regulator manually
in code, as the board already reconfigures the Buck3 regulator in
code per PMIC NVM content instead.

Fixes: 0adf10a87b ("ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-10-18 08:20:35 +02:00
Simon Glass
ae0bf2214b vbe: Add a test for VBE device tree fixups
When a FIT includes some OS requests, U-Boot should process these and add
the requested info to corresponding subnodes of the /chosen node. Add a
pytest for this, which sets up the FIT, runs bootm and then uses a C
unit test to check that everything looks OK.

The test needs to run on sandbox_flattree since we don't support
device tree fixups on sandbox (live tree) yet. So enable BOOTMETH_VBE and
disable bootflow_system(), since EFI is not supported on
sandbox_flattree.

Add a link to the initial documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:13 -06:00
Simon Glass
e7a18f7511 dm: core: Update docs about oftree_from_fdt()
Update this function's comment and also the livetree documentation, so it
is clear when to use the function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:13 -06:00
Simon Glass
8aaacd6136 vbe: Add fixups for a basic set of OS requests
As a starting point, add support for providing random data, if requested
by the OS. Also add ASLR, as a placeholder for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
(fixed up to use uclass_first_device_err() instead)
2022-10-17 21:17:13 -06:00
Simon Glass
a753190a0c test: Move common FIT code into a separate fit_util file
To avoid duplicating code, create a new fit_util module which provides
various utility functions for FIT. Move this code out from the existing
test_fit.py and refactor it with addition parameters.

Fix up pylint warnings in the conversion.

This involves no functional change.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:13 -06:00
Simon Glass
87c97cb1f9 boot: Tidy up logging and naming in vbe_simple
Make sure the log_msg_ret() values are unique so that the log trace is
unambiguous with LOG_ERROR_RETURN. Also avoid reusing the 'node' variable
for two different nodes in bootmeth_vbe_simple_ft_fixup(), since this is
confusing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:13 -06:00
Simon Glass
33ba72700b boot: Pass the correct FDT to the EVT_FT_FIXUP event
Now that we support multiple device trees with the ofnode interface, we
can pass the correct FDT to this event. This allows the 'working' FDT to
be fixed up, as expected, so long as OFNODE_MULTI_TREE is enabled.

Also make sure we don't try to do this with livetree, which does not
support fixups yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:13 -06:00
Simon Glass
0718c3154c sandbox: Support FDT fixups
Add support for doing device tree fixups in sandbox. This allows us to
test that functionality in CI.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:13 -06:00
Simon Glass
bfdfc5d853 bootstd: Move VBE setup into a shared function
This information needs to be set up by the bootstd tests as well. Move it
into a common function and ensure it is executed before any bootstd test
is run.

Make sure the 'images' parameter is set correctly for fixups.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:13 -06:00
Simon Glass
baf4141079 fdt: Show a message when the working FDT changes
The working FDT is the one which comes from the OS and is fixed up by
U-Boot. When the bootm command runs, it sets up the working FDT to be the
one it is about to pass to the OS, so that fixups can happen.

This seems like an important step, so add a message indicating that the
working FDT has changed. This is shown during the running of the bootm
command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Simon Glass
f337fb9ea8 fs: Quieten down the filesystems more
When looking for a filesystem on a partition we should do so quietly. At
present if the filesystem is very small (e.g. 512 bytes) we get a host of
messages.

Update these to only show when debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Simon Glass
19511935df boot: Correct handling of addresses in boot_relocate_fdt()
This code uses casts between addresses and pointers, so does not work with
sandbox. Update it so we can allow sandbox to do device tree fixups.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Simon Glass
2c0b61d562 bootm: Drop #ifdef from do_bootm()
Drop the #ifdefs from this command by using a variable to hold the states
that should be executed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Simon Glass
f06443f9d5 bootm: Avoid returning error codes from command
Functions which implement commands must return a CMD_RET_... error code.
At present bootm can return a negative errno value in some cases, thus
causing strange behaviour such as trying to exit the shell and printing
usage information.

Fix this by returning the correct value.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Simon Glass
13819f07ea bootm: Change incorrect 'unsupported' error
At present when bootm fails, it says:

    subcommand not supported

and then prints help for the bootm command. This is not very useful, since
generally the error is related to something else, such as fixups failing.
It is quite confusing to see this in a test run.

Change the error and show the error code.

We could update the OS functions to return -ENOSYS when they do not
support the bootm subcommand. But this involves some thought since this is
arch-specific code and proper errno error codes are not always returned.
Also, with the code as is, all required subcommands are of course
supported - a problem would only come if someone added a new one or
removed support for one from an existing OS. Therefore it seems better to
leave that sort of effort for when our bootm tests are improved.

Note: v1 of this patch generated a discussion[1] about printing error
strings automatically using printf(). That is outside the scope of this
patch but will be dealt with separately.

[1] https://patchwork.ozlabs.org/project/uboot/patch/20220909151801.336551-3-sjg@chromium.org/

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Michal Suchanek
e44d7e73fe dm: core: Switch uclass_*_device_err to use uclass_*_device_check
The _err variant iterators use the simple iterators without suffix as
basis.

However, there is no user that uclass_next_device_err for iteration,
many users of uclass_first_device_err use it to get the first and
(assumed) only device of an uclass, and a couple that use
uclass_next_device_err to get the device following a known device in the
uclass list.

While there are some truly singleton device classes in which more than
one device cannot exist these are quite rare, and most classes can have
multiple devices even if it is not the case on the SoC's EVB.

In a later patch the simple iterators will be updated to not stop on
error and return next device instead. With this in many cases the code
that expects the first device or an error if it fails to probe may get
the next device instead. Use the _check iterators as the basis of _err
iterators to preserve the old behavior.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Michal Suchanek
801f71194c dm: core: Switch uclass_foreach_dev_probe to use simple iterator
The return value is not used for anythig, and in a later patch the
behavior of the _err iterator will change in an incompatible way.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update pvblock_probe() to avoid using internal var:
Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Michal Suchanek
7b2aa218c7 mpc83xx: gazerbeam: Update sysinfo_get error handling
In a later patch sysinfo_get will be changed to return the device in cae
of an error. Set sysinfo to NULL on error to preserve previous behavior.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00