Commit graph

14 commits

Author SHA1 Message Date
Stefan Roese
0b2f38fe3c ppc4xx: lwmon5: Only use one CS (rank) in DDR2 configuration
This patch fixes a problem spotted by Mikhail Zolotaryov on Sequoia with
the DDR2 configuration to only use one CS (rank). As this code is most
likely copied from the original Sequoia version, this error was copied
as well.

This patch also removes some dead code.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-03-17 10:52:36 +01:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Stefan Roese
b002144e1d ppc4xx: Fix printf format warnings now visible with the updated format check
This patch fixes ppc4xx related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 09:58:06 +02:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Stefan Roese
135846d6ec ppc4xx: Change ECC initialization on lwmon5 to use clean_dcache_range()
As it seems the "old" ECC initialization routine by using dflush() didn't
write all lines in the dcache back to memory on lwmon5. This could lead
to ECC error upon Linux booting. This patch changes the program_ecc()
routine to now use clean_dcache_range() instead of dflush().
clean_dcache_range() uses dcbst which is exactly what we want in this
case.

Since dflush() is known is cause problems, this routine will be
removed completely and replaced by clean_dcache_range() with an
additional patch.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29 13:36:51 +02:00
Stefan Roese
7e4a0d25ed ppc4xx: Enable ECC on LWMON5
Since all ECC related problems seem to be resolved on LWMON5, this patch
now enables ECC support.

We have to write the ECC bytes by zeroing and flushing in smaller
steps, since the whole 256MByte takes too long for the external
watchdog.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 11:01:49 +01:00
Larry Johnson
ef16fccf96 PPC4xx: Use common code for LWMON5 board SDRAM support
This patch also modifies the functionality of the code so that the data-eye
search is now done with with the cache disabled.

Signed-off-by: Larry Johnson <lrj@acm.org>
2008-01-04 11:37:43 +01:00
Stefan Roese
087dfdb79b ppc4xx: Consolidate some of the 405 and 440 macros/structs into 4xx
This patch moves some common 4xx macros and the PPC405_SYS_INFO/
PPC440_SYS_INFO structure into the common ppc4xx.h header.

Lot's of other macros are good candidates to be consolidated this way
in the future.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:50 +01:00
Kim Phillips
79f240f7ec lib_ppc: make board_add_ram_info weak
platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.

this consequently eliminates CONFIG_ADD_RAM_INFO.

Thanks to Stefan for the hint.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-18 21:39:46 +02:00
Stefan Roese
ea9f6bce38 ppc4xx: Update 440EPx lwmon5 board support
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31 08:37:01 +02:00
Stefan Roese
8848ec858f ppc4xx: Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 10:02:12 +02:00
Stefan Roese
04e6c38b76 ppc4xx: Update lwmon5 board
- Add optional ECC generation routine to preserve existing
  RAM values. This is needed for the Linux log-buffer support
- Add optional DDR2 setup with CL=4
- GPIO50 not used anymore
- Lime register setup added

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-04 10:06:30 +02:00
Wolfgang Denk
83b4cfa3d6 Coding style cleanup. Refresh CHANGELOG. 2007-06-20 18:14:24 +02:00
Stefan Roese
b765ffb773 [ppc4xx] Add initial lwmon5 board support
This patch adds initial support for the Liebherr lwmon5 board euqipped
with an AMCC 440EPx PowerPC.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15 08:18:01 +02:00