Commit graph

17082 commits

Author SHA1 Message Date
Trevor Woerner
1bc5d3a568 drivers/reset/Kconfig: fix typo
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
71f6354b0e rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
18138ab203 rename symbol: CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
bb0fb4c0f4 rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
Have this symbol follow the pattern of all other such symbols.
This patch also removes a TODO from the code.

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
b16a331697 rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
Have this symbol follow the pattern of all other such symbols.
This patch removes a TODO from the code.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Tom Rini
e2b86e23ce - stm32mp1: migrate MTD and DFU configuration in Kconfig
- stm32mp1: add command stm32prog
 - stm32mp1: several board and arch updates
 - stm32mp1: activate data cache in SPL and before relocation
 - Many improvment for AV96 board and DHCOR SoM
   (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
    Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
 - clk: stm32mp1: fix CK_MPU calculation
 - DT alignment of stm32mp1 device tree with Linux 5.7-rc2
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Merge tag 'u-boot-stm32-20200514' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp1: migrate MTD and DFU configuration in Kconfig
- stm32mp1: add command stm32prog
- stm32mp1: several board and arch updates
- stm32mp1: activate data cache in SPL and before relocation
- Many improvment for AV96 board and DHCOR SoM
  (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
   Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
- clk: stm32mp1: fix CK_MPU calculation
- DT alignment of stm32mp1 device tree with Linux 5.7-rc2
2020-05-14 08:44:06 -04:00
Tom Rini
fe16786149 - fix phy configuration for RPi4's bcmgenet
- sync RPi4's env size with other RPi configs
 - add kconfig option to reserver more pages in the EFI mem map
 - add support for SDMA which is used by RPi4
 - fix corner case boot bug for RPi3 32-bit
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Merge tag 'rpi-next-2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi

- fix phy configuration for RPi4's bcmgenet
- sync RPi4's env size with other RPi configs
- add kconfig option to reserver more pages in the EFI mem map
- add support for SDMA which is used by RPi4
- fix corner case boot bug for RPi3 32-bit
2020-05-14 08:43:33 -04:00
Lionel Debieve
36911fca63 clk: stm32mp1: fix CK_MPU calculation
When the CK_MPU used PLL1_MPUDIV, the current rate is
wrong. The clock must use stm32mp1_mpu_div as a shift
value. Fix the check value used to enter PLL_MPUDIV.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
d7244e4a1f mmc: stm32_sdmmc2: change the displayed config name
Change the mmc displayed name in U-Boot for stm32_sdmmc2 driver to
“STM32 SD/MMC”.

This stm32_sdmmc2 driver is for version 2 of the ST HW IP SDMMC but the
displayed name "STM32 SDMMC2" is confusing for user, between the
instance of SDMMC and the device identifier of MMC.

For example on EV1 board, we have:

STM32MP1> mmc list
 STM32 SDMMC2: 0 (SD)
 STM32 SDMMC2: 1 (eMMC)

Changed to more clear:

STM32MP1> mmc list
 STM32 SD/MMC: 0 (SD)
 STM32 SD/MMC: 1 (eMMC)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
f17412ed38 gpio: stm32: support gpio ops in SPL
The GPIO support is needed in SPL to managed the SD cart detect
used on stm32mp157c-ev1 and dk2 board.
So this patch activates the associated code in stm32_gpio.c.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Patrick Delaunay
bcd677f246 usb: gadget: g_dnl: add function g_dnl_set_product
Add a function g_dnl_set_product to change the Product string used in USB
enumeration in any command based on download gadget.

If the function is called with NULL pointer, the product string is set to
the default value (product[] = "USB download gadget").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Marek Vasut
0c27c16495 ram: stm32mp1: Add support for multiple configs
Add support for multiple DRAM configuration subnodes, while retaining
the support for a single flat DRAM configuration node. This is useful
on systems which can be manufactured in multiple configurations and
where the DRAM configuration can be determined at runtime.

The code is augmented by a function which can be overridden on board
level, allowing a match on the configuration node name, very much like
the fitImage configuration node name matching works. The default match
is on the single top-level DRAM configuration, if matching on subnodes
is required, then this board_stm32mp1_ddr_config_name_match() must be
overridden.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
2020-05-14 09:02:12 +02:00
Eugeniy Paltsev
80a7674ef9 CLK: ARC: HSDK: add separate clock map for HSDK-4xD
HSDK and HSDK-4xD clock trees are slightly different.
commit 1dfb2ec0d7 ("ARC: HSDK: CGU: add support for timer clock")
introduce regression for HSDK board cause crash when setting
tunnel clock. Fix that.

Fixes: 1dfb2ec0d7 ("ARC: HSDK: CGU: add support for timer clock")
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13 18:09:27 +03:00
Eugeniy Paltsev
96b2142a54 CLK: ARC: HSDK: define clock map with DT binding constants
Define clock map with DT binding constants so clock map can be
discontinuous.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13 18:09:27 +03:00
Eugeniy Paltsev
c6988688ee CLK: ARC: HSDK: make set_clock optional
We don't want to allow change some clocks, i.e. DDR clock.
So allow to have set_clock to be unset in clock map.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13 18:09:26 +03:00
Eugeniy Paltsev
debfe38445 CLK: ARC: HSDK: prepare for multiple clock maps support
The clock trees of HSDK and HSDK-4xD vary so we need to prepare
CGU driver for multiple clock maps support.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13 18:09:26 +03:00
Eugeniy Paltsev
9b67ebd250 CLK: ARC: HSDK: driver cleanup
Minor code cleanup to improve readability. No functional change intended.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13 18:09:26 +03:00
Eugeniy Paltsev
731f12f382 CLK: ARC: HSDK: use appropriate config data types
* constify clocks config data where is possible
* use more appropriate data types for clocks config

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13 18:09:26 +03:00
Eugeniy Paltsev
5a2706524c CLK: ARC: HSDK: drop unused offset
Drop creg_div_oft offset as it doesn't vary (due to it is used for
CPU PLL only).

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13 18:09:26 +03:00
Eugeniy Paltsev
46d295f362 CLK: ARC: HSDK: avoid code duplication
hsdk_axi_clk_cfg and hsdk_tun_clk_cfg clock divider structures
and functions for their processing are almost the same so
merge them to avoid code duplication.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-05-13 18:09:25 +03:00
Matthias Brugger
7acdc9aa09 mmc: sdhci: Use debug for not supported SDMA info message
If CONFIG_MMC_SDHCI_SDMA is enabled but the HW could not support it,
we no longer error out. Instead we do not enable it in the host.
Change the output from printf to debug as this isn't an error but only
additional information now.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-13 13:54:23 +02:00
Tom Rini
10bca13ea6 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- Two DWC3 fixes
2020-05-12 16:20:10 -04:00
Tom Rini
1e6d9f515d - Enable USB Host for Odroid-C2 board
- Add Open-Drain/Open-Source emulation in GPIO uclass
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Merge tag 'u-boot-amlogic-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Enable USB Host for Odroid-C2 board
- Add Open-Drain/Open-Source emulation in GPIO uclass
2020-05-12 09:23:15 -04:00
Jaehoon Chung
fabb3a43ad mmc: sdhci: not return error when SDMA is not supported
If Host controller doesn't support SDMA, it doesn't need to return
error. Because it can be worked with PIO mode.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-12 11:01:14 +02:00
Jaehoon Chung
fac8bfd4f5 mmc: sdhci: use phys2bus macro when dma address is accessed
Use phys2bus macro when dma address is accessed.
Some targets need to use pyhs2bus macro. (e.g, RPI4)
After applied it, SDMA mode can be used.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-12 11:00:45 +02:00
Simon Glass
0ed0db985a arm: bcm283x: serial: Move ofdata reading to probe() method
We cannot rely on a parent bus that needs to be probed, until we know that
it is probed. That means that code in the ofdata_to_platdata() method
cannot rely on the parent bus being probed.

Move the ofdata code in the two serial drivers into a probe() method.

This fixes serial output on rpi_3b_32b with the following config.txt
options:

   enable_uart=1
   gpu_freq=250

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-12 10:59:12 +02:00
Nicolas Saenz Julienne
57805f2270 net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII
As per Linux's driver, ID_MODE_DIS is only set when the PHY interface is
RGMII. Don't enable it for the rest of setups.

This has been seen to misconfigure RPi4's PHY when booting Linux.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-12 10:59:11 +02:00
Siva Durga Prasad Paladugu
648856ac19 usb: dwc3: Add versal compatibility string to dwc3 glue ids
Xilinx Versal platform uses dwc3 and hence its compatible string
needs to be added to dwc3 glue ids.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-05-12 09:27:14 +02:00
Jagan Teki
73ca0140e1 usb: dwc3: add dis_del_phy_power_chg_quirk
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.

Reference from below Linux commit,

commit <00fe081dc3a3> ("usb: dwc3: add dis_del_phy_power_chg_quirk")

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-12 09:27:14 +02:00
Tom Rini
bb488ac34d Merge tag 'ti-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix boot issues on Nokia RX-51
- Configure AM6 CPSW for 10Mbps in rgmii mode.
- Minor changes for J721e
2020-05-11 12:04:54 -04:00
Tom Rini
1bccb23b7b i.MX for 2020.07
----------------
 
 - i.MX NAND and nandbxb for i.MX8M
 - imx8MM : new beacon devkit
 - imx8MQ : new pico-imx8MQ
 - imx8QXP : extend to enable M4, fixes
 - add thermal support
 - caches in SPL (missing board)
 - Fixes
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011
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Merge tag 'u-boot-imx-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- i.MX NAND and nandbxb for i.MX8M
- imx8MM : new beacon devkit
- imx8MQ : new pico-imx8MQ
- imx8QXP : extend to enable M4, fixes
- add thermal support
- caches in SPL (missing board)
- Fixes

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011
2020-05-11 09:46:43 -04:00
Neil Armstrong
47bd533e9d gpio: emulate open drain & open source in dm_gpio_set_value()
Handle the GPIOD_OPEN_DRAIN & GPIOD_OPEN_SOURCE flags to emulate open drain
and open source by setting the GPIO line as input depending on the
requested value.

The behaviour is taken from the Linux gpiolib.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-11 15:12:53 +02:00
Dario Binacchi
295ab882d9 video: omap: change include order
Apply u-boot coding style on include files order as described by the
wiki https://www.denx.de/wiki/U-Boot/CodingStyle.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-05-11 10:16:49 +05:30
Ye Li
8af1caa237 sf: Add Macronix MX25R6435F SPI NOR flash to flash parameters array
On i.mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters
and IDs to flash parameter array. Otherwise, the flash probe will fails.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-11 01:30:49 +05:30
Dario Binacchi
1fbfe58df6 spi: fix dev parameter in dev_* calls
Probably the non-use of the device parameter by the print routines did
not generate compilation errors.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-05-11 01:30:49 +05:30
Kuldeep Singh
28029c768c spi: nxp-fspi: Use new readl_poll_sleep_timeout API
Board gets reset when performing burst read/write operations. On the
other hand, no such behaviour is observed on small size operations.

In Linux, readl_poll_timeout API already adds delay of 1us which is
further skipped in U-boot. Hence, use new "readl_poll_sleep_timeout" API
which adds delay alongwith timeout functionality.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-05-11 01:30:49 +05:30
Jagan Teki
5a2b6778fa phy: Use _nodev naming convention if non-device clients
Clients that are requesting some of uclass API's
without a device (with ofnode) usually have _nodev
naming convention.

- clk_get_by_index_nodev
- clk_get_by_name_nodev
- reset_get_by_index_nodev
- gpio_request_by_name_nodev

So, update the same naming convention PHY framework.

This doesn't change the existing functionality.

Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-11 01:30:49 +05:30
Jagan Teki
d0847ecc9f spi: Zap lpc32xx_ssp driver-related code
lpc32xx_ssp driver is deprecated, no active updates
and no board user, hence dropped the same.

Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-11 01:30:49 +05:30
Peng Fan
231401de2e imx: imx8qm/imx8qxp: Power down the resources before SPL jump to u-boot
Make sure that all devices that are powered up by SPL are powered down
before entering into the u-boot. Otherwise the subsystem/device will
never be powered down by SCFW, due to SPL and u-boot are in different
partitions.

Benefiting from power domain driver, this patch implements the function
"imx8_power_off_pd_devices" to power off all active devices.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Han Xu
bf9382addf mtd: nand: raw: mxs_nand changes for nandbcb
Add more BCH setting mode and remove the unnecessary platform constrain

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Leonard Crestez
6fcb2ee783 imx8: Replace SC_R_LAST with SC_R_NONE in DTB
We are currently using SC_R_LAST as a marker for imx8 power domain tree
nodes without a resource attached. This value is compiled into dtb as
part of the linux build and used by uboot.

The SC_R_LAST constant changes frequently as SCFW resources are added
(by design) and every time we need to update linux and uboot headers
together or boot can fail.

Fix this by replacing SC_R_LAST usage with a new constant SC_R_NONE
defined to be 0xFFF0.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
1074af51ec power: imx8: Check owned resource in power on
When fspi is assigned to M4, we have to let the fspi probe failed when
its power domain is failed to power up. Because not all devices have power
domain (for example, external devices on the board). Current checking
resource owner in power domain probe is not good, change to check it in
power on.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
e8f8b5ccf2 power: imx8: remove the resource owned check before power off
For all the devices used and set ACTIVE in U-Boot, U-Boot needs
to power off all of them without the check of resource owner.

When we create software partition before booting Linux, the resource
own checkw will return false, and cause the power domain not powered
off. If without the check of resource owner, the power domain in
the other software partition could be powered off with parent
partition could access child partition resources.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
ca0c52710c power: imx8-power-domain: Set DM_FLAG_DEFAULT_PD_CTRL_OFF flag
If without this flag, calling dev_power_domain_ctrl will iteratively remove
the power domain device will causes iteratively power off parent PD. This is
not expected by imx8-power-domain-legacy driver. Power off parent PD is
controlled by the driver internally.

So set DM_FLAG_DEFAULT_PD_CTRL_OFF to avoid such issue

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
8c0a1c6de8 imx8: power: Add PD device lookup interface to power domain uclass
Add power_domain_lookup_name interface to power domain uclass to find
a power domain device by its DTB node name, not using its associated
client device.

Through this interface, we can operate the power domain devices directly.
This is needed for non-DM drivers.

Modified from Ye's NXP downstream patch

only for legacy imx8 power domain driver, since we have not migrated
to use new power domain driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Alice Guo
fe04bcd7e8 nand: enable the Randomizer module for i.mx7 and i.mx8
To enable the Randomizer module, set GPMI_ECCCTRL[RANDOMIZER_ENABLE] to
1, then set GPMI_ECCCOUNT[RANDOMIZER_PAGE] to select randomizer page
number needed to be randomized.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Han Xu
f7bb012ab7 mxs_nand: don't check zero count when ECC reading with randomizer
When enabled randomizer during ECC reading, the controller reported it's
erased page. Checking zero count will cause data get modified to all
0xFF. Stop checking during randomizer to workaround this issue.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
a59691280d MXS_NAND: Add clock support for iMX8
Since iMX8 has enabled clock uclass, we can parse the clocks from DTB
and enable them in GPMI driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
39320e7256 mtd: nand: support GPMI NAND driver for i.MX8
enable the GPMI NAND driver for i.MX8, i.MX8 use similar controller as
i.MX8M

- register definition for i.mx8
- DMA structure must be 32bit address

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Alice Guo
f290fe0a42 nand: mxs_nand: make imx8mm can use hardware BCH and randomizer
imx8mm needs to BCH encode and set NAND page number needed to be
randomized

modify conditional compilation

Use CONFIG_IMX8M, so it apply to imx8mq/mm/mn

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00