Commit graph

66909 commits

Author SHA1 Message Date
Walter Lozano
24968d9e5f drivers: rename more drivers to match compatible string
Continuing with the approach in commit <addf358bac1d2bd0> rename
additional drivers to allow the OF_PLATDATA support.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:51:08 +02:00
Walter Lozano
7142ff9ec2 mmc: fsl_esdhc_imx: add CD support when OF_PLATDATA is enabled
After enabling OF_PLATDATA support to both MMC and GPIO drivers add the
support for card detection.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:50:59 +02:00
Walter Lozano
a2845c9eeb gpio: mxc_gpio: add OF_PLATDATA support
Continuing with the OF_PLATADATA support for iMX6 to reduce SPL
footprint, add it to mxc_gpio. Thanks to this, it will be possible to
enable card detection on MMC driver.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
2020-08-02 14:50:29 +02:00
Walter Lozano
2372177864 mmc: fsl_esdhc_imx: add OF_PLATDATA support
In order to reduce the footprint of SPL by removing dtb and library
overhead, add OF_PLATDATA support to fsl_esdhc_imx. This initial
approach does not support card detection, which will be enabled after
adding OF_PLATDATA support to GPIO.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:28:37 +02:00
Walter Lozano
45154f07f8 mmc: fsl_esdhc_imx: rename driver name to match ll_entry
As discussed in commit <addf358bac1d2bd0> rename fsl_esdhc_imx
driver to allow the OF_PLATDATA support.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-02 14:28:28 +02:00
Dan Murphy
1351e3eb72 dm: Fix build error when OF_CONTROL is not set
With OF_CONTROL disabled the build fails for
include/dm/read.h:932:10: error: ‘ENOTSUPP’ undeclared (first use in this function)
  932 |  return -ENOTSUPP;

Fixes: 45224e8f26 ("dm: core: gracefully handle alias seq without of")
Signed-off-by: Dan Murphy <dmurphy@ti.com>
2020-07-27 21:03:15 +02:00
Fabio Estevam
68a699e1e8 imx8m: soc: Remove unneeded space
Checkpatch reports the following issue:

ERROR: space prohibited before that ',' (ctx:WxW)
#936: FILE: arch/arm/mach-imx/imx8m/soc.c:936:
+		      0, 0 , 0, 0, 0, 0, &res);

Remove the unneeded space.
 		           ^
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-27 14:02:37 +02:00
Fabio Estevam
6cc30b2208 imx8m: ddrphy_utils: Improve coding style
Currently checkpatch is not happy about this file:

total: 14 errors, 2 warnings, 7 checks, 359 lines checked

Improve the coding style so that it can now report:

total: 0 errors, 0 warnings, 6 checks, 360 lines checked

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-27 14:02:28 +02:00
Igor Opaniuk
195011b24d colibri-imx7: fix splash logo drawing
1. Configure white on black for video console.
2. Enable printing bmp logo during late board init stage.
3. Use iomux configuration from device tree.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
816943cfb2 colibri-imx6ull: fix splash screen logo drawing
Configure white on black for video console.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
391c712dde colibri-imx6ull: show boot logo
1. Show boot logo embed in U-Boot blob.
2. Drop iomux configration for LCD, and use the one provided in device
tree.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
a5de86c1db ARM: dts: imx7-colibri: multiple node updates
1. Move u-boot specific nodes to u-boot dts include: legacy lcdif
node and aliases.
2. Add iomux configuration for LCD.
3. Drop un-needed u-boot,dm-pre-reloc for alias node.
4. Fix display-timings, use the one from Toradex downstream kernel [1]

[1]: https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi?h=toradex_4.9-2.3.x-imx#n206
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
d324189772 toradex: common: show boot logo
Add function for showing boot logo, embed into u-boot blob.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:01:32 +02:00
Igor Opaniuk
07e939f0f5 ARM: dts: imx6ull-colibri: move u-boot specific node
1. Move aliases and legacy lcdif node to the u-boot specific dts include.
2. Provide proper display timings, as in the downstream Toradex kernel
[1].

[1]: https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi?h=toradex_4.9-2.3.x-imx#n183
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
306ecc8431 verdin-imx8mm: add EEPROM support for carrier board
Enable these Kconfig symbols:
TDX_CFG_BLOCK_EXTRA=y
TDX_HAVE_EEPROM_EXTRA=y

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
8cc40fa2d3 ARM: dts: imx8mm-verdin: eeprom nodes adjustments
Rename EEPROM nodes.
Create aliases for EEPROM to unify their order:
    eeprom0 - on-module EEPROM
    eeprom1 - carrier-board EEPROM
    eeprom2 - MIPI-DSI to HDMI adapter EEPROM

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
717fa2c819 toradex: tdx-cfg-block: add carrier board info printing
Add carrier board info printing during boot time:

U-Boot 2020.07-rc4-02435-g1756e05 (Jun 22 2020 - 22:43:59 +0300)

CPU:   Freescale i.MX8MMQ rev1.0 at 1200 MHz
....
Carrier: Toradex Verdin Development Board V1.0A, Serial# 10622780
Verdin iMX8MM #

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
db4ab6d453 toradex: tdx-cfg-clock: add migration routine from PID8
Add migration routine from PID8 pre-stored values on EEPROM
(including sane value checks).

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
0c6b5588ef toradex: tdx-cfg-block: add support for EEPROM
This introduces support for EEPROM as a storage for the main Toradex
config block and additional config blocks on extra EEPROM chips (on
carrier board or video adapters).

To enable EEPROM as a storage for the main config block:
TDX_HAVE_EEPROM=y.

For additional EEPROMs please enable this Kconfig symbol:
TDX_CFG_BLOCK_EXTRA=y.

Information about existing EEPROM chips is provided via Device Tree
using aliases.

You can also write configuration for the carrier board using
create_carrier subcommand for cfgblock. Example:

Verdin iMX8MM # cfgblock create_carrier
Supported carrier boards:
UNKNOWN CARRIER                     = [0]
Verdin Carrier Board                = [1]
Choose your carrier board (provide ID): 1
Enter carrier board version (e.g. V1.1B): V1.0A
Enter carrier board serial number: 10622780

Also with barcode:
Verdin iMX8MM # cfgblock create carrier -y 0156100010622780

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
26921f5853 toradex: tdx-cfg-block: add carrier boards and display adapters
Add defines for supported carrier boards and display adapters.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
c2e969378d toradex: tdx-cfg-block: add EEPROM read/store wrappers
These functions wrap functionality for storing config blocks in EEPROM.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Igor Opaniuk
fb99ac9caf imx: mx7: fix DDRC size in A7-M4 mapping table
According to i.MX 7Solo Applications Processor Reference Manual,
2.1.3 Cortex-M4 Memory Map, M4 can address only 1536MB of DDRC
(Start Address: 0x8000_0000; End Address: 0xDFFF_FFFF).
Correct DDRC size to 0x60000000.

Fixes: c0f037f6("mach-imx: bootaux: elf firmware support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-07-27 14:00:36 +02:00
Tom Rini
ada61f1ee2 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fix SiFive HiFive Unleashed board booting failure problem.
- Enable SiFive fu540 PWM driver.
- Support SiFive fu540: SPI boot.
- Update OpenSBI used for RISC-V CI testing.
- Revert "riscv: Allow use of reset drivers".
- Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"".
- sysreset: syscon:
        - Don't assume default value for offset and mask property.
        - Support value property.
- qemu: Add syscon reboot and poweroff support.
- Fix SIFIVE debug serial dependency.
- Fix linking error when building u-boot-spl with no SMP support.
- AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg.
- Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi
- SiFive fu540 avoid using hardcoded ram base and size.
2020-07-24 08:43:08 -04:00
Tom Rini
7208396bbf Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
This reverts commit 5d3a21df66, reversing
changes made to 56d37f1c56.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-24 08:42:06 -04:00
Bin Meng
ecb70bdb9f ram: sifive: Avoid using hardcoded ram base and size
At present the SiFive FU540 RAM driver uses hard-coded memory base
address and size to initialize the DDR controller. This may not be
true when this driver is used on another board based on FU540.

Update the driver to read the memory information from DT and use
that during the initialization.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:56:29 +08:00
Bin Meng
142dd57c5d riscv: dts: hifive-unleashed-a00: Make memory node available to SPL
Make memory node available to SPL in prepration to updates to SiFive
DDR RAM driver to read memory information from DT.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:56:29 +08:00
Rick Chen
e8fa43182a riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg
Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
instead of fdtdec_get_addr. This will increase the compatibility
of dtb parsing.

Signed-off-by: Rick Chen <rick@andestech.com>
Acked-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:56:24 +08:00
Leo Yu-Chi Liang
e491e15a3f riscv: Fix linking error when building u-boot-spl with no SMP support
Switch off SMP support when building u-boot-spl would cause linking error as follow:
undefined reference to 'secondary hart relocate' and 'smp_call_function'.
Add macro to wrap up proper code region that needs SMP configuration on.

Signed-off by: Leo Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:56:13 +08:00
Michal Simek
27b4a4abe6 serial: Fix SIFIVE debug serial dependency
The commit 4cc24aeaf4 ("serial: Add missing Kconfig dependencies for
debug consoles") has added incorrect dependency for SIFIVE debug uart which
should depend on SIFIVE driver instead of PL01x.

Fixes: 4cc24aeaf4 ("serial: Add missing Kconfig dependencies for debug consoles")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2020-07-24 14:56:04 +08:00
Bin Meng
a0cc38ab44 riscv: qemu: Add syscon reboot and poweroff support
This adds syscon reboot and poweroff support to QEMU RISC-V.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:55:55 +08:00
Bin Meng
9cdfade85e sysreset: syscon: Support value property
Per the DT binding, <mask> and <value> property can have either one
or both, and if <value> is missing, <mask> should be used, which is
what current U-Boot sysreset_syscon driver supports.

This adds support to the <value> property to the driver, and <mask>
semantics is updated to really be a mask to the value if both exist.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:55:49 +08:00
Bin Meng
1ce8182b0f sysreset: syscon: Don't assume default value for offset and mask property
Per the DT binding, <offset> is a required property. Let's abort
the probe if it is missing. For the <mask> property, current codes
assume a default value of zero, which is not correct either.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-07-24 14:55:43 +08:00
Bin Meng
265d46ba13 Revert "Revert "riscv: sifive: fu540: Add gpio-restart support""
This reverts commit 23da3c682a.

Now the build failure of sifive_fu540_defconfig board has been fixed,
revert this "revert patch".

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:31 +08:00
Bin Meng
6b62495026 Revert "riscv: Allow use of reset drivers"
This reverts commit 958a3f464c.

A more appropriate change below is already in mainline.
Commit fd31e4fd18 ("riscv: Do not build reset.c if SYSRESET is on")

Revert this patch, so that U-Boot can be built successfully for
SiFive Fu540 board.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:55:31 +08:00
Bin Meng
d20d0a5777 azure: gitlab: travis: Update OpenSBI used for RISC-V testing
Change to use OpenSBI release v0.8 generic platform images for QEMU
RISC-V CI testing for azure, gitlab and travis-ci.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-24 14:55:24 +08:00
Jagan Teki
2270ae6388 sifive: fu540: Enable SF distro bootcmd
Enable SPI flash(SF) distro boot command in Sifive FU540.

This distro boot will read the boot script at specific
location at the flash and start sourcing the same.

Included the SF device at the last of the target devices
list since all the rest of the devices on the list have
more possibility to boot the distribution due to the
size of the SPI flash is concern.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
ca0f93fb74 sifive: fu540: Add boot flash script offset, size
HiFive-Unleashed-A00 has SPI flash with 32MiB size.
So, let's use the script offset at the end of 4K.
This way it cannot overlap any offsets being used
by software components in flash layout.

So, SF distrocmd will pick the script at desired
script address and run.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
662d518e8a sifive: fu540: Mark the default env as SPI flash
Mark the default U-Boot environment as SPI flash since
this is an on board flash device.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
ff7d25e8db env: Enable SPI flash env for SiFive FU540
SPI flash device on HiFive Unleashed has 32MiB Size.

This patch adds SPI flash environment after U-Boot proper
partition with a size of 128KiB.

SPI flash partition layout(32MiB):
    0 - 34	: reserved for GPT header
   35 - 39	: unused
   40 - 2087	: loader1 (SPL, FSBL)
 2088 - 10279	: loader2 (U-Boot proper, U-Boot)
10280 - 10535	: environment
10536 - 65494	: rootfs
65528 - 65536	: distro script

Note: the loader1 must start from 40th sector even though
there are 6 free sectors prior since 40th sector is nearest
flash sector boundary. 

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
4243ff11fe sifive: fu540: Add Booting from SPI
Add booting from SPI for SiFive Unleashed board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Jagan Teki
868e295ef7 sifive: fu540: Add runtime boot mode detection
Add support to detect boot mode at runtime for
SiFive FU540 boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:19 +08:00
Pragnesh Patel
3d5ac3536b riscv: sifive: fu540: Enable SiFive PWM driver
This patch enables SiFive PWM driver for the SiFive
Unleashed board.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-07-24 14:55:11 +08:00
Bin Meng
a0018fc820 riscv: Make SiFive HiFive Unleashed board boot again
Commit 40686c394e ("riscv: Clean up IPI initialization code")
caused U-Boot failed to boot on SiFive HiFive Unleashed board.

The codes inside arch_cpu_init_dm() may call U-Boot timer APIs
before the call to riscv_init_ipi(). At that time the timer register
base (e.g.: the SiFive CLINT device in this case) is unknown yet.

It might be the name riscv_init_ipi() that misleads people to only
consider it is related to IPI, but in fact the timer capability is
provided by the same SiFive CLINT device that provides the IPI.
Timer capability is needed for both UP and SMP.

Considering that the original refactor does have benefits, that it
makes the IPI code more similar to U-Boot initialization idioms.
It also removes some quite ugly macros. Let's do the minimal revert
instead of a complete revert, plus a fixes to arch_cpu_init_dm() to
consider the SPL case.

Fixes: 40686c394e ("riscv: Clean up IPI initialization code")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:55:04 +08:00
Tom Rini
5d3a21df66 binman support for FIT
new UCLASS_SOC
 patman switch 'test' command
 minor fdt fixes
 patman usability improvements
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Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm

binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements
2020-07-23 15:56:06 -04:00
Tom Rini
56d37f1c56 Pull request for UEFI sub-system for efi-2020-10-rc1 (5)
The series provides bug fixes for:
 
 * crash in OS when accessing UEFI variables
 * returning from UEFI fit images to U-Boot
 * error handling for variable services provided by OP-TEE
 * error handling in EFI_FILE_PROTOCOL.Read()
 * missing function documentation
 
 The first patches needed to use intermediate certificates for
 secure boot are added. (The rest of the series requires
 updating sbsigntool in our CI systems.)
 
 Logging is enabled in the bootefi command.
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Merge tag 'efi-2020-10-rc1-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (5)

The series provides bug fixes for:

* crash in OS when accessing UEFI variables
* returning from UEFI fit images to U-Boot
* error handling for variable services provided by OP-TEE
* error handling in EFI_FILE_PROTOCOL.Read()
* missing function documentation

The first patches needed to use intermediate certificates for
secure boot are added. (The rest of the series requires
updating sbsigntool in our CI systems.)

Logging is enabled in the bootefi command.
2020-07-23 08:57:35 -04:00
Tom Rini
95fc1f1647 Merge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- New rk3326 board: Hardkernel Odroid Go2;
- Update board config and dts for RockPI 4/N8/N10;
- Update led boot on support for roc-rk3399-pc;
- Enable SPI Flash suppor for rk3328 rock64 board;
- Update rockchip pcie phy to use generic framework;
2020-07-22 11:30:52 -04:00
Jagan Teki
8bedcf0ef9 rockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUG
Disable ram rockchip debug driver for ROCKPi N8/N10 boards
since we have verified ram in many instances with respective
U-Boot versions.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
318392a745 arm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10
Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able
to boot from eMMC and SDMMC in order.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Jagan Teki
cfcbcb4668 rockchip: rock-pi-n10: Enable PCI/NVME
Enable PCI/NVME for M.2 Slot on RockPI-4 boards.

=> nvme info
Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292
            Type: Hard Disk
            Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00
Suniel Mahesh
60edbfa1da rockchip: rock-pi-n8: Enable on board devices
Enable common on board devices for ROCKPi N8.

- USB 2.0 Host
- USB 2.0 OTG/Gadget
- HDMI Out

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-22 20:55:13 +08:00