Commit graph

219 commits

Author SHA1 Message Date
Marek Vasut
5af6541972 pinctrl: renesas: Fix register usage in sh_pfc_{read,write}
The sh_pfc_{read,write}() must operate on the register address directly
rather than on an offset, fix this to prevent illegal access.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Marek Vasut
bf8d2dab38 pinctrl: renesas: Sync Gen3 PFC tables with Linux v4.17
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Marek Vasut
2e975d8628 pinctrl: renesas: Sync Gen2 PFC tables with Linux v4.17
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 13:36:33 +02:00
Tom Rini
040b2583c3 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-02 16:58:27 -04:00
Marek Vasut
cb13e46aeb pinctrl: renesas: Initial R8A77990 PFC support
This patch adds initial pinctrl driver to support for the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:02 +02:00
Takeshi Kihara
634f9f0d30 pinctrl: renesas: Add PORT_GP_11 helper macro
This follows the style of existion PORT_GP_X macros and
will be used by a follow-up patch for the r8a77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01 09:47:01 +02:00
Konstantin Porotchkin
f5db5979df mvebu: pinctrl: Add SD/eMMC PHY selector to the driver
When the pin control driver selects SD/eMMC function for
a pin group, there is additional configuration to be done
for this case - switch the PHY to work with SDHCI interface.
This patch adds the missing functionality into the pin
control driver.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Evan Wang <xswang@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Evan Wang
f246648d37 mvebu: pinctrl: sync compatible string with Linux 4.17-rc4
For pinctrl driver of mvebu, the compatible strings
supported are defined differently from Linux version.
The patch aligned the compatible string with
Linux 4.17-rc4.

Signed-off-by: Evan Wang <xswang@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Kever Yang
f717b4c8e7 pinctrl: do not set_state for device without valid ofnode
Not all the udevice have a available DT node, eg. rksdmmc@ff500000.blk
which add by mmc_bind(), these device do not have/need set pinctrl
state.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-16 00:25:19 -06:00
Tom Rini
1ccd3f14ca Merge git://git.denx.de/u-boot-uniphier 2018-05-08 13:47:26 -04:00
Neil Armstrong
42de652272 pinctrl: meson: Update pinmux with new Linux bindings
The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13,
update the pinctrl driver to take this in account.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Masahiro Yamada
57a6c1bf87 pinctrl: uniphier: add ethernet TX pin data for LD20
These are necessary to optimize the drive-strength of the pins.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
150997a44b pinctrl: uniphier: support drive-strength configuration
This allows our DT to specify drive-strength property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
603fd9ead6 pinctrl: uniphier: support per-pin configuration via DT
Currently, the UniPhier pinctrl drivers expose only the pin-group
interface to device tree.

Provide .get_pins_count, .get_pin_name, .pinconf_set hooks to support
pin configuration via 'pins' DT property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:15 +09:00
Masahiro Yamada
03cfc80134 pinctrl: uniphier: include <linux/build_bug.h> instead of <linux/bug.h>
The #include <linux/bug.h> is here to use BUILD_BUG_ON_ZERO().

By replacing it with <linux/build_bug.h>, we can reduce the number of
headers pulled in.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:14 +09:00
Masahiro Yamada
7629d0b9bc pinctrl: uniphier: replace printf() with dev_err()
dev_err() is more suitable for printing error messages.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:14 +09:00
Masahiro Yamada
d5c0d9a12a pinctrl: uniphier: remove unneeded pin data of LD6b SoC
Since commit f73cfb4d0d ("pinctrl: uniphier: simplify input enable
and delete pin arrays"), these data are no longer used in any useful
way.  Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-08 10:25:11 +09:00
Masahiro Yamada
8c1de5e08b regmap: clean up regmap allocation
Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members.  There is no good reason to let
regmap_alloc_count() branch by "if (count <= 1)".

As far as I understood the code, regmap->base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.

Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:15:27 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Tom Rini
0e5d3e3111 Merge git://git.denx.de/u-boot-dm 2018-04-01 20:36:39 -04:00
Kever Yang
1e656ad08c pinctrl-uclass: convert to use live dt
Use live dt interface for pinctrl_select_state_full()

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-31 15:59:59 +08:00
Tom Rini
f3b623fa52 Merge git://git.denx.de/u-boot-marvell 2018-03-30 18:18:22 -04:00
Ken Ma
dc36235abe arm64: a37xx: pinctrl: Correct mpp definitions
This patch corrects below mpp definitions:
 - The sdio_sb group is composed of 6 pins and not 5;
 - The rgmii group contains pins mpp2[17:6] and not mpp2[19:6];
 - Pin of group "pmic0" is mpp1[6] but not mpp1[16];
 - Pin of group "pmic1" is mpp1[7] but not mpp1[17];
 - A new group "smi" is added in A0 with 2 pins - mpp2[19:18], its
   bitmask is bit4;
 - Group "pcie1" has 3 pins in A0 - mpp2[5:3], its bit mask is
   bit5 | bit9 | bit10 but not bit4;
 - Group "ptp" has 3 pins in A0 as Z1, but its bitmask is changed to
   bit11 | bit12 | bit13.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43288
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
0237448a71 arm64: a37xx: pinctrl: Fix gpio pin offset in register
For armada_37xx_update_reg(), the parameter offset should be pointer so
that it can be updated, otherwise offset will keep old value, and then
when offset is larger than or equal to 32 the mask calculated by
"BIT(offset)" will be 0 in gpio chip hook functions, it's an error,
this patch set offset parameter of armada_37xx_update_reg() as pointer.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43287
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
23626cac4b arm64: a37xx: pinctrl: Fix the pin 23 on south bridge
Pin 23 on South bridge does not belong to the rgmii group. It belongs to
a separate group which can have 3 functions.

Due to this the fix also have to update the way the functions are
managed. Until now each groups used NB_FUNCS(which was 2) functions. For
the mpp23, 3 functions are available but it is the only group which needs
it, so on the loop involving NB_FUNCS an extra test was added to handle
only the functions added.

The bug was visible when the gpio regulator used the gpio 23, the whole
rgmii group was setup to gpio which broke the Ethernet support on the
Armada 3720 DB board. Thanks to this patch, the UHS SD cards (which need
the vqmmc) _and_ the Ethernet work again.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43284
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
44ac747bdf arm64: a37xx: pinctrl: Fix number of pin in south bridge
On the south bridge we have pin from 0 to 29, so it gives 30 pins (and
not 29).

Reviewed-on: http://vgitil04.il.marvell.com:8080/43285
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Alexander Kochetkov
7a6d7d3e12 rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3188.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Alexander Kochetkov
b1d093d256 rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3036.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Philipp Tomsich
41837e8a6b rockchip: pinctrl: rk3399: add support for I2C[123467]
This adds support for the (to date unsupported) I2C controllers 1~4
and 6~7 (i.e. now all controllers except I2C5, which is not accessible
on the RK3399-Q7, are supported by pinctrl).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Patrick Delaunay
8aeba629cc pinctrl: stm32: update pincontrol for stmp32mp157
- add the 2 new compatible used by STM32MP157
	"st,stm32mp157-pinctrl"
	"st,stm32mp157-z-pinctrl"
- update the mask for the port

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Tom Rini
81f077f40f Merge git://git.denx.de/u-boot-sh 2018-03-05 20:24:17 -05:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Marek Behún
de2069c761 pinctrl: Kconfig: Fix typo
Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-03-05 10:06:05 -05:00
Marek Vasut
d1fe3182fa pinctrl: rmobile: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Tom Rini
f2ee915018 Merge git://git.denx.de/u-boot-rockchip 2018-01-28 13:56:19 -05:00
Alexander Graf
9821636b64 bcm2835_pinctrl: Probe pre-reloc
The serial drivers now depend on the pinctrl driver to determine whether
they are enabled. That means if a serial device wants to be used pre-reloc,
we also need the pinctrl device pre-reloc.

Adapt the pinctrl driver as well as dts overlay accordingly.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
caf2233b28 bcm283x: Add pinctrl driver
The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.

This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.

That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:32 -05:00
David Wu
20ee0fd825 rockchip: pinctrl: Add rk322x gmac pinctrl support
Set gmac pins iomux and rgmii tx pins to 12ma drive-strength,
clean others to 2ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
424324d3ca rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk322x.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
After that, define the uart2 iomux at rk322x-board file.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
dfb886d4f2 rockchip: pinctrl: Add rk3328 gmac pinctrl support
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2
and bit10 at com iomux register. After that, set rgmii m1 tx
pins to 12ma drive-strength, and clean others to 2ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
301fff4e57 rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3328.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
77c4261130 rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driver
If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the
conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h,
and move them into pinctrl-driver.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
Marek Vasut
34e93605ae pinctrl: rmobile: Import R8A7794 E2 PFC tables
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
ab2d09b4be pinctrl: rmobile: Import R8A7792 V2H PFC tables
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
427c75df5a pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tables
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
7547ad4ca0 pinctrl: rmobile: Import R8A7790 H2 PFC tables
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Tom Rini
084edbb689 Merge git://git.denx.de/u-boot-marvell 2018-01-10 08:05:57 -05:00
Patrice Chotard
98693c22d9 pinctrl: stm32: add stm32f4 pinctrl compatible strings
STM32F4 SoCs uses the same pinctrl block as found into
STM32F7 and H7 SoCs.
We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl"
compatible string into pinctrl_stm32.c.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Miquel Raynal
3f3946d30d pinctrl: mvebu: Make drivers depend on the pinctrl framework
Armada pinctrl drivers shall not be compiled without the entire pinctrl
framework and thus lack a "depends on" condition, otherwise the driver
will simply not be probed.

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00