arm64: a37xx: pinctrl: Fix number of pin in south bridge

On the south bridge we have pin from 0 to 29, so it gives 30 pins (and
not 29).

Reviewed-on: http://vgitil04.il.marvell.com:8080/43285
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Ken Ma 2018-03-26 15:55:59 +08:00 committed by Stefan Roese
parent 4382e53e96
commit 44ac747bdf

View file

@ -189,7 +189,7 @@ const struct armada_37xx_pin_data armada_37xx_pin_nb = {
};
const struct armada_37xx_pin_data armada_37xx_pin_sb = {
.nr_pins = 29,
.nr_pins = 30,
.name = "GPIO2",
.groups = armada_37xx_sb_groups,
.ngroups = ARRAY_SIZE(armada_37xx_sb_groups),