Commit graph

273 commits

Author SHA1 Message Date
Joe Hershberger
fcecb4a52c mtd: nand: Check if NAND is locked tight before lock cmds
If the NAND is locked tight, commands such as lock and unlock will not
work, but the NAND chip may not report an error.  Check the lock tight
status before attempting such operations so that an error status can be
reported if we know the operation will not succeed.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2013-02-22 19:06:34 -06:00
Holger Brunck
938187329a kmeter1_nand: allow uasge of NAND_ECC_SOFT_BCH
If CONFIG_NAND_ECC_BCH is set we use 4-bit error corretion code
instead of the 1-bit error correction code on the NAND device
within this driver.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2013-02-15 17:47:20 -06:00
Albert ARIBAUD
449485948e Fix SPL build for non-ARM targets
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-01-09 06:34:40 -07:00
Tom Rini
91c038f087 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-01-08 14:26:42 -07:00
Albert ARIBAUD
79f3877794 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
This required manual merging drivers/mtd/nand/Makefile
and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
2013-01-08 13:15:45 +01:00
Prabhakar Kushwaha
ba427678a4 driver/mtd/IFC:Wait tWB time, poll R/B before command execution
IFC_FIR_OP_CMD0 issues command for execution without checking flash
readiness. It may cause problem if flash is not ready. Instead use
IFC_FIR_OP_CW0 which Wait for tWB time and poll R/B to return high or
time-out, before issuing command.

NAND_CMD_READID command implemention does not fulfill above requirement. So
update its programming.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Hemant Nautiyal <hemant.nautiyal@freescale.com>
2012-12-21 15:34:54 -06:00
Wolfram Sang
0b38fffbe4 mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
It could happen (1 out of 100 times) that NAND did not start up correctly after
warm rebooting, so we end up with various failures or DMA timed out due to a
stalled BCH. When resetting BCH together with GPMI, the issue could not be
observed anymore (after 10000+ reboots). We probably need the consistent state
already before sending commands to NAND. This behaviour was observed in barebox
and kernel, so I assume it affects U-Boot as well. I chose to keep the extra
reset for BCH when changing the flash layout to be on the safe side.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Marek Vasut <marex@denx.de>
2012-12-11 17:19:51 -06:00
Ilya Yanok
5846b11e88 am33xx_spl_bch: simple SPL nand loader for AM33XX
AM33XX with BCH8 can't work with nand_spl_simple correctly
because custom read_page implementation is required for proper
syndrome generation.

This simple driver mostly duplicates nand_spl_simple but has
nand_read_page changed to suit our needs.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Mansoor Ahamed
c3754e9cc2 omap_gpmc: BCH8 support (ELM based)
This patch adds support for BCH8 error correction code to omap_gpmc
driver. We use GPMC to generate codes/syndromes but we need ELM to find
error locations from given syndrome.

Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com>
[ilya: merge it with omap_gpmc driver, some fixes and cleanup]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-12-10 08:54:02 -07:00
Benoît Thébaudeau
3287f6d385 nand: Add torture feature
This patch adds a NAND Flash torture feature, which is useful as a block stress
test to determine if a block is still good and reliable (or should be marked as
bad), e.g. after a write error.

This code is ported from mtd-utils' lib/libmtd.c.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
[scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:29 -06:00
Benoît Thébaudeau
8156f732ee nand: Fix nand_erase_opts() offset check
NAND Flash is erased by blocks, not by pages.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Benoît Thébaudeau
bd74280d62 nand: Clean up nand_util
This patch cleans up nand_util.c:
 - Fix tabs.
 - Fix typos.
 - Remove space character before opening parenthesis in function calls.
 - Fix comments.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Joe Hershberger
c788ecfdc3 nand: Move the sub-page read support enable to a flag
Use a flag instead of a hard-coded macro so that sub-page reads can be
enabled in other cases (such as on-die ecc).

This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2012-11-26 15:41:28 -06:00
Prabhakar Kushwaha
79da5e3d5d driver/mtd:IFC NAND:Initialise internal SRAM before any write
IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for
SRAM i.e. "byte select" is not supported. Hence Read Modify Write is
implemented in IFC for any "system side write" into sram buffer. Reading an
uninitialized memory results in ECC Error from sram wrapper.

Hence we must initialize/prefill SRAM buffer by any data before writing
anything in SRAM from system side. To initialize SRAM user can use "READID"
NAND command with read bytes equal to SRAM size. It will be a one time
activity post boot

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[scottwood@freescale.com: fix fsl_ifc_sram_init prototype]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:28 -06:00
Scott Wood
cb04c77234 nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC drivers
These controllers can only do hardware ECC on full page transfers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-11-26 15:41:27 -06:00
Scott Wood
7d4b79552d spl/nand: config symbol documentation
Document parameters used for specifying the NAND image to be loaded.

Also fix the definition of CONFIG_SPL_NAND_SIMPLE -- it's only
nand_spl_simple.c, not the entire nand directory.  The word "simple" is
there for a reason.  :-)

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: updated for makefile changes earlier in patchset
2012-11-26 15:41:26 -06:00
Scott Wood
6f2f01b9f3 spl/nand: introduce CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC.
Some small SPLs do not use nand_base.c, and a subset of those also
require a special driver.  Some SPLs need software ECC but others can't
fit it.

All existing boards that specify CONFIG_SPL_NAND_SUPPORT have these
symbols added to preserve existing behavior.

Signed-off-by: Scott Wood <scottwood@freescale.com>
--
v2: use positive logic for including bits of NAND, rather than
a MINIMAL symbol that excludes things.
2012-11-26 15:41:25 -06:00
Tom Rini
6acc7c3cbc Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-11-05 07:42:00 -07:00
Kim Phillips
7d2ab9ae4e drivers/mtd/nand: sparse fixes
nand_ecc.c:82:5: warning: symbol 'nand_calculate_ecc' was not declared. Should it be static?
nand_ecc.c:155:5: warning: symbol 'nand_correct_data' was not declared. Should it be static?
nand_base.c:2854:1: error: directive in argument list
nand_base.c:2856:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-11-04 11:00:38 -07:00
Lucas Stach
a833b95039 tegra: nand: make ONFI detection work
Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.

Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Lucas Stach
c0720afbb5 tegra: nand: add board pinmux
Boards may require a different pinmux setup for NAND than the default one.
Add a way to call into board specific code to set this up.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Tom Warren
150c24936b Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Wolfgang Denk
d923a5d59f MPC85xx: remove support for TQM85xx boards
Due to grown code sizes the TQM85xx boards don't build any more with
some older tool chains (like ELDK 4.2).  As these boards have long
reached EOL it seems a waste of effort trying to fix them.  The vendor
has agreed to drop support for them, too.  So let's get rid of them.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
2012-10-05 11:07:42 -07:00
Albert ARIBAUD
1c27059a2f Merge remote-tracking branch 'u-boot/master' 2012-09-30 23:49:17 +02:00
Albert ARIBAUD
fa651cce4f Merge remote-tracking branch 'u-boot-atmel/master' 2012-09-29 08:34:09 +02:00
Tom Rini
495dbd72dd Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-09-21 14:53:13 -07:00
Tom Rini
efa1f43b7d mxc nand: Fix warning on !MXC_NFC_V2_1
In board_nand_init() we only need the 'tmp' variable if MXC_NFC_V2_1 is
defined.

Signed-off-by: Tom Rini <trini@ti.com>
2012-09-18 09:24:22 -07:00
Benoît Thébaudeau
9c60e75e05 mxc nand: Homogenize IP revisions with Linux
Use the same IP revisions as in Linux in order to make the comparison more
clear.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
13927f0733 mtd mxc nand: Merge init functions
Merge mxc_setup_config1() into board_nand_init() in order to ease the addition
of i.MX5 support in the following patches.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
7c28a1cfdf mtd mxc nand: Fix ECC state after read_page_raw_syndrome()
mxc_nand_read_page_raw_syndrome() should reenable ECC upon exit. This fixes ECC
errors left uncorrected after a call to this function.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
0e499b07ef mtd mxc nand: Use _mxc_nand_enable_hwecc()
Use _mxc_nand_enable_hwecc() instead of duplicating its code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:51:45 -05:00
Benoît Thébaudeau
c1db8dd62b mxc nand: Access all ecc_status_result fields
On the NFC IP 1.1, the 32-bit ecc_status_result value comes from 2
consecutive 16-bit registers. This patch reads all the fields of this value,
which makes a difference for 4-kiB NF pages.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Benoît Thébaudeau
365b2c0761 mxc nand: cosmectic: Light cleanup
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Benoît Thébaudeau
80c8ab7b25 mxc nand: Merge mtd and spl register definitions
This patches fixes the TODO to use same register definitions in mtd mxc_nand and
nand_spl fsl nfc drivers.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 19:42:46 -05:00
Marek Vasut
9c790a748f mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver
This is based on Linux kernel -next:

commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b
Author: Brian Norris <computersforpeace@gmail.com>
Date:   Fri Jul 13 09:28:24 2012 -0700

    mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver

    The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It
    silently masks off at least one flag that might be set by the driver
    (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly
    others.

    Really, as long as driver writers exercise a small amount of care with
    NAND_* options, this mask is not necessary at all; it was only here to
    prevent certain options from accidentally being set by the driver. But the
    original thought turns out to be a bad idea occasionally. Thus, kill it.

    Note, this patch fixes some major gpmi-nand breakage.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 18:54:43 -05:00
Joe Hershberger
e70bfa2986 nand: Make NAND lock status compatible with Micron
Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not
the same as others.  Instead of bit 1 being lock, it is #lock_tight.
To make the driver support either format, ignore bit 1 and use only
bit 0 and bit 2.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:43 -05:00
Joe Hershberger
33b1d5cae3 nand: consolidate duplicated constants
NAND_CMD_ constants for lock/unlock should be in the header

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:42 -05:00
Joe Hershberger
e331ab2ee9 nand: Change ulong to loff_t and size_t
Missed in previous cleanup.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:33:42 -05:00
Joe Hershberger
eee623a504 nand: Add support for unlock.invert
NAND unlock command allows an invert bit to be set to unlock all but
the selected page range.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
[scottwood@freescale.com: updated docs and added comment about invert bit]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 17:32:10 -05:00
Matthieu CASTET
d62e9caaaf mtd: support ONFI multi lun NAND
With onfi a flash is organized into one or more logical units (LUNs).
A logical unit (LUN) is the minimum unit that can independently execute
commands and report status.

Mtd does not exploit LUN, so make it see a big single flash where size is
lun_size * number_of_lun.

Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB.

Artem: split long line on 2 shorter ones.

This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux

Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com>
Acked-by: Florian Fainelli <ffainelli@freebox.fr>
Signed-off-by:  Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
[scottwood@freescale.com: picked from Linux into U-Boot]
Reported-by: Rafael Beims <rafael.beims@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-09-17 16:17:28 -05:00
Wu, Josh
b9c83c6815 atmel_nand: fix the U-Boot output information about nand flash with PMECC enable.
Before the patch, it looks like:
	|U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:11:06)
	|
	|CPU: AT91SAM9G35
	|Crystal frequency:       12 MHz
	|CPU clock        :      400 MHz
	|Master clock     :  133.333 MHz
	|DRAM:  128 MiB
	|WARNING: Caches not enabled
>	|NAND:  Initialize PMECC params, cap: 2, sector: 512
>	|256 MiB
	|MMC:   mci: 0
	|In:    serial
	|Out:   serial
	|Err:   serial
	|Net:   macb0
	|Hit any key to stop autoboot:  0

After the patch:
	|U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:18:11)
	|
	|CPU: AT91SAM9G35
	|Crystal frequency:       12 MHz
	|CPU clock        :      400 MHz
	|Master clock     :  133.333 MHz
	|DRAM:  128 MiB
	|WARNING: Caches not enabled
>	|NAND:  256 MiB
	|	... ...
	|Hit any key to stop autoboot:  0

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-13 14:28:13 +02:00
Tom Warren
651eb73224 NAND: MXS: include common.h first so cache.h is included in correct order
With Simon Glass's include/nand.h alignment changes, some mxs builds
were generating errors. Fix is to ensure asm/cache.h is included before
linux/mtd/nand.h. Moving common.h to top of include list does that.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-09-10 15:31:11 -07:00
Jim Lin
312693c3dd tegra: nand: Add Tegra NAND driver
A device tree is used to configure the NAND, including memory
timings and block/pages sizes.

If this node is not present or is disabled, then NAND will not
be initialized.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Simon Glass
b572595ee9 nand: Try to align the default buffers
The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2012-09-07 13:54:30 -07:00
Wu, Josh
bdfd59aa0f at91: atmel_nand: Update driver to support Programmable Multibit ECC controller
The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.

To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.

This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
ae79794e54 at91: atmel_nand: remove unused variables.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Wu, Josh
fe2185ea80 at91: atmel_nand: extract HWECC initialization code into one function: atmel_hw_nand_init_param().
This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01 17:06:14 +02:00
Otavio Salvador
fa7a51cb82 mxs: Convert sys_proto.h prefixes to 'mxs'
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Jeroen Hofstee
d43950463c arm: omap: Fix switching back to nandecc sw.
Orjan Friberg wrote at [1]:

"For the beagleboard, ecc.size is not explicitly set when doing 'nandecc
sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's
set to 256 bytes.

When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when
changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly
the format has changed."

No patch has been submitted and the issue was still present. This patch
adds the mentioned solution. Tested on a tam3517 board.

[1] http://lists.denx.de/pipermail/u-boot/2012-February/119002.html

cc: Orjan Friberg <of@flatfrog.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
2012-09-01 14:58:19 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00