Commit graph

65496 commits

Author SHA1 Message Date
Tom Rini
1e374089bd cubieboard7: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.

While in here, add the doc file to the MAINTAINERS entry.

Cc: Amit Singh Tomar <amittomer25@gmail.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-06-02 17:27:04 -04:00
Tom Rini
e836a71b70 fu540: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.

While in here, add the doc file to the MAINTAINERS entry.

Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02 17:27:04 -04:00
Tom Rini
ee67ec98c8 m68k: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.

While in here, add the doc file to the MAINTAINERS entry for coldfire.

Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02 17:27:04 -04:00
Tom Rini
897135809a arm: ti: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02 17:27:04 -04:00
Tom Rini
358b6f72c2 rockchip: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.

Acked-by: Kever Yang <kever.yang@rock-chips.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-02 17:27:04 -04:00
Tom Rini
0d172d2a0f powerpc: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.

Cc: Po Liu <po.liu@nxp.com>
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02 17:27:04 -04:00
Tom Rini
2b41e19cc5 imx: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.

Cc: Adam Ford <aford173@gmail.com>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02 17:27:04 -04:00
Tom Rini
3fadc9ea2f amlogic: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.

Cc: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Cc: u-boot-amlogic@groups.io
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02 17:27:04 -04:00
Tom Rini
7b4116d449 Azure: Add 'tools-only' build for macOS X hosts
Add building the 'tools-only' target on macOS X 'Catalina'.  Hopefully
this will catch changes to host tools that are incompatible on BSD style
environments.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-02 17:27:04 -04:00
Simon Glass
3172911677 mkimage: Default to adding a crc32 hash with '-f auto'
This option currently does not add any sort of hash to the images in the
FIT.

Add a hash node requesting a crc32 checksum, which at least provides some
protection.

The crc32 value is easily ignored (e.g. in SPL) if not needed. and takes
up only about 48 bytes per image, including overhead.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Denk <wd@denx.de>
2020-06-02 17:27:04 -04:00
Harald Seiler
50bb682c5c tools: fw_env: Fix warning when reading too little
When using CONFIG_ENV_IS_IN_FAT and the config-file specifies a size
larger than what U-Boot wrote into the env-file, a confusing error
message is shown:

    $ fw_printenv
    Read error on /boot/uboot.env: Success

Fix this by showing a different error message when read returns too
little data.

Signed-off-by: Harald Seiler <hws@denx.de>
2020-06-02 13:06:14 -04:00
Christian Gmeiner
95712afc17 image: android: fix abootimg support
abootimg creates images where all load addresses are 0.

 Android Boot Image Info:
* file name = artifacts/fastboot.img
* image size = 31381504 bytes (29.93 MB)
  page size  = 2048 bytes
* Boot Name = ""
* kernel size       = 9397406 bytes (8.96 MB)
  ramdisk size      = 21981144 bytes (20.96 MB)
* load addresses:
  kernel:       0x00000000
  ramdisk:      0x00000000
  tags:         0x00000000

Without this fix we end in a data abort:

Booting kernel at 0x15000000...
*  kernel: cmdline image address = 0x15000000
Kernel load addr 0x00000000 size 9178 KiB
Kernel command line: ip=dhcp console=ttymxc0,115200n8
   kernel data at 0x15000800, len = 0x008f649e (9397406)
*  ramdisk: cmdline image address = 0x15000000
RAM disk load addr 0x00000000 size 21473 KiB
   ramdisk start = 0x158f7000, ramdisk end = 0x16def35c
   kernel loaded at 0x00000000, end = 0x00000000
   Loading Kernel Image
data abort
pc : [<8ff8c004>]	   lr : [<5d7ac70f>]
sp : 8f57ed64  ip : 48f17668	 fp : 00000000
r10: 00000002  r9 : 8f58aed0	 r8 : 03fa4c58
r7 : 5e842497  r6 : fbe73965	 r5 : 7c459955  r4 : df020fde
r3 : 1b7aa45b  r2 : 007f23fe	 r1 : 15104820  r0 : 00104000
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32 (T)
Code: f07c e8b1 51f8 3a20 (e8a0) 51f8
Resetting CPU ...
resetting ...

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2020-06-02 13:06:12 -04:00
Simon Glass
6d39fccc17 dma-mapping: Add header file for ARCH_DMA_MINALIGN
This is defined in the asm/cache.h header file. Update this header file to
include it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2020-06-02 13:06:11 -04:00
Simon Glass
72be237561 usb: ohci: Add header file for ARCH_DMA_MINALIGN
This is defined in the asm/cache.h header file. Update this header file to
include it so it gets the same value consistently across U-Boot.

This fixes 'usb host' on omapl138_lcdk.

Fixes: 90526e9fba ("common: Drop net.h from common header")
Reported-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-06-02 13:06:10 -04:00
Heinrich Schuchardt
371a2e7753 test/py: use actual core count for parallel builds
When building U-Boot we should not blindly use make -j8 but consider the
actual core count given by os.cpu_count().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-06-02 13:06:07 -04:00
Tom Rini
ecd4d99f65 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Corrected some FSP-M/FSP-S settings for Chromebook Coral
- ICH SPI driver and mrccache fixes for obtaining the SPI memory map
- Fixed various warnings generated by latest version IASL when compiling
  ACPI tables
2020-06-01 23:34:18 -04:00
Bin Meng
95cfa1d46c x86: quark: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former. This fixes the following warning
reported by ACPICA 20200430:

  Warning 3073 - Multiple types (Device object requires either a _HID
  or _ADR, but not both)

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02 09:16:13 +08:00
Bin Meng
d8b5f5d436 x86: baytrail: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former. This fixes the following warning
reported by ACPICA 20200430:

  Warning 3073 - Multiple types (Device object requires either a _HID
  or _ADR, but not both)

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02 09:16:13 +08:00
Bin Meng
319506c7a9 x86: baytrail: acpi: Create buffers outside of the methods
Create buffers outside of the methods as ACPICA 20200430 complains
about this:

  Remark 2173 - Creation of named objects within a method is highly
  inefficient, use globals or method local variables instead
  (\_SB.PCI0.LPCB.IURT._CRS)

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-06-02 09:16:13 +08:00
Andy Shevchenko
b9ce32ec3a x86: tangier: acpi: Drop _HID() where enumerated by _ADR()
ACPICA complains that either _HID() or _ADR() should be used.
For General Purpose DMA we may not drop the _ADR() because
the device is enumerated by PCI. Thus, simple drop _HID().

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Andy Shevchenko
10a428ed15 x86: tangier: acpi: Drop _ADR() where _HID() is present
ACPICA complains that either _HID() or _ADR() should be used.
Drop _ADR() where _HID() is present.

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Andy Shevchenko
55f54538f8 x86: tangier: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former.

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Andy Shevchenko
d8177a94ca x86: tangier: acpi: Create buffers outside of the methods
Create buffers outside of the methods as ACPICA 20200214 complains about this:

	Remark 2173 - Creation of named objects within a method is
	highly inefficient, use globals or method local variables
	instead

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
b523c174d6 x86: minnowmax: Add support for Winbond flash
This allows the use of the Dediprog em100pro so I can test SPI flash on
this board in my lab.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
4711c1f548 x86: apl: Add hex offsets for registers in FSP-S
When comparing hex dumps it is useful to see the offsets of the registers.
Add them in where they correspond to a multiple of 16.

Possibly it would be useful to have a a command to output the FSP values
in human-readable form, making use of the fsp_bindings implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
501ba58ae6 x86: coral: Correct some FSP-S settings
Some settings were modified slightly in the device-tree conversion. Return
these to their original values. This includes some audio settings and a
few others that have changed.

Note that we still rely on the FSP defaults for most values, so there is
no need to specify a value if the FSP default is suitable.

This makes WiFi work again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
6e5ac59ec3 x86: apl: Add hex offsets for registers in FSP-M
When comparing hex dumps it is useful to see the offsets of the registers.
Add them in where they correspond to a multiple of 16.

Possibly it would be useful to have a a command to output the FSP values
in human-readable form, making use of the fsp_bindings implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
537558b226 x86: coral: Correct some FSP-M settings
Some settings were modified slightly in the device-tree conversion. Return
these to their original values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
70c3c911cc x86: mrccache: Allow use before driver model is active
The change to avoid searching the device tree does not work on boards
wich don't have driver model set up this early, for example minnowmax.
Put back the old code (converted to livetree) as a fallback for these
devices. Also update the documentation.

This is tested on minnowmax, link, samus and coral.

Fixes: 87f1084a63 (x86: Adjust mrccache_get_region() to use livetree)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-02 09:16:13 +08:00
Simon Glass
d7413deadd x86: spl: Print the error on SPL failure
The error code is often useful to figure out what is going on. Printing it
does not increase code size much, so print out the error and then hang.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Simon Glass
609b90a6a9 x86: spi: Rewrite logic for obtaining the SPI memory map
At present this logic does not work on link and samus, since their SPI
controller is not a PCI device, but a child of the PCH.

Unfortunately, fixing this involves a lot of extra logic. Still, this was
requested in the review of the fix-up patch, so here it is.

Fixes: 92842147c3 ("spi: ich: Add support for get_mmap() method")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
2020-06-02 09:16:13 +08:00
Simon Glass
8e2922e357 x86: spi: Add a way to access the SPI mapping via registers
At present the PCI BDF (bus/device/function) is needed to access the SPI
mapping, since the registers are at BAR0. This doesn't work when PCI
auto-config has not been done yet, since BARs are unassigned.

Add another way to find the mapping, using the MMIO base, if the caller
knows this.

Also add a missing function comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-06-02 09:16:13 +08:00
Tom Rini
b5d54d26ea rpi4:
- set ARCH_FIXUP_FDT_MEMORY
 - bump NR_DRAM_BANKS to four to enable 8 GB of RAM
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl7VGUISHG1icnVnZ2Vy
 QHN1c2UuY29tAAoJEC9tfk32wqh+A5QP/RDucb+CUVDlCFuOnmvN8Oa/oU6NNati
 PMkpo52du7rWf0QdKfg+TnT6Ha1wdFHyRvyO5EB/N71m2tnYc/jjOHumJY3R+Dmw
 a+OZgFMo96B5TSVylwuH4T2vqdeHpVzURxnglmJPrsBDWDraoQK3/5+rrfOzOWsz
 +71f80BY/fxkjikBBYlWVKuiixjyrg0BB3hOIdYlXwPIlggeA6FCWnR6zlc/q9oj
 1nie+azBQpySRsqa1ersUzfjoMHD3kF42ckedpVelAYpASUvMx6KrhXmzhxWrbx4
 1PVbYTWY44SWa6cjVNxp94fdoQU2wri5qetfqnCAvVe48kFZKdE+8A2MSj7o83dt
 ekOdZYApqFSWnCE+iMujR6ZilyzPLAlky7XTtvOQBtSykrDNSBThcMgbl3YaTI17
 oy2zajxrBJ1lBn9U6zI/DdU0rbvqJuOhhMWzZeo2SiAa8XUC76KXbI0G8G33RQt5
 SlH77J0fDc1y3V8GsoatXBlThvH+LHr5YpZedO22n0jWARYQNrHxbZLJujggmJWs
 av7w7UbmUZo9YWUFx07bb4ay0u3LdQQpURB/LCP29I719rvqGwtRYw/h52OkmFfV
 1M6+zMLx4GMRjKZOrdLIerRuSaGLYXi2IAX405vppFaHrbsDynjhrbv+TTcmi0M1
 OmjJQv0fBaK4
 =uKBu
 -----END PGP SIGNATURE-----

Merge tag 'rpi-next-2020.07.2' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi

rpi4:
- set ARCH_FIXUP_FDT_MEMORY
- bump NR_DRAM_BANKS to four to enable 8 GB of RAM
2020-06-01 11:42:47 -04:00
Tom Rini
42c8a112d2 - stm32mp15: fix DT on DHCOR SOM and avenger96 board
- stm32mp15: re-enable KS8851 on DHCOM
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE56Yx6b9SnloYCWtD4rK92eCqk3UFAl7PYbcACgkQ4rK92eCq
 k3VaNAf6A5n4YBvwG6dPtZXdzUA/+dndv2iqF3Zkx+fWqgOJTLn87D/rB+BybHWV
 6JNTjEc8oc+FFF0n9Wx2soMvwIDKhqoGqx2C7dzuVkodQVQkQaSP+UU/FDoLfgLG
 J9DW0iRY36yUKl1ZsbsVuiCxcy54/nQpxbvjCtvRAz7GH45U77fD0aYIFJYQf9Nn
 1G/yISoDCac2UziizGL4VURNAG3cARmsNP2xZjW+V8Y8cHgDWauEaBMK+/snee5O
 DpsZox8WqfdMdRKs/mBwxi+3tU2qAx/GoH03d48aAL8NnkIyXxgoOdhcuDv4EF1b
 9vGO1DaMP4h6/0SggD00u0+uKO6mqw==
 =xiEp
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20200528' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp15: fix DT on DHCOR SOM and avenger96 board
- stm32mp15: re-enable KS8851 on DHCOM
2020-06-01 11:42:22 -04:00
Tom Rini
9452b7496f Merge tag 'u-boot-rockchip-20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix mmc of path after syncfrom kernel dts;
- Add dwc3 host support with DM for rk3399;
- Add usb2phy and typec phy for rockchip platform;
- Migrate board list doc to rockchip.rst;
- Add rk3399 Pinebook Pro board support;
- Update dram_init in board_init and add memory node in SPL;
2020-05-31 20:07:39 -04:00
Heiko Stuebner
a343b4fe73 spl: add fixed memory node in target fdt also when loading ATF
In a loading chain SPL -> ATF (->OP-TEE) -> U-Boot, ATF and a subsequent
OP-TEE will re-use the same fdt as the U-Boot target and may need the
information about usable memory ranges.

Especially OP-TEE needs this to initialize dynamic shared memory
(the only type U-Boot implements when talking to OP-TEE).

So allow spl_fixup_fdt() to take a fdt_blob argument, falling back to
the existing CONFIG_SYS_SPL_ARGS_ADDR if needed and call it from the
ATF path as well.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2020-05-31 22:22:07 +08:00
Heiko Stuebner
b6740fb116 rockchip: spl: do full dram_init instead of only probing
Parts of later SPL may need RAM information as well, so do full
dram_init() call, which includes the existing dram probing but also
initializes the ram information in gd.

dram_init() from sdram.c does the following steps:
- uclass_get_device(UCLASS_RAM, ...) like the current code
- ret = ram_get_info(dev, &ram);
- gd->ram_size = ram.size;

CONFIG_SPL_RAM already makes sure that sdram.c gets compiled
and thus no other variant of dram_init() can exist.

So it's the same functionality as before and only adds that the
SPL now aquires knowledge about the amount of available ram,
which it didn't know about before.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 22:22:07 +08:00
Peter Robinson
9fb8e24804 rockchip: Add initial support for the Pinebook Pro laptop from Pine64.
Specification:
- Rockchip RK3399
- 4GB Dual-Channel LPDDR4
- eMMC socket
- mSD card slot
- 128Mbit (16Mb) SPI Flash
- AP6256 for 11AC WiFi + BT5
- 14 inch 1920*1080 eDP MiPi display
- Camera
- USB 3.0, 2.0 ports
- Type-C port with alt-mode display (DP 1.2) and 15W charge
- DC 5V/3A
- optional PCIe slot for NVMe SSD drive

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 22:22:07 +08:00
Peter Robinson
7390fb9999 arm: dts: rockchip: Add initial DT for Pinebook Pro
Sync initial support for Pinebook Pro device tree from Linux 5.7-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-31 20:46:08 +08:00
Peter Robinson
5b13c1030d dt-bindings: input: adopt Linux gpio-keys binding constants
Sync the gpio-keys input bindings from linux 5.7-rc1.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2020-05-31 20:44:23 +08:00
Tom Rini
d09b832cd8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- r2dplus fixes
2020-05-30 20:11:38 -04:00
Tom Rini
8309157ff1 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- ehci-mx6, eth/r8152 bugfixes
2020-05-30 20:11:06 -04:00
Matthias Brugger
a61cf765f7 configs: rpi: set NR_DRAM_BANKS to four
With the new RPi4 which has 8 GB of RAM, we can have up to four DRAM
banks. Bump up the configuration files to detect all the memory in
U-Boot.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-30 23:05:47 +02:00
Corentin Labbe
5c7f5c5b00 rpi_4_defconfig: add missing CONFIG_ARCH_FIXUP_FDT_MEMORY
As discussed at https://lore.kernel.org/linux-arm-kernel/b726290c-1038-3771-5187-6ac370bc92c9@arm.com/T/
the defconfig for rpi4 miss CONFIG_ARCH_FIXUP_FDT_MEMORY.
Without it, booting with an initrd fail.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-05-30 23:05:47 +02:00
Tom Rini
a08e0a28eb Patman changelog enhancements
Sandbox SPI flash doc update
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl7SeBgRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIrebJlAgAuua9QFPrpg19wj30kARugWjWSJ5fCMwF
 4KCjizVhUMGPCxfJENSS4LKq67CK1wX2AEhdfl4jByckkPsZnsfQljOKyvV7ao25
 fWbCdVbe4LZazU4MaviXc9vYPifxHoxsq2Yy4ijM3CQTd67zEYhVGwhW1LHGvyOk
 NJ0hqlvaju8J69I27q340KA6lhCtblvDa5nvNQN5e8KR1D0RejqFIn0p5uZ1c8gh
 gr3Od+wGNwHu1JepjF6Bx+6lkn4lpbEcbceP+TEdPoT+TQnPR8J3jfRVl2zFwCPQ
 pobVYYf7Yv6sfZNXUbWZ8ynEtqEqM03Pk3C7//IkpWy7cl5iCrZTTw==
 =IQWc
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-30may20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

Patman changelog enhancements
Sandbox SPI flash doc update
2020-05-30 11:37:32 -04:00
Tom Rini
29b0540d5a Merge tag 'bugfixes-for-v2020.07-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for v2020.07-rc4
- fix eeprom issue with AT24MAC402 (address != 0)
- fix in i2c-uclass.c when compiling compiling with -Wtype-limits
- designware_i2c: small fixes:
  - check if the device is powered
  - tidy up use of NULL priv
2020-05-29 23:54:01 -04:00
Sean Anderson
dc03ba48be patman: Modify functional tests for new behavior
This patch adds or modifies functional tests for the Cover-changes,
Commit-changes, and Series-process-log tags in order to account for new
behavior added in the previous few patches. The '(no changes since v1)'
case is not tested for, since that would need an additional commit to test
in addition to testing the existing code paths.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Sean Anderson
0411fff36f patman: Support multi-line changes in changelogs
This patch adds support to multi-line changes. That is, if one has a line
in a changelog like
- Do a thing but
  it spans multiple lines
Using Series-process-log sort would sort as if those lines were unrelated.
With this patch, any change line starting with whitespace will be
considered part of the change before it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Sean Anderson
6949f70c6d patman: Add new tags for finer-grained changelog control
By default patman generates a combined changelog for the cover letter. This
may not always be desirable.

Many patches may have the same changes. These can be coalesced with
"Series-process-log: uniq", but this is imperfect. Similar changes like
"Move foo to patch 7" will not be merged with the similar "Move foo to this
patch from patch 6".

Changes may not make sense outside of the patch they are written for. For
example, a change line of "Add check for bar" does not make sense outside
of the context in which bar might be checked for. Some changes like "New"
or "Lint" may be repeated many times throughout different change logs, but
carry no useful information in a summary.

Lastly, I like to summarize the broad strokes of the changes I have made in
the cover letter, while documenting all the details in the appropriate
patches. I think this makes it easier to get a good feel for what has
changed, without making it difficult to wade through every change in the
whole series.

This patch adds two new tags to add changelog entries which only appear in
the cover letter, or only appear in the commit. Changes documented with
"Commit-changes" will only appear in the commit, and will not appear in the
cover letter. Changes documented with "Cover-changes" will not appear in
any commit, and will only appear in the cover letter.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00
Sean Anderson
b0436b9404 patman: Suppress empty changelog entries
Patman outputs a line for every edition of the series in every patch,
regardless of whether any changes were made. This can result in many
redundant lines in patch changelogs, especially when a patch did not exist
before a certain revision. For example, the existing behaviour could result
in a changelog of

Changes in v7: None
Changes in v6: None
Changes in v5:
- Make a change

Changes in v4: None

Changes in v3:
- New

Changes in v2: None

With this patch applied and with --no-empty-changes, the same patch would
look like

(no changes since v5)

Changes in v5:
- Make a change

Changes in v3:
- New

This is entirely aesthetic, but I think it reduces clutter, especially for
patches added later on in a series.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-05-29 20:55:45 -06:00