Commit graph

5703 commits

Author SHA1 Message Date
Oleksandr Tymoshenko
6e9e06260d usb: dwc2: Add driver for Synopsis DWC2 USB IP block
This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.

This code has three checkpatch warnings, but to make sure it stays at least
readable and clear, these are not fixed. These bugs are in the USB request
handling combinatorial logic, so any abstracting of those is out of question.

Tested on DENX MCV (Altera SoCFPGA 5CSFXC6C6U23C8N) and RPi B+ (BCM2835).

Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Vince Bridgers <vbridger@altera.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-10-22 22:01:58 +02:00
Alexandre Courbot
a7f2472224 net: asix: Add support for AX88772B
This USB device works as-is on this driver.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2014-10-22 22:01:58 +02:00
Simon Glass
8a9cd5ad6f dm: serial: Support driver model in pl01x driver
Add driver model support in this driver, using platform data provided by
the board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2014-10-22 10:36:57 -06:00
Simon Glass
aed2fbef5e dm: serial: Tidy up the pl01x driver
Adjust the driver so that leaf functions take a pointer to the serial port
register base. Put all the global configuration in the init function, and
use the same settings from then on.

This makes it much easier to move to driver model without duplicating the
code, since with driver model we use platform data rather than global
settings.

The driver is compiled with either the CONFIG_PL010_SERIAL or
CONFIG_PL011_SERIAL option and this determines the uart type. With driver
model this needs to come in from platform data, so create a new
CONFIG_PL01X_SERIAL config which brings in the driver, and adjust the
driver to support both peripheral variants.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2014-10-22 10:36:57 -06:00
Simon Glass
41e98e011d dm: rpi: Convert GPIO driver to driver model
Convert the BCM2835 GPIO driver to use driver model, and switch over
Raspberry Pi to use this, since it is the only board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2014-10-22 10:36:57 -06:00
Simon Glass
da802b9e27 dm: core: Add support for simple-bus
Add a driver for the simple-bus nodes, which allows devices within these
nodes to be bound.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:56 -06:00
Simon Glass
a8ba569cba dm: imx: serial: Support driver model in the MXC serial driver
Add driver model support with this driver. Boards which use this driver
should define platform data in their board files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:56 -06:00
Simon Glass
441d0cfff1 dm: imx: gpio: Support driver model in MXC gpio driver
Add driver model support with this driver. In this case the platform data
is in the driver. It would be better to put this into an SOC-specific file,
but this is best attempted when more boards are moved over to use driver
model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2014-10-22 10:36:56 -06:00
Simon Glass
b8893327e9 dm: serial: Put common code into separate functions
Avoid duplicating the code which deals with getc() and putc(). It is fairly
simple, but may expand later.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:54 -06:00
Simon Glass
ea0ebc8662 dm: exynos: cros_ec: Move cros_ec_spi to driver model
Adjust this driver to use driver model and move smdk5420 boards over to
use it.

Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:53 -06:00
Simon Glass
be995a8545 dm: sandbox: cros_ec: Move sandbox cros_ec to driver module
Adjust the sandbox cros_ec emulation driver to work with driver model, and
switch over to driver model for sandbox cros_ec.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:53 -06:00
Simon Glass
84d6cbd302 dm: cros_ec: Add support for driver model
Add support for driver model if enabled. This involves minimal changes
to the code, mostly just plumbing around the edges.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:53 -06:00
Simon Glass
fda6fac39b dm: tegra: spi: Convert to driver model
This converts the Tegra SPI drivers to use driver model. This is tested
on:

- Tegra20 - trimslice
- Tegra30 - beaver
- Tegra124 - dalmore

(not tested on Tegra124)

Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:52 -06:00
Simon Glass
b6c2956def dm: sf: sandbox: Convert SPI flash driver to driver model
Convert sandbox's spi flash emulation driver to use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:51 -06:00
Simon Glass
fbb099183e dm: Convert spi_flash_probe() and 'sf probe' to use driver model
We want the SPI flash probing feature to operate as a standard driver.
Add a driver for the basic probing feature used by most boards. This
will be activated by device_probe() as with any other driver.

The 'sf probe' command currently keeps track of the SPI slave that it
last used. This doesn't work with driver model, since some other driver
or system may have probed the device and have access to it too. On the
other hand, if we try to probe a device twice the second probe is a nop
with driver model.

Fix this by searching for the matching device, removing it, and then
probing it again. This should work as expected regardless of other device
activity.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:50 -06:00
Simon Glass
4c2dbefde5 dm: sf: Add a uclass for SPI flash
Add a driver model uclass for SPI flash which supports the common
operations (read, write, erase). Since we must keep support for the
non-dm interface, some modification of the spi_flash header is required.

CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:50 -06:00
Simon Glass
ae242cbfd0 spi: Use error return value in sf_ops
Adjust spi_flash_probe_slave() to return an error value instead of a
pointer so we get the correct error return.

Have the caller allocate memory for spi_flash to simplify error handling,
and also so that driver model can use its existing allocated memory.

Add a spi.h include in the sf_params file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:50 -06:00
Simon Glass
ff0960f9a0 sf: Tidy up public and private header files
Since spi_flash.h is supposed to be the public API for SPI flash, move
private things to sf_internal.h. Also tidy up a few comment nits.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:50 -06:00
Simon Glass
73186c9460 dm: exynos: Convert SPI to driver model
Move the exynos SPI driver over to driver model. This removes quite a bit
of boilerplate from the driver, although it adds some for driver model.

A few device tree additions are needed to make the SPI flash available.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:49 -06:00
Simon Glass
623b638607 dm: spi: Add soft_spi implementation
Add a new implementation of soft_spi that uses device tree to specify the
GPIOs. This will replace soft_spi_legacy for boards which use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:48 -06:00
Simon Glass
44ba6b0ecc dm: spi: Remove SPI_INIT feature
This feature provides for init of a single SPI port for the soft SPI
feature. It is not really compatible with driver model since it assumes a
single SPI port. Also, inserting SPI init into the driver by means of
a #define is not very nice.

This feature is not used by any active boards, so let's remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:48 -06:00
Simon Glass
a666f39e4e dm: spi: Rename soft_spi.c to soft_spi_legacy.c
Reserve the 'normal' name for use by driver model, and rename the old
driver so that it is clear that it is for 'legacy' drivers only.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:48 -06:00
Simon Glass
49b5d6e6e2 dm: sandbox: spi: Move to driver model
Adjust the sandbox SPI driver to support driver model and move sandbox over
to driver model for SPI.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:48 -06:00
Simon Glass
843c9e8796 dm: Add spi.h header to a few files
Some files are using SPI functions but not explitly including the SPI
header file. Fix this, since driver model needs it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:47 -06:00
Simon Glass
c60e1f2547 dm: sandbox: Add a SPI emulation uclass
U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.

Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an emulation, and it should be
possible to add more than one emulation - not just SPI flash.

Add a SPI emulation uclass so that other emulations can be plugged in to
support different types of emulated devices on difference buses/chip
selects.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:46 -06:00
Simon Glass
d7af6a4851 dm: spi: Add a uclass for SPI
Add a uclass which provides access to SPI buses and includes operations
required by SPI.

For a time driver model will need to co-exist with the legacy SPI interface
so some parts of the header file are changed depending on which is in use.
The exports are adjusted also since some functions are not available with
driver model.

Boards must define CONFIG_DM_SPI to use driver model for SPI.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
(Discussed some follow-up comments which will address in future add-ons)
2014-10-22 10:36:46 -06:00
Simon Glass
accd4b19b3 dm: core: Allow parents to pass data to children during probe
Buses sometimes want to pass data to their children when they are probed.
For example, a SPI bus may want to tell the slave device about the chip
select it is connected to.

Add a new function to permit the parent data to be supplied to the child.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:46 -06:00
Simon Glass
a8981d4f80 dm: core: Add functions for iterating through device children
Buses need to iterate through their children in some situations. Add a few
functions to make this easy.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:45 -06:00
Simon Glass
73e256c2ac dm: exynos: Move serial to driver model
Change the Exynos serial driver to work with driver model and switch over
all relevant boards to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:45 -06:00
Simon Glass
b8809e60cd dm: exynos: gpio: Convert to driver model
Convert the exynos GPIO driver to driver model. This implements the generic
GPIO interface but not the extra Exynos-specific functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:36 -06:00
Simon Glass
7f1961018c dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.

(Note that the soft SPI part of universal is omitted, since this driver
is about to be replaced with a driver-model-aware version)

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:33 -06:00
Simon Glass
3a233dbfe9 dm: exynos: Tidy up GPIO defines
The defines at the top of the GPIO driver use single-character names for
parameters which are not very descriptive.

Improve these to use descriptive parameter names.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:21 -06:00
Simon Glass
903fd79564 dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare
the generic GPIO interface in each GPIO header.

Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:18 -06:00
Masahiro Yamada
2cede453da dm: simplify the loop in lists_driver_lookup_name()
if (strncmp(name, entry->name, len))
                continue;

        /* Full match */
        if (len == strlen(entry->name))
                return entry;

is equivalent to:

        if (!strcmp(name, entry->name))
                return entry;

The latter is simpler.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2014-10-22 10:32:16 -06:00
Masahiro Yamada
29a1bedbf3 dm: do not check the existence of uclass operation
The function uclass_add() checks uc_drv->ops as follows:

        if (uc_drv->ops) {
                dm_warn("No ops for uclass id %d\n", id);
                return -EINVAL;
        }

It seems odd because it warns "No ops" when uc_drv->ops has
non-NULL pointer.  (Looks opposite.)

Anyway, most of UCLASS_DRIVER entries have no .ops member.
This check makes no sense.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:32:16 -06:00
Marcel Ziswiler
1c1786d4c5 tegra: gpio: fix null label regression
Fix Tegra GPIO driver to not crash resp. misbehave upon requesting
GPIOs with an empty aka NULL label. As the driver uses exclusively the
label to check for reservation status actually supplying one is
mandatory!

This fixes a regression introduced by commit:

2fccd2d96b
tegra: Convert tegra GPIO driver to use driver model

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-10-22 09:30:55 -07:00
Marcel Ziswiler
09fb73611f mmc: Tegra: Fix timeout issue seen on certain eMMC parts
During rigorous testing of our latest update infrastructure I came
across quite consistent timeouts on certain eMMC parts (e.g. Hynix
H26M21001ECR) when writing big (e.g. in excess of 400 MB) file system
images:

MMC write: dev # 0, block # 40960, count 944128 ...
 mmc_send_cmd_bounced: MMC Timeout
    Interrupt status        0x00000001
    Interrupt status enable 0xdfff003b
    Interrupt signal enable 0xdfff0002
    Present status          0x01870106
mmc write failed

Comparing the various data sheets I came across the following timeout
specification:

Secure Erase/TRIM Timeout=300ms*2*10=6000ms

Unfortunately empirical testing still failed albeit much more rarely.
Increasing the timeout to 8000ms made it finally disappear entirely.
This patch allows us writing various eMMC parts without seeing any
further issues.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-10-22 09:30:54 -07:00
Eric Nelson
3acb011c3c ARM: i.MX: provide declaration for board_spi_cs_gpio
Provide a public declaration of the board_spi_cs_gpio()
callback for i.MX SPI chip selects to prevent the warning
"Should it be static?" when compiling with "make C=1".

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-21 10:47:14 +02:00
Tom Rini
a84c8107d9 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2014-10-20 18:17:26 -04:00
Ruchika Gupta
c5de15cbc8 crypto/fsl: Add command for encapsulating/decapsulating blobs
Freescale's SEC block has built-in Blob Protocol which provides
a method for protecting user-defined data across system power
cycles. SEC block protects data in a data structure called a Blob,
which provides both confidentiality and integrity protection.

Encapsulating data as a blob
Each time that the Blob Protocol is used to protect data, a
different randomly generated key is used to encrypt the data.
This random key is itself encrypted using a key which is derived
from SoC's non volatile secret key and a 16 bit Key identifier.
The resulting encrypted key along with encrypted data is called a blob.
The non volatile secure key is available for use only during secure boot.

During decapsulation, the reverse process is performed to get back
the original data.

Commands added
--------------
    blob enc - encapsulating data as a cryptgraphic blob
    blob dec - decapsulating cryptgraphic blob to get the data

Commands Syntax
---------------
	blob enc src dst len km

	Encapsulate and create blob of data $len bytes long
	at address $src and store the result at address $dst.
	$km is the 16 byte key modifier is also required for
	generation/use as key for cryptographic operation. Key
	modifier should be 16 byte long.

	blob dec src dst len km

	Decapsulate the  blob of data at address $src and
	store result of $len byte at addr $dst.
	$km is the 16 byte key modifier is also required for
	generation/use as key for cryptographic operation. Key
	modifier should be 16 byte long.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:20:40 -07:00
Ruchika Gupta
b9eebfade9 fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-10-16 14:17:07 -07:00
Jeroen Hofstee
3e780af127 video: ipu_disp: remove pixclk fixup
The ipu display insists on having a lower_margin smaller
then 2. If this is not the case it will attempt to force
it and adjust the pixclk accordingly. This multiplies pixclk
in Hz with the width and height, since this is typically
a * 10^7 * b * 10^2 * c * 10^2 this will overflow the
uint_32 and make things even worse. Since this is a
bootloader and the adjustment is neglectible, just force
it to two and warn about it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-16 11:00:26 +02:00
Jeroen Hofstee
c1420328dc video: ipu: fix debug and comment
- fix debug pixel clk display and add unit
- fix some comments

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-16 10:58:34 +02:00
Hans de Goede
74bf7961a0 sunxi: axp152: dcdc3 scale is 50mV / step not 25mV / step
Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
error introduced when adding the axp152_mvolt_to_target during review of the
axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.

This commit fixes this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-13 09:02:01 -04:00
Tom Rini
e89d623f09 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-10-10 20:59:28 -04:00
Albert ARIBAUD
790af81543 Merge branch 'u-boot/master' into 'u-boot-arm/master' 2014-10-11 01:20:30 +02:00
Andreas Bießmann
476095772f macb: simplify gmac initialisation
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Bo Shen <voice.shen@atmel.com>
2014-10-10 21:51:15 +02:00
Hans de Goede
4a74298c54 serial-uclass: Fix compilation error
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-10 12:37:59 -04:00
Tom Rini
db67801bf9 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2014-10-10 09:45:16 -04:00
Roger Quadros
02590aa31c ahci: Don't start command DMA engine before buffers are set
The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)

This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x358()
44000000.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in User mode during Functional access

Signed-off-by: Roger Quadros <rogerq@ti.com>
2014-10-10 09:44:41 -04:00
Albert ARIBAUD
ebf8644a11 Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2014-10-10 08:56:01 +02:00
Masahiro Yamada
ed3c980bee mtd: denali: support NAND_CMD_RNDOUT command
The function nand_flash_detect_ext_param_page() requires
NAND_CMD_RNDOUT command supported.  It is necessary to detect some
types of ONFi-compliant devices.  Without it, the error message
"unsupported command received 0x5" is shown.

Let's support this command on the Denali NAND controller driver.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Chin Liang See <clsee@altera.com>
2014-10-09 17:33:26 -05:00
Masahiro Yamada
05968e7cfd mtd: denali: fix NAND_CMD_PARAM command
NAND_CMD_PARAM (0xEC) command is not working on the Denali
NAND controller driver.

Unlike NAND_CMD_READID (0x90), when the NAND_CMD_PARAM command
is followed by an address cycle, the target device goes busy.
(R/B# is deasserted)
Wait until the parameter data are ready.

In addition, unnecessary clear_interrupts() should be removed.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Chin Liang See <clsee@altera.com>
2014-10-09 17:33:24 -05:00
Albert ARIBAUD
4b19b7448e Merge remote-tracking branch 'u-boot-imx/master'
The single file conflict below is actually trivial.

Conflicts:
	board/boundary/nitrogen6x/nitrogen6x.c
2014-10-08 21:20:49 +02:00
Simon Glass
311757be27 samsung: Enable device tree for s5p_goni
Change this board to add a device tree.

This also adds a pinmux header file although it is not used as yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-10-08 17:25:47 +09:00
Simon Glass
5b9c8cb6cb cros_ec: exynos: Use the correct tps65090 driver in each case
Exynos 5250 boards (snow, spring) use the I2C driver but Exynos 5420 boards
cannot due to a hardware design decision. Select the correct driver to use
in each case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-10-08 17:25:47 +09:00
Simon Glass
2c94611d5f cros_ec: power: Add a tunnelled version of the tps65090 driver
Unfortunately on Pit the AP has no direct access to the tps65090 but must
talk through the EC (over SPI) to the EC's I2C bus.

When driver model supports PMICs this will be relatively easy. In the
meantime the best approach is to duplicate the driver. It will be refactored
once driver model support is expanded.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-10-08 17:25:46 +09:00
Tom Rini
dd0204e48d Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-10-07 07:38:39 -04:00
Tom Rini
8a6b088aff Merge branch 'master' of git://git.denx.de/u-boot-usb 2014-10-06 15:49:50 -04:00
Tom Rini
04de09f89b Merge branch 'topic/arm/socfpga-20141006' of git://git.denx.de/u-boot-socfpga
Fix a trivial conflict in dw_mmc.c after talking with Marek.

Conflicts:
	drivers/mmc/dw_mmc.c

Signed-off-by: Tom Rini <trini@ti.com>
2014-10-06 15:17:13 -04:00
Eric Nelson
e2140588dd usb: gadget: fastboot: terminate commands with NULL
Without NULL termination, various commands will read past the
end of input. In particular, this was noticed with error()
calls in cb_getvar and simple_strtoul() in cb_download.

Since the download callback happens elsewhere, the 4k buffer
should always be sufficient to handle command arguments.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06 21:07:44 +02:00
Daniel Mack
16b61d13ba usb: musb-new: core: set MUSB_POWER_HSENAB in MUSB_POWER for host mode
This bit allows the MUSB controller to negotiate for high-speed mode when
the device is reset by the hub. If unset, Babble errors occur with
high-speed mass storage devices right after the first packet. This condition
is not caught by the interrupt handles in U-Boot, so no recovery is done,
and the USB communication is stuck.

To fix this, set the bit unconditionally, not only for
CONFIG_USB_GADGET_DUALSPEED but also for host-only modes.

Signed-off-by: Daniel Mack <zonque@gmail.com>
2014-10-06 21:04:44 +02:00
Pavel Machek
230fe9b202 arm: socfpga: fpga: Add SoCFPGA FPGA programming interface
Add code necessary to program the FPGA part of SoCFPGA from U-Boot
with an RBF blob. This patch also integrates the code into the
FPGA driver framework in U-Boot so it can be used via the 'fpga'
command.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>

V2: Move the not-CPU specific stuff into drivers/fpga/ and base
    this on the cleaned up altera FPGA support.
2014-10-06 17:46:50 +02:00
Pavel Machek
498d1a62db arm: socfpga: mmc: Pick the clock from clock manager
Make the SoCFPGA MMC stub pick clock via the clock manager
frequency accessors instead of hard-coding the frequency.

Also fix calloc() misuse.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-10-06 17:46:49 +02:00
Marek Vasut
77fa164839 Merge branches 'topic/drivers/fpga-20141006', 'topic/drivers/mmc-20141006', 'topic/drivers/net-20141006', 'topic/tools/mkimage-20141006' and 'topic/arm/cache-20141006' into HEAD 2014-10-06 17:45:55 +02:00
Marek Vasut
96cec17d3c net: dwc: Make the cache handling less cryptic
Add a few new variables to make the cache handling less cryptic.
Add a variable for DMA and DATA descriptor start and end, so the
correctness of the code is easier to inspect.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
2014-10-06 17:36:40 +02:00
Marek Vasut
4f68678b19 net: dwc: Fix cache alignment issues
Fix remaining cache alignment issues in the DWC Ethernet driver.
Please note that the cache handling in the driver is making the
code hideous and thus the next patch cleans that up. In order to
make this change reviewable though, the cleanup is split from it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06 17:36:40 +02:00
Pavel Machek
58ec63d6bc net: phy: Cleanup drivers/net/phy/micrel.c
Old saying says that more than three exclamation marks in a row are
sign of mental disease. Cleanup micrel.c.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Chin Liang See <clsee@altera.com>
2014-10-06 17:36:40 +02:00
Pavel Machek
f33c930583 mmc: dw_mmc: cleanups
The dw_mmc driver was responding to errors with debug(). Change that
to prinf()/puts() respectively so that any errors are immediately
obvious. Also adjust english in comments.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Chin Liang See <clsee@altera.com>
2014-10-06 17:34:39 +02:00
Marek Vasut
2012f238bd fpga: altera: Turn the switches into table lookup
Add a table of FPGA family with matching functions associated with
it and make all the code just look up the family in that table and
call the associated function instead of the horrible switch voodoo
which was duplicated all over the place.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06 17:31:42 +02:00
Marek Vasut
fda915a4cf fpga: altera: Make altera_validate return normal values
Make the function return either 0 or -EINVAL, that is, normal
expected error codes and success codes instead of true/false
nonsense.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06 17:31:42 +02:00
Marek Vasut
54c96b18a2 fpga: altera: Move altera_validate to the top
Move the function to the top of the file to avoid forward declaration.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06 17:31:41 +02:00
Marek Vasut
4a4c0a5e9a fpga: altera: More indentation trimdown
Further improve the indentation in the rest of the file, where
the indentation is initially a bit less brutal. There is no
functional change in this patch.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06 17:31:41 +02:00
Marek Vasut
5561a84148 fpga: altera: Clean up altera_validate function
Boldly go, where no programmer has gone before and just clean up
the indentation mayhem. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
2014-10-06 17:31:41 +02:00
Marek Vasut
0ae16cbb40 fpga: altera: Clean up the printing and debug
Clean up the printf() statements and get rid of the PRINTF()
macro by replacing it with debug_cond().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06 17:31:41 +02:00
Marcel Ziswiler
d1fcbae117 usb: tegra: ULPI regression on tegra20
Trying to enumerate USB devices connected via ULPI to T20 failed as
follows:

USB2:   ULPI integrity check failed

Git bisecting revealed the following commit being at odds:

commit 2d34151f75
usb: tegra: refactor PHY type selection

Looking at above commit one quickly identifies a copy paste error which
this patch fixes. Happy ULPIing again (;-p).

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2014-10-06 16:12:48 +02:00
Eric Nelson
84c24f66c2 usb: gadget: fastboot: explicitly set radix of maximum download size
The processing of the max-download-size variable requires a
radix specifier, or the fastboot host tool will interpret
it as an octal number.

See function get_target_sparse_limit() in file fastboot/fastboot.c
in the AOSP:
        https://android.googlesource.com/platform/system/core/+/master

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06 14:50:44 +02:00
Eric Nelson
c674a6660e usb: gadget: fastboot: add max-download-size variable
Current Android Fastboot seems to use 'max-download-size' instead
of 'downloadsize' variable to indicate the maximum size of sparse
segments.

See function get_target_sparse_limit() in file fastboot/fastboot.c
in the AOSP:
	 https://android.googlesource.com/platform/system/core/+/master

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06 14:50:44 +02:00
Eric Nelson
e206799370 usb: ci_udc: respect CONFIG_USB_GADGET_DUALSPEED
Force full-speed (12 Mbit/s) operation if CONFIG_USB_GADGET_DUALSPEED
is not defined.

The controller is capable of high-speed (480 Mbit/s) operation,
but some designs may require the use of lower-speed operation.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06 14:50:44 +02:00
Bo Shen
23d1d10c42 usb: gadget: fastboot: improve download progress bar
When download is ongoing, if the actual size of one transfer
is not the same as BYTES_PER_DOT, which will cause the dot
won't print anymore. Then it will let the user thinking it
is stuck, actually it is transfering without dot printed.

So, improve the method to show the progress bar (print dot).

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-10-06 14:50:43 +02:00
Eric Nelson
f9935c87b6 usb: f_mass_storage: set removable flag in do_inquiry based on LUN
Without this flag, tools like Alex Page's USB Image Tool
won't see drives exposed over USB Gadget as removable,
and won't allow access to them.
	http://www.alexpage.de/usb-image-tool/

The code was pulled from the main-line kernel:
	drivers/usb/gadget/function/f_mass_storage.c

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-06 14:50:43 +02:00
Heiko Schocher
9f3b8ed14c usb: dfu: add fullspeed support for DFU
DFU now can use also fullspeed.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Liu Bin <b-liu@ti.com>
Cc: Lukas Stockmann <lukas.stockmann@siemens.com>
2014-10-06 14:50:43 +02:00
Lukasz Majewski
b9c99d3246 usb: dfu: thor: gadget: Remove dead code
This code is not used anymore in the current DFU implementation and
can be safely removed.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
2014-10-06 14:50:43 +02:00
Hans de Goede
32d019265d stdio: Add force parameter to stdio_deregister
In some cases we really want to move forward with a deregister, add a force
parameter to allow this, and replace the dev with a nulldev in this case.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-06 14:50:43 +02:00
Hans de Goede
36b73109c4 usb: ehci: Make periodic_schedules a per controller variable
Periodic schedules tracks how many int_queue-s are active, and decides whether
or not to en/disable the periodic schedule based on this. This is clearly
a per controller thing.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-06 14:50:42 +02:00
Hans de Goede
415548d884 usb: ehci: poll_int_queue check real qtd, not the overlay
When we first start an int queue, the qh's overlay area is all zeros. This
gets filled by the hc with the actual qtd values as soon as it advances
the queue, but we may call poll_int_queue before then, in which case we
would think the transfer has completed as the hc has not yet copied the
qt_token to the overlay, so the active flag is not set.

This fixes this by checking the actual qtd token, rather then the overlay.
This also fixes a (theoretical) race where we see the completion in the
overlay and free and re-use the qtd before the hc has completed writing back
the overlay to the actual qtd.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-06 14:50:42 +02:00
Hans de Goede
ea7b30c589 usb: ehci: Add missing cache flush to destroy_int_queue
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-06 14:50:42 +02:00
Hans de Goede
4e2c4ad360 usb: ehci: Properly set hub devnum and portnr with usb-1 hubs in the chain
For full / low speed devices we need to get the devnum and portnr of the tt,
so of the first upstream usb-2 hub, not of the parent device (which may be a
usb-1 hub).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-10-06 14:50:42 +02:00
Baruch Siach
9169305599 cfi_flash: don't hide write/erase errors
Partially revert commit 0d01f66d23 (CFI: cfi_flash write fix for AMD
legacy).

flash_full_status_check() used to skip status register parsing when
flash_status_check() returns OK. This is wrong since flash_status_check()
must return OK for other status bits to be valid.

Cc: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-10-06 14:12:12 +02:00
Masahiro Yamada
7f368553fc serial: add UniPhier serial driver
The driver for on-chip UART used on Panasonic UniPhier platform.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-10-05 14:10:09 +09:00
Masahiro Yamada
845034e6b2 mtd: denali: add Denali NAND driver for SPL
The SPL-mode driver for Denali(Cadence) NAND Flash Memory Controller IP.

This driver requires two CONFIG macros:
 - CONFIG_SPL_NAND_DENALI
     Define to enable this driver.
 - CONFIG_SYS_NAND_BAD_BLOCK_POS
     Specify bad block mark position in the oob space. Typically 0.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Scott Wood <scottwood@freescale.com>
2014-10-05 14:10:09 +09:00
Masahiro Yamada
4b0abf9f3c mtd: denali: add Denali controller configs to Kconfig
Commit 3eb3e72a3f (nand/denali: Adding Denali NAND driver support)
introduced some new options, and some of them were documented by
commit f9860cf081 (nand/denali: Document CONFIG symbols).

This commit allows users to enable/disable them via Kconfig
with more detailed help docs.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Scott Wood <scottwood@freescale.com>
2014-10-05 14:10:09 +09:00
Pavel Machek
b966db0d72 dw_mmc: cleanups
dw_mmc driver was responding to errors with debug(). Change that to
prinf so that any errors are immediately obvious. Also adjust english
in comments.

Signed-off-by: Pavel Machek <pavel@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-10-03 17:26:50 +03:00
Mario Schuknecht
786a27b7ec mmc: Fix mmc bus width
After setting the bus width, the extended CSD register is read. Some selected
fields are compared with previously read extended CSD register fields. In this
comparison the EXT_CSD_ERASE_GROUP_DEF field is compared. But this field is
previously written under certain circumstances. And then the comparison fails.

Only compare read-only fields. Therefore compare field EXT_CSD_HC_WP_GRP_SIZE
instead of field EXT_CSD_ERASE_GROUP_DEF.

Signed-off-by: Mario Schuknecht <mario.schuknecht@dresearch-fe.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-10-03 17:26:50 +03:00
Mario Schuknecht
bcd06989b8 mvebu_mmc: Driver addition
In function mvebu_mmc_write notice command timeout. It is possible that a
command is done, but a timeout occurred.

Enable timeout in set bus function.

Set window registers. Without that I could not use the driver on a Kirkwood
88F6282 SoC.

Set high capacity and 52MHz driver feature.

Signed-off-by: Mario Schuknecht <mario.schuknecht@dresearch-fe.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-10-03 17:26:50 +03:00
Peter Bigot
6dc93e7087 mmc: restore capacity when switching to partition 0
The capacity and lba for an MMC device with part_num 0 reflects the
whole device.  When mmc_switch_part() successfully switches to a
partition, the capacity is changed to that partition.  As partition 0
does not physically exist, attempts to switch back to the whole device
will indicate an error, but the capacity setting for the whole device
must still be restored to match the partition.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Tom Rini <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-10-03 17:26:50 +03:00
Hannes Petermaier
021a80559f mmc: fix ERASE_GRP_DEF handling
if we set manually this bit on the eMMC card using mmc_switch(...),
we also have to set it within our (before read) internal structure
'ext_csd'.

Otherwise following checks on this will fail.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-10-03 17:26:49 +03:00
Sonic Zhang
282a82e8a1 mmc: set correct block size value in bfin sdh driver
Wait data transfer till the data end bit other than the data block end
bit is set.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-10-03 17:26:49 +03:00
Ye.Li
5546ad0734 usb: ehci-mx6: Rename the USB register base address
The mx6sl/mx6sx has 2 OTG and 1 host. So they have name
"USBO2H_USB_BASE_ADDR" in imx-regs.h. The driver hard codes
the USB base address name to "USBOH3", which causes the driver
failed to build for mx6sl/mx6sx.

This patch uniform the address name to "USB_BASE_ADDR" for all
mx6 series.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-29 10:33:27 +02:00
Marek Vasut
dd24b57bb7 usb: ehci: mxs: Add board-specific callbacks
Add board-specific callbacks for enabling/disabling port power
into the MXS EHCI controller driver. This is in-line with the
names of callbacks on other systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-09-29 09:02:16 +02:00
Tom Rini
be9f643ae6 Merge branch 'for-tom' of git://git.denx.de/u-boot-dm 2014-09-26 20:10:48 -04:00
Simon Glass
110bdee00f sandbox: Convert SPI flash emulation to use sf_params
At present sandbox has its own table of supported SPI flash chips. Now that
the SPI flash system is fully consolidated and has its own list, sandbox
should use that.

This enables us to expand the number of chips that sandbox supports.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-26 15:00:36 -06:00
Tom Rini
2c2277f15c Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2014-09-26 09:57:52 -04:00
Tom Rini
2c3dc792b6 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2014-09-26 09:51:18 -04:00
Chin Liang See
3eb3e72a3f nand/denali: Adding Denali NAND driver support
To add the Denali NAND driver support into U-Boot.
This driver is leveraged from Linux with commit ID
fdbad98dff8007f2b8bee6698b5d25ebba0471c9. For Denali
controller 64 variance, you need to declare macro
CONFIG_SYS_NAND_DENALI_64BIT.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-25 13:43:16 -05:00
Stefan Roese
be16aba5ce mtd: nand: Fix length bug in ioread16_rep() and iowrite16_rep()
The ioread16_rep() and iowrite16_rep() implementations are U-Boot specific
and have been introduced with the Linux MTD v3.14 sync. While introducing
these functions, the length for the loop has been miscalculated. The ">> 1"
is already present in the caller. So lets remove it in the function.

Tested on omap3_ha.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
2014-09-25 13:43:00 -05:00
Rostislav Lisovy
2f665945b3 mtd: nand: am335x: Fix 'bit-flip' errors in SPL
OMAP GPMC driver used with some NAND Flash devices
(e.g. Spansion S34ML08G1) causes that U-boot shows
hundreds of 'nand: bit-flip corrected' error messages.
Possible cause was discussed in the mailinglist thread:
http://lists.denx.de/pipermail/u-boot/2014-April/177508.html

The issue was partially fixed with the cc81a5291910d7a.git
however this has to be done to fix the SPL.

The original author of the code is Belisko Marek
<marek.belisko@gmail.com>

Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
2014-09-25 13:43:00 -05:00
York Sun
f80d6472b4 driver/ddr/fsl: Fix DDR4 driver
When accumulated ECC is enabled, the DQ_MAP for ECC[4:7] needs to be set
to 0, i.e. 0->0, 1->1, etc., required by controller logic, even these pins
are not actually connected.

Also fix a bug when reading from DDR register to use proper accessor for
correct endianess.

Signed-off-by: York Sun <yorksun@freescale.com>
2014-09-25 08:36:20 -07:00
York Sun
bb5783224b driver/ddr/fsl: Fix tXP and tCKE
The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.

Signed-off-by: York Sun <yorksun@freescale.com>
2014-09-25 08:36:18 -07:00
York Sun
1d71efbb03 driver/ddr: Restruct driver to allow standalone memory space
U-boot has been initializing DDR for the main memory. The presumption
is the memory stays as a big continuous block, either linear or
interleaved. This change is to support putting some DDR controllers
to separated space without counting into main memory. The standalone
memory controller could use different number of DIMM slots.

Signed-off-by: York Sun <yorksun@freescale.com>
2014-09-25 08:36:18 -07:00
Prabhakar Kushwaha
5b8388a827 driver/mtd: Use generic timer API for FSL IFC, eLBC
Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks

Replace usec2ticks with get_timer() (generic timer API)

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-09-25 08:36:17 -07:00
Masahiro Yamada
f494e0a184 kbuild: refactor some makefiles
[1] Move driver/core/, driver/input/ and drivers/input/ entries
    from the top Makefile to drivers/Makefile

[2] Remove the conditional by CONFIG_DM in drivers/core/Makefile
    because the whole drivers/core directory is already selected
    by CONFIG_DM in the upper level

[3] Likewise for CONFIG_DM_DEMO in drivers/demo/Makefile

[4] Simplify common/Makefile - both CONFIG_DDR_SPD and
    CONFIG_SPD_EEPROM are boolean macros so they can directly
    select objects

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-09-24 18:30:29 -04:00
Masahiro Yamada
c79cba37b3 cosmetic: replace MIN, MAX with min, max
The macro MIN, MAX is defined as the aliase of min, max,
respectively.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-24 18:30:29 -04:00
Masahiro Yamada
ed36323f6d kconfig: add blank Kconfig files
This would be useful to start moving various config options.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2014-09-24 18:30:28 -04:00
Marcel Ziswiler
a4277200a2 e1000: fix no nvm build
Fix the following build error in case CONFIG_E1000_NO_NVM is enabled:
	  CC      drivers/net/e1000.o
	drivers/net/e1000.c: In function ‘e1000_initialize’:
	drivers/net/e1000.c:5365:5: error: ‘struct e1000_hw’ has no
		member named ‘eeprom_semaphore_present’
	make[1]: *** [drivers/net/e1000.o] Error 1
	make: *** [drivers/net] Error 2
Acked-by: Marek Vasut <marex@denx.de>
2014-09-24 18:30:27 -04:00
Steve Rae
593cbd93f3 usb/gadget: fastboot: minor cleanup
- update static function
- additional debugging statements
- update "fastboot command" information
- add missing include file
- update spelling

Signed-off-by: Steve Rae <srae@broadcom.com>
2014-09-24 18:30:27 -04:00
Steve Rae
d1b5ed0753 usb/gadget: fastboot: add support for flash command
- implement 'fastboot flash' for eMMC devices

Signed-off-by: Steve Rae <srae@broadcom.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2014-09-24 18:30:27 -04:00
Priyanka Jain
5273aa3834 board/t1040qds: Add sgmii ports support in 0xA7 protocol
T1042QDS (T1042 is T1040 Personality without L2 switch) supports following
sgmii interfaces with serdes protocol 0xA7
-SGMII-MAC3 on Lane B - slot 7
-SGMII-MAC5 on Lane H - slot 7
-SGMII2.5G-MAC1 on Lane C - slot 6
-SGMII2.5G-MAC2 on Lane D - slot 5

Add support of above sgmii interfaces

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
2014-09-24 13:12:16 -07:00
Stefan Roese
bf9b86dc47 spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:48:56 +05:30
Stefan Roese
0299046e5b spi: kirkwood_spi.c: Make global variable static
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:48:27 +05:30
Stefan Roese
c032174f82 spi: kirkwood_spi.c: Some fixes and cleanup
This patch introduces the clrsetbits_le32() accessor functions in the
kirkwood SPI driver. Note that it also includes a fix:

-	 writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl);
+	 writel(KWSPI_SMEMRDY, &spireg->ctrl);

Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead
0xfffffffe is written into this control register. This is the main
reason to use the clrsetbits() functions now. As they make clearing
bits much less error prone.

Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and
spi_cs_deactivate() any more. Its the wrong macro but has the same
value as the correct one (KWSPI_CSN_ACT).

This is in preparation for use of this driver on the Marvell Armada XP
platform as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:47:53 +05:30
Stefan Roese
31969b8993 sf: Add M25PX64 SPI NOR flash ID
Add ID for this Numonix / STMicro chip.

Tested on Marvell DB-78460-BP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:46:25 +05:30
Nikita Kiryanov
88e34e5ff7 spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*
Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in
SPL. These #defines do not allow the user to select SPI mode for the SPI flash
(there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in
spi_spl_load.c), and duplicate information already provided by
CONFIG_SF_DEFAULT_* #defines.

Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead.

Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Hannes Petermaier <hannes.petermaier@br-automation.com>
Cc: Michal Simek <monstr@monstr.eu>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:40:10 +05:30
Nikita Kiryanov
155fa9af95 spi: mxc: fix sf probe when using mxc_spi
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:

cs = (cs | gpio << 8)

This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".

This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.

Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.

Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:25:39 +05:30
Nikita Kiryanov
01d2aaf61b mtd: spi: add support for M25PE16 and M25PX16
Add support for M25PE16 and M25PX16

Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-09-24 17:25:16 +05:30
Robert Baldyga
cae025aab3 dm: avoid dev->req_seq overflow
Since dev->req_seq value is initialized from "reg" property of fdt node,
there is posibility, that address value contained in fdt is greater than
INT_MAX, and then value in dev->req_seq is negative which led to probe()
fail.

This patch fix this problem by ensuring that req_seq is positive, unless
it's one of errno codes.

Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-09-23 12:44:31 -06:00
Simon Glass
59990bf0ea dm: serial: Don't require device tree to configure a console
Allow serial_find_console_or_panic() to work without a device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-23 12:44:30 -06:00
Simon Glass
91cbd792c4 dm: core: Allow device_bind() to used without CONFIG_OF_CONTROL
The sequence number support in driver model requires device tree control.
It should be skipped if CONFIG_OF_CONTROL is not defined, and should not
require functions from fdtdec.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-23 12:44:30 -06:00
Simon Glass
bf1a86fca0 sf: Add an empty entry to the parameter list
The list is supposed to be terminated with a NULL name, but is not. If a
board probes a chip which does not appear in the table, U-Boot will crash
(at least on sandbox).

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-23 12:44:30 -06:00
Stefano Babic
42817eb85d Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-09-22 15:51:01 +02:00
Boris BREZILLON
d357b94041 mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECC
Disable subpage write when using PMECC to prevent buggy partial page write.

This fix has been taken from linux sources (see commit
90445ff6241e2a13445310803e2efa606c61f276)

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-09-19 00:11:22 +02:00
Bo Shen
97b2043da6 USB: ehci-atmel: use pcr to enable or disable clock
If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-09-19 00:11:21 +02:00
Bo Shen
01c8bf5a6f USB: ohci-at91: use pcr to enable or disable clock
If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-09-19 00:11:20 +02:00
Wu, Josh
14b3b44eda mtd: atmel-nand: use pmecc_readl(b)/pmecc_writel to access the pmecc register
We defined the macro pmecc_readl(b)/pmecc_writel for pmecc register access.
But in the driver we also use the readl(b)/writel.
To keep consistent, this patch make all use pmecc_readl(b)/pmecc_writel.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-09-19 00:11:13 +02:00
Tom Rini
e38b15b061 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-09-17 18:01:04 -04:00
Simon Glass
ad6e48e509 net: usb: Add SMSC copyright to smsc95xx driver
This driver was upstreamed without an SMSC copyright, even thought it seems
that SMSC was the original author.

See the kernel version for a code comparison:

http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=2f7ca802bdae2ca41022618391c70c2876d92190

It's not clear who actually moved this code, or whether the kernel was the
original source, or somewhere else, but it probably should still have the
SMSC copyright.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-16 12:23:59 -04:00
maxin.john@enea.com
5da163d665 mtdcore: Fix a build error with CONFIG_CMD_MTDPARTS_SPREAD
This patch fixes the build error for CONFIG_CMD_MTDPARTS_SPREAD

Signed-off-by: Maxin B. John <maxin.john@enea.com>
2014-09-16 12:23:59 -04:00
Khoronzhuk, Ivan
7206111e52 mtd: nand: davinci_nand: update write_page function for keystone RBL
After mtd was synced with Linux 3.14
(ff94bc40af)
the number of parameters for write_page function of nand_chip was
changed. The additional two var were needed for subpage write.
As keystone has no supbage write they are not needed. So correct
only function definition by upgrading it's parameter list.
That helps to get ritd of compilation warning.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-09-16 12:23:59 -04:00
Masahiro Yamada
3b61297024 kbuild: force to define __UBOOT__ in all the C sources
U-Boot has imported various source files from other projects,
mostly Linux.

Something like

  #ifdef __UBOOT__
    [ modification for U-Boot ]
  #else
    [ original code ]
  #endif

is an often used strategy for clarification of adjusted parts,
that is, easier re-sync in future.

Instead of defining __UBOOT__ in each source file,
passing it from the top Makefile would be easier.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2014-09-16 12:23:56 -04:00
Thierry Reding
5d9f423ddb rtl8169: Defer network packet processing
When network protocol errors occur (such as a file not being found on a
TFTP server), the processing done by the NetReceive() function will end
up calling the driver's .halt() implementation. However, after that the
device no longer has access to the memory buffers and will cause errors
such as this in the rtl_recv() function when trying to hand descriptors
back to the device:

	pci_hose_bus_to_phys: invalid physical address

This can be fixed by deferring processing of network packets until the
descriptors have been handed back. That way rtl_halt() tearing down
network buffers is not going to prevent access to the buffers.

Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-09-16 12:23:45 -04:00
Stefan Agner
72d7beabf7 mtd: nand: add Freescale vf610_nfc driver
This adds initial support for Freescale NFC (NAND Flash Controller)
found in ARM Vybrid SoC's, Power Architecture MPC5125 and others.
The driver is called vf610_nfc since this is the first supported
and tested hardware platform supported by the driver.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
2014-09-16 13:25:18 +02:00
Vasili Galka
9f680d2d97 openrisc: Fix a few type cast related warnings
Use size_t type for positive offsets instead of the loff_t type. The
later is defined as long long, which is larger than the pointer type
on OpenRISC architecture and therefore the following warning was
generated:

"warning: cast to pointer from integer of different size"

Signed-off-by: Vasili Galka <vvv444@gmail.com>
2014-09-15 13:32:56 -04:00
Tom Rini
8d028d404f Merge branch 'master' of git://git.denx.de/u-boot-dm 2014-09-13 16:32:52 -04:00
Tom Rini
114cc4290b Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-09-12 11:27:46 -04:00
Simon Glass
858530a8c0 dm: tegra: Enable driver model for serial
Use driver model for serial ports.

Since Tegra now uses driver model for serial, adjust the definition of
V_NS16550_CLK so that it is clear that this is only used for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:02 -06:00
Simon Glass
12e431b277 dm: serial: Add driver model support for ns16550
Add driver model support so that ns16550 can support operation both with
and without driver model.

The driver needs a clock frequency so cannot stand alone unfortunately. The
clock frequency must be provided by a separate driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:01 -06:00
Simon Glass
8bbe33c829 dm: serial: Collect common baud rate code in ns16550
The same sequence is used in several places, so move it into a function.
Note that UART_LCR_BKSE is an alias for UART_LCR_DLAB.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:01 -06:00
Simon Glass
fa54eb1243 dm: serial: Move baud rate calculation to ns16550.c
Move the function that calculates the baud rate divisor into ns16550.c so
it can be used by that file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:01 -06:00
Simon Glass
72e98228c3 sandbox: serial: Support a coloured console
The current sandbox serial driver is a pretty trivial example and does not
have the featues that might be needed for other board serial drivers. To
help provide a better example, add a text colour property to the device
tree for sandbox. This uses platform data, a device tree node, driver
private data and a remove() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:00 -06:00
Simon Glass
890fcefe2e sandbox: Convert serial driver to use driver model
Adjust the sandbox serial driver to use the new driver model uclass. The
driver works much as before, but within the new framework.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-10 13:00:00 -06:00