Commit graph

92 commits

Author SHA1 Message Date
Bin Meng
294f2050c4 sf: Preserve QE bit when clearing BP# bits for Macronix flash
On some flash (like Macronix), QE (quad enable) bit is in the same
status register as BP# bits, and we need preserve its original value
during a reboot cycle as this is required by some platforms (like
Intel ICH SPI controller working under descriptor mode).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[Refined code for readability]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-16 18:21:50 +05:30
Simon Glass
656f29d1ca dm: spi-flash: Convert uclass to livetree
Update the SPI flash uclass to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:16 -06:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Cyrille Pitchen
9bcb018870 Revert "sf: Fix quad bit set for micron devices"
This reverts commit c56ae7519f.

Once the 'Quad Enable' bit is cleared in their Enhanced Volatile
Configuration Register (EVCR), Micron memories expect ALL commands to use
the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer
accepted.

Within the reverted commit, the write_evcr() function is implemented using
the spi_flash_write_common(), which is a shortcut for the
[ spi_flash_cmd_write_enable(), spi_flash_cmd_write(),
spi_flash_cmd_wait_ready() ] sequence.

Since the internal state of the Micron memory has been changed when the
spi_flash_cmd_write() function completes, the later call of the
spi_flash_cmd_wait_ready() function fails.

Indeed the SPI controller driver is not aware of the SPI protocol switch.

Further patches will fix the support of Micron QSPI memories.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[Rebase on master, use JEDEC_MFR(info) in place of idcode0]
Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-12-15 18:33:16 +01:00
Phil Edworthy
db9225ba26 sf: Do not force the DT memory map size to exactly match the device
As long as the memory mapped size specifeid in the DT is the same or
bigger than the device size, it will work. So do not force the sizes
to be identical.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-15 16:57:28 +01:00
Fabien Parent
304decdd31 mtd: spi: don't return -1 when scan succeed
In spi_flash_scan, 'ret' is initialled to -1, but 'ret' is not always
used to store a return value, in that case, even when the function
succeed, an error (-1) will be returned.
Lets just return 0 if we hit the end of the function.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-15 16:57:28 +01:00
Simon Glass
71634f289d spi: Add of-platdata support to SPI and SPI flash
Some boards may want to use these subsystems with of-platdata in SPL. Add
support for this by avoiding any device tree access in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Jagan Teki
20343ff3ad spi: Remove dual flash options/flags
Dual flash code in spi are usually take the spi controller
to work with dual connected flash devices. Usually these
dual connection operation's are referred to flash controller
protocol rather with spi controller protocol, these are still
present in flash side for the usage of spi-nor controllers.

So, this patch remove the dual_flash options or flags in sf
which are triggered from spi controller side.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-19 08:41:44 +05:30
Jagan Teki
7b4ab88e2d sf: Rename few local functions
spi_flash_write_bar-> write_bar
spi_flash_write_bar -> read_bar
spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:54 +05:30
Jagan Teki
475bf816f1 sf: Remove non-meaningful comments
Remove unneeded/non-meaningful commit message on
params and flash.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
116e005cfd sf: Remove spansion_s25fss_disable_4KB_erase
In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.

To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.

So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.

For this:
- Removed spansion_s25fss_disable_4KB_erase code
- Add SECT_4K for S25FS512S chip

Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
ed363b53d0 sf: Add SPI_FLASH_MAX_ID_LEN
Add id length of 5 bytes numerical value to macro.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
eccb6be068 sf: nr_sectors -> n_sectors
Rename nr_sectors as n_sectors to sync with Linux.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
dda06a4328 sf: Simplify lock ops detection code
Simplify the flash_lock ops detection code and added
meaningful comment.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:52 +05:30
Jagan Teki
f790ca7c7d sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like
adding new flash_info attributes, update ID length bytes
and so on and more over it will sync to Linux way of defining
flash_info attributes.

- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:52 +05:30
Jagan Teki
de0599284f sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-09-22 01:02:28 +05:30
Jagan Teki
ddc2dfbb65 sf: Remove SECT_32K
SECT_32K never used anywhere in the code.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-09-22 01:02:28 +05:30
Jagan Teki
08fe9c294f spi: Use mode for rx mode flags
Make rx mode flags as generic to spi, earlier mode_rx is
maintained separately because of some flash specific code.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-09-22 01:02:28 +05:30
Jagan Teki
edd35f712e sf: Simplify fastest read cmd code
Fastest read command code look for fastest read command
taking inputs from spi->mode_rx and flags from param table
and controller mode_rx is always been a priority.

Since mode_rx is always set from controller side this optimized
code doesn't require much and this code required exctra overhead like
1) Maintain e_rx_cmd in param table
2) Maintain mode_rx in spi_slave {}

Hence removed this code, and look for read command from normal
spi->mode from spi_slave{} and params->flags

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-09-22 01:02:28 +05:30
Prabhakar Kushwaha
d074c06ba7 driver: mtd: spi: Adding support for QSPI flash
Serial number, vendor id and page size are added for QSPI flash
common on both LS1012AQDS and LS1012ARDB i.e. S25FS512SDSMFI011.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-03 14:12:49 -07:00
Yuan Yao
80c1bfd233 sf: Disable 4-KB erase command for SPANSION S25FS-S family
The S25FS-S family physical sectors may be configured as a hybrid
combination of eight 4-kB parameter sectors at the top or bottom
of the address space with all but one of the remaining sectors
being uniform size.
The default status of the flash is in this hybrid architecture.
The parameter sectors and the uniform sectors have different erase
commands.
This patch disable the hybrid sector architecture then the flash will
has uniform sector size and uniform erase command.
This configuration is temporary, the flash will revert to hybrid
architecture after power on reset.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-18 08:51:24 -07:00
Stephen Warren
11b9a4d8d9 sf: fix timebase data type in _wait_ready()
get_timer() returns an unsigned 64-bit value, but is currently assigned to
a signed 32-bit variable. Due to sign extension and data truncation, this
causes the timeout loop in spi_flash_cmd_wait_ready() to immediately (and
incorrectly) fire for about 50% of all time values, based on whether bit
31 is set. In sandbox at least, this causes the test to pass or fail based
on system uptime, as opposed to time since the U-Boot binary was started.

Fixes: 4efad20a17 ("sf: Update status reg check in spi_flash_cmd_wait_ready")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-04-25 15:10:30 -04:00
Marek Vasut
ea9619aed6 sf: Correct data types in stm_is_locked_sr()
The stm_is_locked_sr() function is picked from Linux kernel. For reason
unknown, the 64bit data types used by the function and present in Linux
were replaced with 32bit unsigned ones, which causes trouble.

The testcase performed was done using ST M25P80 chip.
The command used was:
 => sf protect unlock 0 0x10000

The call chain starts in stm_unlock(), which calls stm_is_locked_sr()
with negative ofs argument. This works fine in Linux, where the "ofs"
is loff_t, which is signed long long, while this fails in U-Boot, where
"ofs" is u32 (unsigned int). Because of this signedness problem, the
expression past the return statement to be incorrectly evaluated to 1,
which in turn propagates back to stm_unlock() and results in -EINVAL.

The correction is very simple, just use the correctly sized data types
with correct signedness in the function to make it work as intended.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-03-12 19:55:42 +05:30
Simon Glass
0badb23d11 spi: Correct two error return values
When an error number is provided we should use it, not change it. This fixes
the SPI and SPI flash tests.

One of these is long-standing. The other seems to have been introduced by
commit 1e90d9fd (sf: Move read_id code to sf_ops).

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 1e90d9fd (sf: Move read_id code to sf_ops)
Reviewed-by: Jagan Teki <jteki@openedev.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2016-02-26 08:53:10 -07:00
Mugunthan V N
7bd1c59bdb sf: spi_flash: use dma to copy data from mmap region if platform supports
Add dma memcpy api to the default spi_flash_copy_mmap(), so that
dma will be used to copy data when CONFIG_DMA is defined for the
platform.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-02-23 16:14:46 +05:30
Simon Glass
d178a1c5b2 spi: Correct device tree usage in spi_flash_decode_fdt()
This function currently searches the entire device tree for a node that
it thinks is relevant. But the node is known and is passed in. Correct the
code and enable it only with driver model, since only driver-model boards
will use it.

This avoids bringing in a large number of strings from fdtdec.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Jagan Teki
1c17f5ec57 sf: Make IO modes at last in read modes
SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to
SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Jagan Teki
91292e0bee spi: Rename op_mode_rx to mode_rx
Since spi rx mode macro's are renamed to simple and
meaninfull, this patch will rename the respective
structure members.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki
d9a0ab6c0d sf: Write quad bit along with read status
While setting quad bit on spansion, macronix code
is writing only particular quad bit this may give
wrong functionality with other register bits,
So this patch fix the issue where it with write
previous read reg status along  particular quad bit.

Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki
bfcdc3956d sf: Read back and check once macronix quad bit set
One macronix quad bit set using SR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.

Cc: Vignesh R <vigneshr@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki
ffecb0fc84 sf: Read back and check once spansion quad bit set
One spansion quad bit set using CR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.

Cc: Vignesh R <vigneshr@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki
c56ae7519f sf: Fix quad bit set for micron devices
Setting up quad bit for micron devices need to do the
same way as other flash devices like spansion, winbond
etc does using enhanced volatile config register so this
patch adds this support instead of printing "QEB is volatile"

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Peter Pan <peterpandong@micron.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki
6f3096585b sf: Rename bank_end to bar_end in read_bar
bar_end gives more meaningfull compared to bank_end and
spi_flash_write_bar uses bar_end so replaced bank_end with
bar_end in spi_flash_read_bar

Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki
9275929c24 sf: Rename spi_flash_set_* functions
Since quad_mode functions are local to spi flash core,
rename them to a meaningful and readable names.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
d25dd94298 sf: Move spi_read_cmds_array locally
Since spi_read_cmds_array is used locally in
spi_flash_scan, so move array to locally used
function instead of defining global array.

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
cdf3393814 spi: Rename SPI_TX_BP|QPP to SPI_TX_BYTE|QUAD
Since SPI_TX_* are spi_slave{} members so use spi protocol
notation instead spi flash programming, like

SPI_TX_BP  => SPI_TX_BYTE
SPI_TX_QPP => SPI_TX_QUAD

Cc: Simon Glass <sjg@chromium.org>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
095a41d3c2 spi: Use mode instead of op_mode_tx
Used mode member from spi_slave{} instead of op_mode_tx.

Cc: Simon Glass <sjg@chromium.org>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Jagan Teki
e228d6deb1 sf: Get spi locally from spi_flash
For better code readabilty, get the spi pointer from
spi_flash{} locally and use it instead of direct
dereferring spi pinter as flash->spi->*

Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:25 +05:30
Fabio Estevam
5092158359 spi: spi_flash: Fix the arguments of stm_is_locked_sr()
stm_is_locked_sr() takes the status register (SR) value as the last
parameter, not the second.

Based on a patch from Brian Norris for the linux kernel:
http://git.infradead.org/linux-mtd.git/commit/a32d5b726ff8cf32bf491522b0ac8ae2545a063e

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-07 20:29:33 +05:30
Jagan Teki
cba65a77c4 sf: Rename sf_ops.c to spi-flash.c
Since all spi-flash core operations are moved into
sf_ops.c then it's better to renamed as spi-flash.c

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-12-11 22:12:24 +05:30
Jagannadha Sutradharudu Teki
898e76c938 sf: Rename spi_flash files
Renamed:
spi_flash.c -> sf.c
spi_flash_internal.h -> sf_internal.h
spi_flash_ops.c -> sf_ops.c
spi_flash_probe.c -> sf_probe.c

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:50 +05:30
Jagannadha Sutradharudu Teki
4d5e29a680 sf: Divide spi_flash into multiple parts
Divided the spi_flash framework into mutiple parts for
- spi_flash.c:
        spi flash core file, interaction for spi/qspi driver to
        spi_flash framework.
- spi_flash_ops.c
        spi flash preffered operations, erase,write and read.
- spi_flash_probe.c
        spi flash probing, easy to extend probing functionality.

This change will support to extend the functionality in a
proper manner.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:41 +05:30
Ying Zhang
fdf8529afc powerpc : spi flash : Support to start from eSPI with SPL
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
	* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that
	ddr spd code can get the interleaving mode setting in env. It loads
	final uboot image from offset 96KB.
	* final uboot image, size is variable depends on the functions enabled.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 09:47:47 -07:00
Jagannadha Sutradharudu Teki
fd35ca5c20 sf: Fix code cleanup
- line over 80 characters.
- CHECK: Alignment should match open parenthesis

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-08-06 23:58:43 +05:30
Tom Rini
f9c1456cf6 Merge branch 'master' of git://git.denx.de/u-boot-spi 2013-06-24 16:37:01 -04:00
Jagannadha Sutradharudu Teki
b9e31be0f8 sf: Warn to use BAR for > 16MiB flashes
Warning for > 16MiB flashes to #define CONFIG_SPI_FLASH_BAR

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:10:36 +05:30
Jagannadha Sutradharudu Teki
29fbfc10f4 sf: Add debug messages on spi_flash_read_common
- Added debug's on spi_flash_read_common()
- Added space

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:10:36 +05:30
Jagannadha Sutradharudu Teki
95e779e4f4 sf: Place the sf calls in proper order
Placed the sf calls in proper order - erase/write/read

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-06-23 22:10:36 +05:30
Jagannadha Sutradharudu Teki
acc237544a sf: Unify spi_flash write code
Move common flash write code into spi_flash_write_common().

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:10:35 +05:30
Jagannadha Sutradharudu Teki
615a156167 sf: Add flag status register polling support
Flag status register polling is required for micron 512Mb flash
devices onwards, for performing erase/program operations.

Like polling for WIP(Write-In-Progress) bit in read status register,
spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control)
bit in flag status register.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-06-23 22:02:51 +05:30