Commit graph

20660 commits

Author SHA1 Message Date
Green Wan
1c07b0c562 riscv: dts: add SiFive Unmatched board support
Add dts files for SiFive Unmatched board.

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31 16:35:54 +08:00
Green Wan
2113c0045c riscv: dts: add fu740 support
Add dts support for fu740. The HiFive Unmatched support is based on
fu740 cpu and drivers in following patch set.

Signed-off-by: Green Wan <green.wan@sifive.com>
[greentime.hu: set fu740 speed to 1.2GHz]
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31 16:35:54 +08:00
Green Wan
d56d79ed27 drivers: clk: add fu740 support
Add fu740 support. One abstract layer is added for supporting
multiple chips such as fu540 and fu740.

Signed-off-by: Green Wan <green.wan@sifive.com>
2021-05-31 16:35:54 +08:00
Green Wan
a74e9d899d riscv: cpu: fu740: Add support for cpu fu740
Add SiFive fu740 cpu to support RISC-V arch

Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-31 16:35:53 +08:00
Grzegorz Szymaszek
7bda7cee2d arm: dts: stm32mp157c-odyssey-som: enable the RNG1
Enable the true random number generator. It can be used, for example, to
generate partition UUIDs when partitioning with the gpt command. The
generator is already enabled in the device trees of several other
STM32MP1‐based boards, like DKx or DHCOM.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-05-28 15:05:39 +02:00
Tom Rini
aab8b17e94 Merge tag 'ti-v2021.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-ti
- Fix reset for AM64 platforms
- Enable networking PHY driver for AM64
- Fix default R5F cluster setting in J7
2021-05-27 07:42:49 -04:00
Suman Anna
7194a95d13 arm: dts: k3-am642-sk: Add sysreset controller node
The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.

Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 SK.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27 14:53:14 +05:30
Suman Anna
a97ee92e4a arm: dts: k3-am642-evm: Add sysreset controller node
The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.

Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 EVM.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27 14:53:14 +05:30
Suman Anna
4ec04073ab arm: dts: k3-j721e: Fix up MAIN R5FSS cluster mode back to Split-mode
The default U-Boot environment variables and design are all set up for
both the MAIN R5FSS clusters to be in Split-mode. This is the setting
in v2021.01 U-Boot and the dt nodes are synched with the kernel binding
property names in commit 468ec2f3ef ("remoteproc: k3_r5: Sync to
upstreamed kernel DT property names") merged in v2021.04-rc2.

The modes for both the clusters got switched back to LockStep mode by
mistake in commit 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6
dts into U-Boot") also in v2021.04-rc2. This throws the following warning
messages when early-booting the cores using default env variables,

  k3_r5f_rproc r5f at 5d00000: Invalid op: Trying to start secondary core 7 in lockstep mode
  Load Remote Processor 3 with data at addr=0x82000000 98484 bytes: Failed!
  k3_r5f_rproc r5f at 5f00000: Invalid op: Trying to start secondary core 9 in lockstep mode
  Load Remote Processor 5 with data at addr=0x82000000 98484 bytes: Failed!

Fix this by switching back both the clusters to the expected Split-mode.
Make this mode change in the u-boot specific dtsi file to avoid such
sync overrides in the future until the kernel dts is also switched to
Split-mode by default.

Fixes: 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Reported-by: Minas Hambardzumyan <minas@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27 14:52:16 +05:30
Matt Merhar
f6c0d365d3 powerpc: fix regression in arch_initr_trap()
The assembly output of the arch_initr_trap() function differed by a
single byte after common.h was removed from traps.c:

 fff49a18 <arch_initr_trap>:
 fff49a18:      94 21 ff f0     stwu    r1,-16(r1)
 fff49a1c:      7c 08 02 a6     mflr    r0
 fff49a20:      90 01 00 14     stw     r0,20(r1)
-fff49a24:      80 62 00 44     lwz     r3,68(r2)
+fff49a24:      80 62 00 38     lwz     r3,56(r2)
 fff49a28:      4b ff 76 19     bl      fff41040 <trap_init>
 fff49a2c:      80 01 00 14     lwz     r0,20(r1)
 fff49a30:      38 60 00 00     li      r3,0
 fff49a34:      38 21 00 10     addi    r1,r1,16
 fff49a38:      7c 08 03 a6     mtlr    r0

This was causing a consistent hard lockup during the MMC read / loading
of the QoriQ FMan firmware on a P2041RDB board.

Re-adding the header causes identical assembly to be emitted and allows
the firmware loading and subsequent boot to succeed.

Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header")
Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
2021-05-26 17:26:07 -04:00
Daniel Schwierzeck
5308a71db8 MIPS: remove deprecated qemu_mips board
Remove qemu_mips boards because DM migration doesn't make sense.
The board support for qemu_mips is already marked as deprecated
in Qemu in favour of the Malta board. Also qemu_mips support
has been removed from Linux a long time ago.

The official replacement is the Malta board. The same Malta U-Boot
image can be used with Qemu and on physical hardware.
All combinations of Big Endian and Little Endian as well as 32 bit
and 64 bit are supported.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-05-25 15:35:06 +02:00
Marek Behún
34ccadcd33 ARM: don't use --gc-sections with LTO when using private libgcc
When using LTO, we can throw away the --gc-sections flag, but only if
using private libgcc.

When using system's libgcc, --gc-sections is still needed, otherwise
linking will fail due to undefined references to libc's symbols.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
75c7d10c1f ARM: don't use -ffunction-sections/-fdata-sections with LTO build
When building with LTO, using -ffunction-sections/-fdata-sections is not
useful anymore.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
8f9696510a ARM: make LTO available
Make LTO available for ARM architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
37de198fa2 armv8: SPL: discard relocation information
For some reason when building SPL for ARMv8 with LTO, the relocation
information is not discarded.

Discard it explicitly in the linker script.

This fixes LTO build for imx8mm_venice_defconfig.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
baa977bd0f ARM: omap3: fix LTO for DM3730 (and possibly other omap3 boards)
Adam Ford says that DM3730 needs board.c compiled without LTO flags.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Adam Ford <aford173@gmail.com>
2021-05-24 14:21:30 -04:00
Marek Behún
79dec66ca7 ARM: fix LTO for rockchip and samsung
When building with LTO, the compiler complains about type mismatch of
function usb_gadget_handle_interrupts(). This function is defined
without parameters in files
  arch/arm/mach-rockchip/board.c
  board/samsung/common/exynos5-dt.c
but it should have one parameter, int index.

Fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-05-24 14:21:30 -04:00
Marek Behún
9d3918f3fd ARM: fix LTO for seaboard
When seaboard_defconfig is compiled with LTO, the compiler complains
about some instructions not being supported in ARM mode.

This is caused by arch/arm/mach-tegra/tegra20/warmboot_avp.c having
different CFLAGS declared in Makefile. This file needs to be compiled
without LTO.

Fix this by removing -flto for this file.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
e8bb990fe7 ARM: imx8m: fix imx_eqos_txclk_set_rate() type mismatch for LTO
When building imx8mp_evk_defconfig with LTO, the compiler complains
about type mismatch of function imx_eqos_txclk_set_rate() in file
  drivers/net/dwc_eth_qos.c:845:12
which contains a weak definition of this function, vs file
  arch/arm/mach-imx/imx8m/clock_imx8mm.c
which contains an implementation.

Change the type of this function in the implementation to fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24 14:21:30 -04:00
Marek Behún
3cd7541f93 ARM: kona: fix clk_bsc_enable() type mismatch for LTO
When building with LTO, the compiler complains about type mismatch of
function clk_bsc_enable() in file:
  arch/arm/cpu/armv7/kona-common/clk-stubs.c
vs other files that define or use this function:
  warning: type of ‘clk_bsc_enable’ does not match original declaration.

Change the type of this function to that of the other usages.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24 14:21:30 -04:00
Marek Behún
9493e96e54 ARM: fix LTO for keystone
When building keystone with LTO the compiler complains:
  Error: selected processor does not support `smc #0' in Thumb mode

Fix this by removing -flto for the file implementing these SMC calls.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-05-24 14:21:30 -04:00
Marek Behún
b83120df79 ARM: fix LTO for imx28_xea
When imx28_xea_defconfig is built with LTO, the compiler complains about
the two different declarations of _start:
   include/asm-generic/sections.h    as  extern void _start(void);
   arch/arm/cpu/arm926ejs/mxs/mxs.c  as  extern uint32_t _start;

Fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24 14:21:30 -04:00
Marek Behún
e5fc9037dd ARM: fix LTO build for some thumb-interwork cases
Fix LTO build for some thumb-interwork usecases (such as for
da850evm_defconfig), where inline assmebly such as
  mrc p15,0,r2,c1,c0,0
causes the compiler to fail during LTO linking with
  Error: selected processor does not support `mrc p15,0,r2,c1,c0,0'
         in Thumb mode

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
86c5e21013 ARM: make gd a function call for LTO and set via set_gd()
On ARM, the gd pointer is stored in registers r9 / x18. For this the
-ffixed-r9 / -ffixed-x18 flag is used when compiling, but using global
register variables causes errors when building with LTO, and these
errors are very difficult to overcome.

Richard Biener says [1]:
  Note that global register vars shouldn't be used with LTO and if they
  are restricted to just a few compilation units the recommended fix is
  to build those CUs without -flto.

We cannot do this for U-Boot since all CUs use -ffixed-reg flag.

It seems that with LTO we could in fact store the gd pointer differently
and gain performance or size benefit by allowing the compiler to use
r9 / x18. But this would need more work.

So for now, when building with LTO, go the clang way, and instead of
declaring gd a global register variable, we make it a function call via
macro.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68384

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
82b63e9541 ARM: global_data: make set_gd() work for armv5 and armv6
The Thumb instruction `ldr` is able to move high registers only from
armv7. For armv5 and armv6 we have to use `mov`.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
1b457e753e sandbox: enable LTO by default
Build sandbox targets with LTO by default.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24 14:21:30 -04:00
Marek Behún
94bb891e8e sandbox: make LTO available
Make LTO available for sandbox architecture.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24 14:21:30 -04:00
Marek Behún
d1f81fd015 sandbox: use sections instead of symbols for getopt array boundaries
In style of linked lists, instead of declaring symbols for boundaries
of getopt options array in the linker script, declare corresponding
sections and retrieve the boundaries via static inline functions.

Without this clang's LTO produces binary without any getopt options,
because for some reason it thinks that array is empty (start and end
symbols are at the same address).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
958f2e57ef build: use thin archives instead of incremental linking
Currently we use incremental linking (ld -r) to link several object
files from one directory into one built-in.o object file containing the
linked code from that directory (and its subdirectories).

Linux has, some time ago, moved to thin archives instead.

Thin archives are archives (.a) that do not really contain the object
files, only references to them.

Using thin archives instead of incremental linking
- saves disk space
- apparently works better with dead code elimination
- makes things easier for LTO

The third point is the important one for us. With incremental linking
there are several options how to do LTO, and that would unnecessarily
complicate things.

We have to use the --whole-archive/--no-whole-archive linking option
instead of --start-group/--end-group, otherwise linking may fail because
of unresolved symbols, or the resulting binary will be unusable.

We also need to use the P flag for ar, otherwise final linking may fail.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Marek Behún
236f2ec432 treewide: Convert macro and uses of __section(foo) to __section("foo")
This commit does the same thing as Linux commit 33def8498fdd.

Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.

Remove the quote operator # from compiler_attributes.h __section macro.

Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Tom Rini
a4262e5506 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Sync Armada mvpp2 ethernet driver with Marvell version (misc Marvell
  authors)
2021-05-20 11:06:56 -04:00
Tom Rini
fd883eaf5b Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2021-05-20 11:06:33 -04:00
Stefan Roese
c350601348 arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode "2500base-x"
With commit 8678776df6 (arm: mvebu: armada-3720-uDPU: fix PHY mode
definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even
when this is functionally incorrect since "2500base-x" was not supported
in U-Boot at that time. As this mode is now supported (at least present
in the headers), this patch moves back to the orinal version.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Cc: Vladimir Vid <vladimir.vid@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2021-05-20 13:05:31 +02:00
Bin Meng
84dee33ca8 riscv: Drop USE_SPL_FIT_GENERATOR
Now that we have switched to binman to generate u-boot.itb for all
RISC-V boards, USE_SPL_FIT_GENERATOR is no longer needed and can
be dropped.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19 17:01:51 +08:00
Bin Meng
cc269e1c00 riscv: ae350: Switch to use binman to generate u-boot.itb
Use the new BINMAN_STANDALONE_FDT option for AE350 based SPL defconfigs,
so that binman is now used to generate u-boot.itb.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-19 17:01:51 +08:00
Bin Meng
756eeba8a2 riscv: qemu: Switch to use binman to generate u-boot.itb
By utilizing the newly introduced BINMAN_STANDALONE_FDT option, along
with a new dedicated device tree source file for the QEMU virt target
used for binman only, we can now use binman to generate u-boot.itb.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19 17:01:51 +08:00
Bin Meng
18cb82c35c riscv: dts: Sort build targets in alphabetical order
Sort the RISC-V DTS build targets by their Kconfig target names in
alphabetical order.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19 17:01:50 +08:00
Bin Meng
0784510f74 riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb
At present SiFive Unleashed board uses the Makefile to create the FIT,
using USE_SPL_FIT_GENERATOR, which is deprecated as per the Makefile
warning. Update to use binman instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19 17:01:50 +08:00
Michal Simek
a502a87bc0 arm64: zynqmp: Add description for SOM/Kria boards
The patch contains several DT files for SOM platform.
Carrier card is sck-kv (KV260) revA/B. SMK-K26 is description for starter
kit which doesn't have EMMC populated. And SM-K26 is full som with EMMC.

Files are divided in this way to make sure that SOM can be plugged to
different carrier card and all peripherals on SOM (or defined by a spec) can
be used by U-Boot. Full DT for SOM+CC can be merged together as overlays.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19 09:44:50 +02:00
Michal Simek
3195840c94 arm64: zynqmp: Add psgtr DT descriptions
Mainline kernel has psgtr driver that's why it is good to add description
to DT files. Some boards are just missing description for USB3 and sata.
zc1751-dc1 and p-a2197 are also missing clock descriptions for input
clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19 09:44:50 +02:00
Michal Simek
bd00849ae9 arm64: zynqmp: Add pinctrl description
ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it
DT files can be extended by pinctrl configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19 09:44:50 +02:00
T Karthik Reddy
50a6bd000f arm64: zynqmp: Add zynqmp firmware specific DT nodes
Probe zynqmp firmware driver by adding zynqmp firmware, power &
ipi mailbox device tree nodes for mini emmc.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2021-05-19 09:44:50 +02:00
Michal Simek
26d8eccea7 arm64: zynqmp: Add missing mio-bank properties to sdhci
Add missing xlnx,mio-bank property to sdhci node. Also add properties with
0 value to have it listed in case that files are copied to different
projects where default case doesn't need to be handled in the same way.
That's why explicitly list them too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19 09:44:50 +02:00
Michal Simek
fddff6815a arm64: zynqmp: Remove comment about clock chips
These comments weren't push to mainline that's why remove them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19 09:44:50 +02:00
Raviteja Narayanam
486f25c727 arm64: zynqmp: Add 'i2c-mux-idle-disconnect' property
I2C muxes that have the slave devices with same address are
falling into the below problem.

VCK190 system controller (SC) - zynqmp-e-a2197-00-revA.dts
I2C1 (0xff030000) -> Mux1 (@0x74) -> Channel 3 -> 0x50
I2C1 (0xff030000) -> Mux2 (@0x75) -> Channel 0 -> 0x50

1. SC accesses I2C1 - Mux1 (0x74) - Channel 3 and then
2. SC accesses I2C1 - Mux2 (0x75) - Channel 0.

Now it results in 2 slave devices with same address (0x50)
on the I2C bus, making the communication un-reliable.

When ' i2c-mux-idle-disconnect' is in DT, after '1', the Mux
channel output is disconnected, making none of the channels
available to the I2C1. So, there is no question of having the
same addressed slave (0x50) present on the bus when we are doing '2'.

Same pattern is seen in below two boards also.

ZCU208 - zynqmp-zcu208-revA.dts
ZCU216 - zynqmp-zcu216-revA.dts

Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
2021-05-19 09:44:50 +02:00
Saeed Nowshadi
000b862325 arm64: zynqmp: Add label to all GPIO lines for VCK190 SC
Add label to GPIO lines so the user-level applications can find any line
without knowing its physical path on System Controller on VCK190/VMK180.

These labels are describing EMIO gpio connection which depends on PL which
we normally don't describe but that's only way to go for now. Lately this
should be done out of this source code.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19 09:44:50 +02:00
Saeed Nowshadi
65a572b1d0 arm64: zynqmp: Add 'silabs,skip-recall' to DDR DIMM si570 clk node
The 'silabs,skip-recall' property prevents interruption in operation of
the clock while the driver is being probed.  Without this property, the
DDR DIMM clk can cause a failure during Versal's boot.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
2021-05-19 09:44:50 +02:00
Michal Simek
a34a12fabc arm64: zynqmp: Add missing silabs,skip-recall for si570 ref clk nodes
All si570 which are used for ps reference clock generation should contain
silabs,skip-recall property not to cause break on ps clock.
On Versal boards this will cause hang on Versal cpu when it is booted at
the same time with SC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19 09:44:50 +02:00
Tom Rini
52993fcb76 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2021-05-18 11:09:41 -04:00
Bin Meng
89419279f4 riscv: Group assembly optimized implementation of memory routines into a submenu
Currently all assembly optimized implementation of memory routines
show up at the top level of the RISC-V architecture Kconfig menu.
Let's group them together into a submenu.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-17 16:47:33 +08:00