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arm64: zynqmp: Add 'silabs,skip-recall' to DDR DIMM si570 clk node

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The 'silabs,skip-recall' property prevents interruption in operation of
the clock while the driver is being probed.  Without this property, the
DDR DIMM clk can cause a failure during Versal's boot.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
This commit is contained in:
Saeed Nowshadi 2021-03-22 11:58:38 -07:00 committed by Michal Simek
parent a34a12fabc
commit 65a572b1d0
1 changed files with 2 additions and 1 deletions
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3
arch/arm/dts/zynqmp-e-a2197-00-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx Versal a2197 RevA System Controller
*
* (C) Copyright 2019 - 2020, Xilinx, Inc.
* (C) Copyright 2019 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
@ -505,6 +505,7 @@
factory-fout = <200000000>;
clock-frequency = <200000000>;
clock-output-names = "si570_ddrdimm1_clk";
silabs,skip-recall;
};
};
i2c@4 { /* LPDDR4_SI570_CLK2 */