Commit graph

14113 commits

Author SHA1 Message Date
Mike Frysinger
5aa5b88404 Blackfin: define CONFIG_SYS_CACHELINE_SIZE
Common U-Boot API wants this define, so import asm/cache.h from Linux
to provide suitable defines.

Acked-by: Anton Staaf <robotboy@chromium.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-17 22:25:32 +02:00
Helmut Raiger
82a04900a5 video: Moving mx3fb.c to CONFIG_VIDEO
mx3fb.c was based on CONFIG_LCD and is moved by this patch to
CONFIG_VIDEO, which has greater freedom in selecting videomodes
even at runtime.

This renders the accumulating list of display defines
(CONFIG_DISPLAY_VBEST..., CONFIG_DISPLAY_C057...) obsolete as
these may be setup through env variables:

uboot> setenv mydisplay 'video=ctfb240,y:320,depth:16,mode:0,pclk:185925,
	le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:100663296,vmode:0'
uboot> setenv videomode ${mydisplay}

This commit also fixes the board config files for qong and
imx31_phycore boards as needed. The videomode settings of
previously supported displays are added to CONFIG_EXTRA_ENV_SETTINGS
now. CONFIG_SYS_MALLOC_LEN for imx31_phycore board is increased
to make the frame buffer allocation working with the changed
driver.

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2011-10-17 22:25:32 +02:00
Helmut Raiger
3f480bf7c3 mx31: make HSP clock for mx3fb driver available
This additionally updates mx31/generic.c by
- replacing __REG() macro accesses with readl() and writel()
- providing macros for PDR0 and PLL bit accesses

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-17 22:25:32 +02:00
Marek Vasut
711a6722f9 MX5: Make IPU display output and pixel format configurable
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-17 22:25:32 +02:00
Stefano Babic
3d1d5e2379 VIDEO: MX5: export pix format
Pixel format defines must be available for boards to set up
the right display. Move them and export in a new file.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-17 22:25:32 +02:00
Stefano Babic
63f832fbb8 VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the driver knows only later which is
the resolution of the display. The patch switches the driver
to CONFIG_VIDEO and the memory is allocated by the driver itself.

We also need to switch the vision2 board code and config file
in the same commit so that this commit will be bisectable.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-17 22:25:31 +02:00
Timur Tabi
3c59e3986c video: update the Freescale DIU driver to use linux/fb.h
Update the Freescale DIU video driver (fsl_diu_fb.c) to use linux/fb.h.
Some data structures from this header file were just copied into
fsl_diu_fb.c.

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-10-17 22:25:31 +02:00
Mike Frysinger
d4590da436 powerpc: cpm2 boards: update fcc register logic
In the recent dropping of !NET_MULTI code (commit e2a53458a7),
I misread the logic in include/net.h.  Some of it was used by NET_MULTI
code as glue between the multi/non-multi worlds for cpm2 boards.

Rather than restore the block of code, push the logic to the board config
headers where it all belongs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-17 22:25:31 +02:00
Wolfgang Denk
d639a8ccb0 Merge branch 'master' of git://git.denx.de/u-boot-blackfin
* 'master' of git://git.denx.de/u-boot-blackfin:
  Blackfin: bfin_spi: fix build error when DEBUG is defined
  Blackfin: define CONFIG_SYS_CACHELINE_SIZE
2011-10-17 21:50:52 +02:00
Wolfgang Denk
10d1a160f5 Merge branch 'master' of git://git.denx.de/u-boot-video
* 'master' of git://git.denx.de/u-boot-video:
  video: Moving mx3fb.c to CONFIG_VIDEO
  mx31: make HSP clock for mx3fb driver available
  MX5: Make IPU display output and pixel format configurable
  VIDEO: MX5: export pix format
  VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
  video: update the Freescale DIU driver to use linux/fb.h
2011-10-17 21:48:20 +02:00
Anatolij Gustschin
92faa8b109 zlib: handle overflow while calculating available stream input size
If compressed data is located in sectors at the end of the flash and
it's offset + input stream size > 0xFFFFFFFF, the uncompressing time
is very long, since processing of the stream is done bytewise (and
not blockwise) due to overflow in inflate_fast() while calculation
and checking for enough input available.

Check for this overflow condition and limit the available stream
input size to the actually max. possible input size. This fixes
the problem.

The issue is easily reproduceable by placing a gziped bitmap in flash,
e.g. at FFF80000, and running 'bmp' commands like 'bmp info FFF80000'
or 'bmp display FFF80000'. The uncompressing can take up to 3 sec.
whereas it should normaly take a fraction of a second. If the
'splashimage' environment variable points to this address, the
booting time also increases significantly.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-17 21:45:35 +02:00
Mike Frysinger
e2f014503e Blackfin: bfin_spi: fix build error when DEBUG is defined
The new debug() changes pointed out debug code that rotted a little.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-16 14:22:19 -04:00
Mike Frysinger
8e5c1edadf Blackfin: define CONFIG_SYS_CACHELINE_SIZE
Common U-Boot API wants this define, so import asm/cache.h from Linux
to provide suitable defines.

Acked-by: Anton Staaf <robotboy@chromium.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-16 14:22:19 -04:00
Mike Frysinger
8d80d05753 serial_exit: punt unused prototype
No code defines or calls this, so drop the prototype.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Simon Glass <sjg@chromium.org>
2011-10-15 22:20:59 +02:00
Mike Frysinger
464c79207c punt unused clean/distclean targets
The top level Makefile does not do any recursion into subdirs when
cleaning, so these clean/distclean targets in random arch/board dirs
never get used.  Punt them all.

MAKEALL didn't report any errors related to this that I could see.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-15 22:20:36 +02:00
Daniel Schwierzeck
fa28bd2eef common: fix missing function pointer relocation in fixup_cmdtable()
The command auto-completion does not work on architectures relying
on CONFIG_NEEDS_MANUAL_RELOC like MIPS. Cause is the missing function
pointer fixup for cmd_tbl_t::complete function in fixup_cmdtable().

This patch adds the missing pointer fixup in case of CONFIG_AUTO_COMPLETE
is defined.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2011-10-15 22:19:36 +02:00
Anatolij Gustschin
4fc823ddb4 mpc5200: digsy_mtc: fix detection of Coral-PA
A delay of approximately 250 ms after PCI bus reset in
pci_mpc5xxx_init() is needed to recognize the Coral-PA
controller on the graphic extention board.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-10-15 22:18:39 +02:00
Anatolij Gustschin
0da1fb03c5 pci: move pcidelay code to new location just before PCI bus scan
PCI cards might need some time after reset to respond. On some
boards (mpc5200 or mpc8260 based) the PCI bus reset is deasserted
at pci_init_board() time, so we currently can not use available
"pcidelay" option for waiting before PCI bus scan since this
waiting takes place before calling pci_init_board(). By moving
the pcidelay code to the new location using of the "pcidelay"
option is possible on mpc5200 or mpc8260 based boards, too.

Since pci_hose_scan() could be called multiple times, restrict
the function to wait only during its first call and to ignore
pcidelay for any further call (as pointed out by Matthias).

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2011-10-15 22:16:53 +02:00
Michal Simek
4f1ec4c176 net: axi_ethernet: Add driver to u-boot
Add axi_ethernet driver for little-endian Microblaze.

RX/TX BDs and rxframe buffer are shared among all axi_ethernet MACs.
Only one MAC can work in one time.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-15 22:12:05 +02:00
Michal Simek
5ac83801f9 net: emaclite: Fix coding style
Coding style should follow linux coding style.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-15 22:09:43 +02:00
Michal Simek
8043925204 net: emaclite: Use PKTSIZE directly
Do not setup additional ENET_MAX_MTU macro.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-15 22:09:27 +02:00
Michal Simek
947324b9ca net: emaclite: Setup RX/TX ping pong for every instance
Setup RX/TX ping-pong buffer for every emaclite IP separately.
The next patch move initialization directly to board code.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-15 22:06:38 +02:00
Wolfgang Denk
7bf5228ce1 Merge branch 'master' of git://git.denx.de/u-boot-fdt
* 'master' of git://git.denx.de/u-boot-fdt:
  powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandles
  fdt: update fdt_alloc_phandle to use fdt_get_phandle
  fdt: check for fdt errors in fdt_create_phandle
  fdt: Add a do_fixup_by_path_string() function
2011-10-15 22:00:01 +02:00
Timur Tabi
a2c1229c39 powerpc/85xx: use fdt_create_phandle() to create the Fman firmware phandles
Function fdt_create_phandle() conveniently creates new phandle properties
using both "linux,phandle" and "phandle", so it should be used by all code
that wants to create a phandle.

The Fman firmware code, which embeds an Fman firmware into the device tree,
was creating the phandle properties manually.  Instead, change it to use
fdt_create_phandle().

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-10-15 09:35:15 -04:00
Timur Tabi
50bf17bd15 fdt: update fdt_alloc_phandle to use fdt_get_phandle
The device tree compiler, dtc, can use "phandle" and/or "linux,phandle"
properties to specify the phandle for any node.  By default, it uses
both, but "linux,phandle" is deprecated.  One day, we'd like to stop using
"linux,phandle", but U-boot needs to support both properties equally
first.

fdt_alloc_phandle() generates a unique phandle, but it was only checking
the "linux,phandle" properties.  Instead, we use fdt_get_phandle(),
which checks both properties automatically.  This ensures that we
support dtbs that only use "phandle".

The side-effect is that fdt_alloc_phandle() now takes twice as long, since
it has to check for two properties instead of one in each node that it
searches.

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-10-15 09:35:09 -04:00
Timur Tabi
3c927cccdc fdt: check for fdt errors in fdt_create_phandle
fdt_create_phandle() was ignoring errors from fdt_set_phandle().  If an
error occurs, print an error message and return 0, which is an invalid
phandle.  We also need to change the return type for fdt_create_phandle()
to indicate that it cannot return an error code.

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-10-15 09:35:00 -04:00
Chunhe Lan
8ddb10eae0 fdt: Add a do_fixup_by_path_string() function
The do_fixup_by_path_string() will set the specified node's property to the
value contained in "status". It would just be an inline wrapper for
do_fixup_by_path() that calls strlen on the argument.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
2011-10-15 09:34:49 -04:00
Kumar Gala
e140aad18a powerpc/85xx: Drop CONFIG_VIDEO on P1_P2_RDB-PC boards to reduce size
With older compilers (gcc-4.2.x) we run into issues that resulting image
is too large.  We can save a bunch of space by removing the video support.
In general video support on these boards is a nice to have since it
requires a PCIe add-on card.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:57:48 -05:00
Timur Tabi
2339e4972f phylib: wait for TN2020 to achieve SERDES lane alignment at startup
Before the Teranetics TN2020 PHY can be used, the SERDES lanes need to be
aligned, so wait for lane alignment before completing the startup sequence.

Note that this process can take up to three seconds.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:11 -05:00
Timur Tabi
7f92c3a275 powerpc/p3060: remove all references to RCW bits EC1_EXT, EC2_EXT, and EC3
The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the
P3060 and should always be set to zero.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
chenhui zhao
b76aef60df powerpc/mpc8548cds: Add 36-bit support
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
chenhui zhao
fff80975ae powerpc/mpc8548cds: Code cleanup and refactoring
- Rework tlb and law tables.
- PCI2 is not available on MPC8548CDS, so remove it.
- Move the memory map to the board config file.
- Rewrite the board info according to the manual.
- Remove unnecessary macros and redefine some macros to align with other boards.
- Fix some typos.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
Haiying Wang
34fdbdf8d9 powerpc/p3041: fixup portal config info
P3041 has 10 qman portals, we need to configure all of them:
* As there are only 4 physical cores sdest can only be 0 to 3
* We assign dqrr & frame data LIODNs for all portals so if they
  are utilized the proper mapping tables can be setup uniquely
  (PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
  assignments are tuned around an assumption of at most 5
  partitions.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
Haiying Wang
510f28cff9 powerpc/p2041: fixup portal config info
P2041 has 10 qman portals, we need to configure all of them:
* As there are only 4 physical cores sdest can only be 0 to 3
* We assign dqrr & frame data LIODNs for all portals so if they
  are utilized the proper mapping tables can be setup uniquely
  (PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
  assignments are tuned around an assumption of at most 5
  partitions.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
Haiying Wang
7c7bd635be powerpc/p5020: fixup portal config info
P5020 has 10 qman portals, we need to configure all of them:
* As there are only 2 physical cores sdest can only be 0 or 1
* We assign dqrr & frame data LIODNs for all portals so if they
  are utilized the proper mapping tables can be setup uniquely
  (PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
  assignments are tuned around an assumption of at most 5
  partitions.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:09 -05:00
Kuldip Giroh
56a69ff855 powerpc/85xx: Added secure boot option for P2041RDB boards
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:09 -05:00
Helmut Raiger
62a22dca32 video: Moving mx3fb.c to CONFIG_VIDEO
mx3fb.c was based on CONFIG_LCD and is moved by this patch to
CONFIG_VIDEO, which has greater freedom in selecting videomodes
even at runtime.

This renders the accumulating list of display defines
(CONFIG_DISPLAY_VBEST..., CONFIG_DISPLAY_C057...) obsolete as
these may be setup through env variables:

uboot> setenv mydisplay 'video=ctfb240,y:320,depth:16,mode:0,pclk:185925,
	le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:100663296,vmode:0'
uboot> setenv videomode ${mydisplay}

This commit also fixes the board config files for qong and
imx31_phycore boards as needed. The videomode settings of
previously supported displays are added to CONFIG_EXTRA_ENV_SETTINGS
now. CONFIG_SYS_MALLOC_LEN for imx31_phycore board is increased
to make the frame buffer allocation working with the changed
driver.

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2011-10-13 10:41:36 +02:00
Helmut Raiger
f00291985b mx31: make HSP clock for mx3fb driver available
This additionally updates mx31/generic.c by
- replacing __REG() macro accesses with readl() and writel()
- providing macros for PDR0 and PLL bit accesses

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-13 12:27:24 +02:00
Marek Vasut
02ae1a1860 MX5: Make IPU display output and pixel format configurable
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-13 12:26:31 +02:00
Stefano Babic
92a98a4a39 VIDEO: MX5: export pix format
Pixel format defines must be available for boards to set up
the right display. Move them and export in a new file.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-13 12:26:30 +02:00
Stefano Babic
e9934f0b60 VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the driver knows only later which is
the resolution of the display. The patch switches the driver
to CONFIG_VIDEO and the memory is allocated by the driver itself.

We also need to switch the vision2 board code and config file
in the same commit so that this commit will be bisectable.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-10-13 12:26:30 +02:00
Timur Tabi
8c6b25046d video: update the Freescale DIU driver to use linux/fb.h
Update the Freescale DIU video driver (fsl_diu_fb.c) to use linux/fb.h.
Some data structures from this header file were just copied into
fsl_diu_fb.c.

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-10-13 12:26:30 +02:00
Wolfgang Denk
d8fffa057c Merge branch 'master' of git://git.denx.de/u-boot-mips
* 'master' of git://git.denx.de/u-boot-mips:
  MIPS: Jz4740: Add qi_lb60 board support
  MIPS: Jz4740: Add NAND driver
  MIPS: Ingenic XBurst Jz4740 processor support
2011-10-12 22:47:15 +02:00
Wolfgang Denk
0dd78fb943 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
* 'master' of git://git.denx.de/u-boot-ppc4xx:
  ppc4xx: Change DDR2 CL from 4 to 5 for intip
  ppc4xx: Improve lm63 pwm on dlvision-10g
  ppc4xx: Do not stop booting on any keypress on intip
2011-10-12 22:45:30 +02:00
Wolfgang Denk
f6d99aa947 Merge branch 'master' of git://git.denx.de/u-boot-ubi
* 'master' of git://git.denx.de/u-boot-ubi:
  UBI: init eba tables before wl when attaching a device
  ubifs bad superblock bug
2011-10-12 22:44:36 +02:00
Wolfgang Denk
e5a0717176 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
* 'master' of git://git.denx.de/u-boot-nand-flash:
  NAND: davinci: choose correct 1-bit h/w ECC reg
2011-10-12 22:43:54 +02:00
Wolfgang Denk
37eefe80bb Merge branch 'master' of git://git.denx.de/u-boot-microblaze
* 'master' of git://git.denx.de/u-boot-microblaze:
  microblaze: Copy bootfile from variables
  microblaze: Fix unaligned.h for endians
  microblaze: Initialize jumptable and console
  microblaze: Support flashes on lower addresses
  microblaze: Call common console_init_f initialization function
2011-10-12 22:42:28 +02:00
Xiangfu Liu
3c945542da MIPS: Jz4740: Add qi_lb60 board support
Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device
from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot.
The initial bring-up assumes that U-Boot is directly loaded into SDRAM
using USB boot tool, and starts from 0x80100000.

About USB boot tool
-------------------

Jz4740 is one of the XBurst processors with USB boot functionality
supported.  The CPU can boot from a small ROM in the LSI, initialize
CPU and USB module, then wait for USB commands from the USB host.
We can send 8 KB binary data to the CPU cache using USB boot tool.

USB boot tool is available to the public at Ingenic website.  Also
there is an alternative Debian package named xburst-tools.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-12 23:28:49 +09:00
Xiangfu Liu
3a6591a86a MIPS: Jz4740: Add NAND driver
Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices

nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-12 23:28:37 +09:00
Dirk Eibach
15cc385e68 ppc4xx: Change DDR2 CL from 4 to 5 for intip
Some intip boards don't seem to run stable with CL4, datasheets suggest that
CL5 is the safe value.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-10-12 11:50:42 +02:00