Commit graph

84 commits

Author SHA1 Message Date
Wolfgang Denk
3765b3e7bd Coding Style cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-10-14 16:06:53 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Hung-ying Tyan
c8d3328a0a cros: add LPC support for cros_ec
This patch adds LPC support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2013-06-26 10:13:28 -04:00
Hung-ying Tyan
f3424c554c cros: exynos: add SPI support for cros_ec
This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2013-06-26 10:13:24 -04:00
Hung-ying Tyan
78764a4e11 cros: add I2C support for cros_ec
This patch adds I2C support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2013-06-26 10:12:24 -04:00
Hung-ying Tyan
88364387c6 cros: add cros_ec driver
This patch adds the cros_ec driver that implements the protocol for
communicating with Google's ChromeOS embedded controller.

Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2013-06-26 10:07:11 -04:00
Albert ARIBAUD
cac423a730 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-05-11 22:24:28 +02:00
Nishanth Menon
0208aaf6c2 twl4030: make twl4030_i2c_write_u8 prototype consistent
u-boot standard i2c register write prototype is
i2c_reg_write(u8 addr, u8 reg, u8 val)

twl4030_i2c_write_u8(u8 addr, u8 val, u8 reg)
does not provide consistency, so switch the prototype to be
consistent with rest of u-boot i2c operations:
twl4030_i2c_write_u8(u8 addr, u8 reg, u8 val)

Signed-off-by: Nishanth Menon <nm@ti.com>
2013-05-10 08:25:54 -04:00
Benoît Thébaudeau
112fd2ec6c Add mxc_ocotp driver
Add an mxc_ocotp driver for i.MX6.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-04-28 11:07:43 +02:00
Benoît Thébaudeau
0f67e09e9e Add fsl_iim driver
Add a fsl_iim driver common to i.MX and MPC.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-04-28 11:07:41 +02:00
Vadim Bendebury
b012bc94ac x86: Add console command to display CBMEM console buffer
This command is useful to allow to observe messages generated by
coreboot and u-boot until present. In particular it is handy when
u-boot is instrumented to fall through into console mode on startup
errors.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Vadim Bendebury
98ab435f73 x86: Add CBMEM console driver for coreboot
This patch builds upon the recently introduced CBMEM console
feature of coreboot.

CBMEM console uses a memry area allocated by coreboot to store
the console output. The memory area has a certain structure,
which allows to determine where the buffer is, the buffer size
and the location of the pointer in the buffer. This allows
different phases of the firmware (rom based coreboot, ram based
coreboot, u-boot after relocation with this change) to keep
adding text to the same buffer.

Note that this patch introduces a new console driver and adds the
driver to the list of drivers to be used for console output, i.e.
it engages only after u-boot relocates. Usiong CBMEM console for
capturing the pre-relocation console output will be done under a
separate change.

>From Linux, run the cbmem.py utility (which is a part of the coreboot
package) to see the output, e.g.:

vvvvvvvvvvvvvvvvv
SCSI:  AHCI 0001.0300 32 slots 6 ports ? Gbps 0xf impl SATA mode
flags: 64bit ilck stag led pmp pio
...
Magic signature found
Kernel command line: "cros_secure  quiet loglevel=1 console=tty2...
^^^^^^^^^^^^^^^^^

Note that the entire u-boot output fits into the buffer only if
the coreboot log level is reduced from the most verbose. Ether
the buffer size will have to be increased, or the coreboot
verbosity permanently reduced.

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-11-30 13:44:03 -08:00
Scott Wood
8bc50f0b6d powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxx
It's arch code and not a driver, so move it where it belongs.  When it
originally went into drivers/misc there was no 8xxx CPU directory.

This will make new-SPL support a little easier since we can keep the CPU
stuff together and not need to pull stuff in from drivers/misc.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2012-11-26 15:41:22 -06:00
Łukasz Majewski
e0a0cbf247 pmic: Move pmic related code to ./drivers/power directory
The PMIC framework has been moved to its more natural place
./drivers/power from ./drivers/misc directory.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-14 11:21:09 +01:00
Łukasz Majewski
c733681507 pmic: Extend PMIC framework to support multiple instances of PMIC devices
The PMIC framework has been extended to support multiple instances of
the variety of devices responsible for power management.
This change allows supporting of e.g. fuel gauge, charger, MUIC (Micro USB
Interface Circuit).
Power related includes have been moved to ./include/power directory.
This is a first of a series of patches - in the future "pmic" will be
replaced with "power".

Two important issues:
1. The PMIC needs to be initialized just after malloc is configured
2. It uses list to hold information about available PMIC devices

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:09 +01:00
Łukasz Majewski
452329f1d5 pmic:max8997: Switch the MAX8997 PMIC to be used with multibus I2C
PMIC MAX8997 is now ready to work with single and multibus soft I2C
implementation.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-14 11:21:07 +01:00
Łukasz Majewski
86879d7120 pmic:i2c: Add I2C sensor byte order (big/little) to PMIC framework
Since the pmic_reg_read is the u32 value, the order in which bytes
are placed to form u32 value is important.

Support for big and little sensor endianess is added.

Moreover calls to [leXX|beXX]_to_cpu have been added to support
little and big endian SoCs.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-14 11:21:07 +01:00
Łukasz Majewski
b5bf9cafea pmic:i2c: Handle PMIC I2C transmission comprising of two bytes
This patch adds support for proper handling of a PMIC I2C transmission
comprising of two bytes.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-11-14 11:21:07 +01:00
Liu Gang
461632bd71 powerpc/corenet_ds: Slave module for boot from PCIE
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.

Slave's ucode and ENV can be stored in master's memory space, then slave
can fetch them through PCIE interface. For the corenet platform, ucode is
for Fman.

NOTE: Because the slave can not erase, write master's NOR flash by
	  PCIE interface, so it can not modify the ENV parameters stored
	  in master's NOR flash using "saveenv" or other commands.

environment and requirement:

master:
	1. NOR flash for its own u-boot image, ucode and ENV space.
	2. Slave's u-boot image is in master NOR flash.
	3. Put the slave's ucode and ENV into it's own memory space.
	4. Normally boot from local NOR flash.
	5. Configure PCIE system if needed.
slave:
	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
	2. Boot location should be set to one PCIE interface by RCW.
	3. RCW should configure the SerDes, PCIE interfaces correctly.
	4. Must set all the cores in holdoff by RCW.
	5. Must be powered on before master's boot.

For the slave module, need to finish these processes:
	1. Set the boot location to one PCIE interface by RCW.
    2. Set a specific TLB entry for the boot process.
	3. Set a LAW entry with the TargetID of one PCIE for the boot.
	4. Set a specific TLB entry in order to fetch ucode and ENV from
	   master.
	5. Set a LAW entry with the TargetID one of the PCIE ports for
	   ucode and ENV.
	6. Slave's u-boot image should be generated specifically by
	   make xxxx_SRIO_PCIE_BOOT_config.
	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.

In addition, the processes are very similar between boot from SRIO and
boot from PCIE. Some configurations like the address spaces can be set to
the same. So the module of boot from PCIE was added based on the existing
module of boot from SRIO, and the following changes were needed:
	1. Updated the README.srio-boot-corenet to add descriptions about
	   boot from PCIE, and change the name to
	   README.srio-pcie-boot-corenet.
	2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to
	   "xxxx_SRIO_PCIE_BOOT", and the image builded with
	   "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and
	   from PCIE.
	3. Updated other macros and documents if needed to add information
	   about boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:15 -05:00
Liu Gang
81fa73bab0 powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macro
When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.

This has the following advantages:
	1. No longer need to rebuild an image when change the SRIO port for
	   boot from SRIO, just rewrite the new RCW with selected port,
	   then the code will get the port information by reading new RCW.
	2. It will be easier to support other boot location options, for
	   example, boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:14 -05:00
Fabio Estevam
ed5157e889 pmic: dialog: Avoid name conflicts
As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC,
we need to be able to build both drivers.

Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Fabio Estevam
20831061d8 pmic: Add support for the Dialog DA9053 PMIC
Add support for the Dialog DA9053 PMIC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:31 +02:00
Łukasz Majewski
8504296045 misc:pmic:max8997 MAX8997 support for PMIC driver
This commit adds support for MAX8997 PMIC driver.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:29 +02:00
Fabio Estevam
a22429d2bf pmic_i2c: Return error in case of invalid pmic_i2c_tx_num
Return error in case of invalid pmic_i2c_tx_num.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-03-27 09:41:16 +02:00
Helmut Raiger
435a728587 misc: pmic: fix regression in pmic_fsl.c (SPI)
This fixes write access to PMIC registers, the bug was
introduced partly in commit 64aac65099 and in commit c9fe76dd91.
It was tested on an i.mx31 with a mc13783.

Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-11-03 22:56:18 +01:00
Stefano Babic
f8f96129bf misc: pmic: drop old Freescale's pmic driver
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-10-27 21:56:32 +02:00
Stefano Babic
b7b7d3ccfd misc: pmic: addI2C support to pmic_fsl driver
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-10-27 21:56:31 +02:00
Stefano Babic
d69edadee7 misc: pmic: use I2C_SET_BUS in pmic I2C
Instead of using directly the i2c_set_bus() function,
the I2C_SET_BUS macro must be used to avoid build
errors for targets without multibus I2C.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-10-27 21:56:31 +02:00
Stefano Babic
b2e5add3b2 misc: pmic: Freescale PMIC switches to generic PMIC driver
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2011-10-27 21:56:31 +02:00
Łukasz Majewski
993858585d misc:pmic:max8998 MAX8998 support at a new PMIC driver.
This commit adds support for MAX8998 PMIC driver.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2011-10-27 21:56:31 +02:00
Łukasz Majewski
e542b7f0a2 misc:pmic:core New generic PMIC driver
I2C or SPI PMIC devices can be accessed.
Separate files: pmic_i2c.c and pmic_spi.c are responsible
for handling transmission over I2C or SPI bus.

New flags:
CONFIG_PMIC - enable PMIC general device.
CONFIG_PMIC_I2C/SPI - specify the interface to be used.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
2011-10-27 21:56:31 +02:00
Jason Liu
50cf807343 cosmetic: fsl_pmic: cosmetic for the help message
This is cosmetic patch for the help message:

Before:
pmic dump [numregs] dump registers
After:
pmic dump [numregs] - dump registers

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-09-30 22:01:00 +02:00
Albert ARIBAUD
fa82f871c8 Convert ISO-8859 files to UTF-8
There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 files to UTF-8.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-08-04 23:34:02 +02:00
Wolfgang Denk
cd6881b519 Minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-05-19 22:22:44 +02:00
Kumar Gala
7639675131 powerpc/8xxx: Fix LAW init to respect pre-initialized entries
If some pre-boot or earlier stage bootloader (NAND SPL) has setup LAW
entries consider them good and mark them used.

In the NAND SPL case we skip re-initializing based on the law_table
since the SPL phase already did that.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:41 -05:00
Kumar Gala
8e29ebabf8 fsl_law: Fix LAW printing function
We had an extra '0x' in the output of the LAWAR header that would cause
output like:

LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d

intead of:

LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-22 23:25:19 -06:00
Stefano Babic
01bb24b642 Add basic support for Freescale's mc9sdz60
The patch adds helper funtions for basic access to the registers
of the MC9sdz60 chip (multifunctional device with RTC and CAN) via
I2C interface.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-02-02 00:54:43 +01:00
Liu Hui-R64343
3382fd48f2 fsl_pmic: add I2C interface support
This patch add I2C interface for fsl_pmic driver support

Signed-off-by: Jason Liu <r64343@freescale.com>
2011-02-02 00:54:42 +01:00
Kumar Gala
243be8e296 powerpc/8xxx: Introduce 85xx, 86xx, QorIQ config headers
Add new headers that capture common defines for a given SoC/processor
rather than duplicating that information in board config.h and random
other places.

Eventually this should be handled by Kconfig & defconfigs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2011-01-19 22:58:23 -06:00
Kumar Gala
f193e3da98 powerpc/p2040: Add various p2040 specific information
Add P2040 SoC specific information:
* SERDES Table
* Added p2040 to cpu_type_list and SVR list
* Added number of LAWs for p2040
* Set CONFIG_MAX_CPUS to 4 for p2040

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
Poonam Aggrwal
b5debec5b5 powerpc/85xx: Add Support for Freescale P1014 Processor
The P1014 is similar to the P1010 processor with the following differences:

- 16bit DDR with ECC. (P1010 has 32bit DDR w/o ECC)
- no eCAN interface. (P1010 has 2 eCAN interfaces)
- Two SGMII interface (P1010 has 3 SGMII)
- No secure boot

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
Poonam Aggrwal
b8cdd01462 powerpc/85xx: Add Support for Freescale P1010 Processor
Key Features include of the P1010:
* e500v2 core frequency operation of 500 to 800 MHz
* Power consumption less than 5.0 W at 800 MHz core speed
* Dual SATA 3 Gbps controllers with integrated PHY
* Dual PCI Express controllers
* Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSECs)
	* TCP/IP acceleration and classification capabilities
	* IEEE 1588 support
	* Lossless flow control
	* RGMII, SGMII
* DDR3 with support for a 32-bit data interface (40 bits including ECC),
  up to 800 MHz data rate 32/16-bit DDR3 memory controller
* Dedicated security engine featuring trusted boot
* TDM interface
* Dual controller area networks (FlexCAN) controller
* SD/MMC card controller supporting booting from Flash cards
* USB 2.0 host and device controller with an on-chip, high-speed PHY
* Integrated Flash controller (IFC)
* Power Management Controller (PMC)
* Four-channel, general-purpose DMA controller
* I2C controller
* Serial peripheral interface (SPI) controller with master and slave support
* System timers including a periodic interrupt timer, real-time clock,
  software watchdog timer, and four general-purpose timers
* Dual DUARTs

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-19 22:58:23 -06:00
Sebastien Carlier
6d8962e814 Switch from archive libraries to partial linking
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
2010-11-17 21:02:18 +01:00
Wolfgang Denk
e1b4c57096 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-10-13 20:59:47 +02:00
Ilya Yanok
7f0d241d5c led_display: split led display support into generic and hw-dependent parts
Split the display command into generic interface and hardware-specific
realization for PDSP188x LED display found on hmi1001 and manroland
boards. Simple interface for LED displays is defined in
include/led-display.h and described in doc/README.LED_display.
Driver-specific implementation was moved into drivers/misc/pdsp188x.c
file (enabled with CONFIG_PDSP188x set).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2010-10-12 22:44:33 +02:00
Stefano Babic
2f721d1733 MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51
The actual SPI driver for i.MX31 and i.MX51 controller
use a wrong byte ordering, because it is supposed
to work only with Freescale's devices, as the Power
Controllers (PMIC). The driver is not suitable for
general purposes, because the buffers passed to spi_xfer
must be 32-bit aligned, as it is used mainly to send
integer to PMIC devices.

The patch drops any kind of limitation and makes the
driver useful with devices controlled sending commands
composed by single bytes (or by a odd number of bytes), such as
spi flash, sensor, etc.

Because the byte ordering is changed,
any current driver using this controller must be adapted, too.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-30 14:42:14 +02:00
Wolfgang Denk
47e26b1bf9 cmd_usage(): simplify return code handling
Lots of code use this construct:

	cmd_usage(cmdtp);
	return 1;

Change cmd_usage() let it return 1 - then we can replace all these
ocurrances by

	return cmd_usage(cmdtp);

This fixes a few places with incorrect return code handling, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:43:57 +02:00
Kumar Gala
c26de2d8b1 powerpc/p3041: Add various p3041 related defines
There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added p3041 to cpu_type_list and SVR list
* Added number of LAWs for p3041
* Set CONFIG_MAX_CPUS to 4 for p3041

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:41:19 -05:00
Kumar Gala
19dbcc96c0 powerpc/p5020: Add various p5020 related defines (and p5010)
There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added p5020 & p5010 to cpu_type_list and SVR list
* Added number of LAWs for p5020
* Set CONFIG_MAX_CPUS to 2 for p5020

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:41:19 -05:00
Becky Bruce
11a3de4697 fsl_law.c: Add print_laws() for FSL_CORENET platforms.
Add printing of LAWBARH/LAWBARL for FSL_CORENET platforms.

Signed-off-by: Becky Bruce <Beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00