Commit graph

60 commits

Author SHA1 Message Date
P.V.Suresh
2c1764efc2 fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controller
eSDHC host controller reset results in clearing of snoop bit also.
This patch sets the SNOOP bit after the completion of host controller reset.
Without this patch mmc reads are not consistent.

Signed-off-by: P.V.Suresh <pala@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-12-13 09:32:16 -06:00
Wolfgang Denk
7b43db9211 drivers/mmc/fsl_esdhc.c: fix compiler warnings
Commit 77c1458d caused the following compiler warnings:

fsl_esdhc.c: In function 'esdhc_pio_read_write':
fsl_esdhc.c:142: warning: assignment discards qualifiers from pointer target type
fsl_esdhc.c: In function 'esdhc_setup_data':
fsl_esdhc.c:169: warning: unused variable 'wml_value'
fsl_esdhc.c: In function 'esdhc_pio_read_write':
fsl_esdhc.c:164: warning: control reaches end of non-void function

Fix these.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dipen Dudhat <dipen.dudhat@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
2010-05-15 19:47:17 +02:00
Dipen Dudhat
77c1458d13 ppc/85xx: PIO Support for FSL eSDHC Controller Driver
On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has been introduced to do data transfer using CPU.

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
2010-04-23 21:02:30 -05:00
Roy Zang
ab467c512e fsl_esdhc: Only modify the field we are changing in WML
When we set the read or write watermark in WML we should maintain the
rest of the register as is, rather than using some hard coded value.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-07 00:01:11 -05:00
Jerry Huang
48bb3bb5ac fsl_esdhc: Add function to reset the eSDHC controller
To support multiple block read command we must set abort or use auto
CMD12.  If we booted from eSDHC controller neither of these are used
and thus we need to reset the controller to allow multiple block read
to function.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-04-07 00:01:11 -05:00
Kumar Gala
cc4d122658 fsl_esdhc: Always stop clock before changing frequency
We need to stop the clocks on 83xx/85xx as well as imx.  No need to make
this code conditional to just imx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2010-04-07 00:01:11 -05:00
Stefano Babic
c67bee1460 fsl_esdhc: add support for mx51 processor
The esdhc controller in the mx51 processor is quite
the same as the one in some powerpc processors
(MPC83xx, MPC85xx). This patches adapts the driver
to support the arm mx51.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-07 12:36:36 -06:00
Anton Vorontsov
b33433a63f fsl_esdhc: Add device tree fixups
This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.

The function adds status = "disabled" propery if esdhc pins muxed away,
otherwise it fixups clock-frequency for esdhc nodes.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:24:06 +02:00
Rabin Vincent
998be3dd59 mmc: drop unnecessary casts
Now that response is a uint, we can drop all the casts.

Signed-off-by: Rabin Vincent <rabin@rab.in>
2009-06-02 17:18:57 -05:00
Andy Fleming
50586ef24e Add support for the Freescale eSDHC found on 8379 and 8536 SoCs
This uses the new MMC framework

Some contributions by Dave Liu <daveliu@freescale.com>

Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16 18:07:42 -06:00