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fsl_esdhc: Always stop clock before changing frequency
We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefano Babic <sbabic@denx.de>
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2 changed files with 4 additions and 10 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright 2007, Freescale Semiconductor, Inc
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* Copyright 2007,2010 Freescale Semiconductor, Inc
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* Andy Fleming
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*
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* Based vaguely on the pxa mmc code:
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@ -265,18 +265,13 @@ void set_sysctl(struct mmc *mmc, uint clock)
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clk = (pre_div << 8) | (div << 4);
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/* On imx the clock must be stopped before changing frequency */
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if (cfg->clk_enable)
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esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
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esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
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esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk);
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udelay(10000);
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clk = SYSCTL_PEREN;
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/* On imx systems the clock must be explicitely enabled */
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if (cfg->clk_enable)
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clk |= SYSCTL_CKEN;
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clk = SYSCTL_PEREN | SYSCTL_CKEN;
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esdhc_setbits32(®s->sysctl, clk);
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}
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@ -2,7 +2,7 @@
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* FSL SD/MMC Defines
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*-------------------------------------------------------------------
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*
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* Copyright 2007-2008, Freescale Semiconductor, Inc
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* Copyright 2007-2008,2010 Freescale Semiconductor, Inc
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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@ -148,7 +148,6 @@
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struct fsl_esdhc_cfg {
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u32 esdhc_base;
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u32 no_snoop;
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u32 clk_enable;
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};
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/* Select the correct accessors depending on endianess */
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