Commit graph

19 commits

Author SHA1 Message Date
Peng Fan
fb0d042814 imx: mx6: implement board_mmc_get_env_dev
Implement board_mmc_get_env_dev for the boards.

Following is examples:
SD1/SD2/SD3: return devno;
SD2/SD3: return devno - 1;
SD2/SD4: if (devno == 2), return dev - 2; return dev - 1;

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-02-04 10:13:53 +01:00
Peng Fan
fb00bda705 imx:mx6qarm2 add board level support for usb
Add pinmux settings and implement board_ehci_hcd_init

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2014-12-19 15:32:13 +01:00
Fabio Estevam
a49c44dd8b mx6qarm2: Fix error handling in board_mmc_init()
When an invalid USDHC port is passed we should return -EINVAL instead of 0.

Also, return the error immediately on fsl_esdhc_initialize() failure.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-21 16:47:54 +01:00
Ye.Li
661139faf7 imx: mx6dlarm2: Add support for i.MX6Q/DL arm2 LPDDR2 boards
Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2
arm2 board. Since the LPDDR2 arm2 board has different DDR size, use
CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-30 12:21:14 +02:00
Ye.Li
b357503f1c imx: mx6dlarm2: Add support for i.MX6DL arm2 DDR3 board
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2
shared the same board with i.MX6Q ARM2 board since the i.MX6DL is
pin-pin compatible with i.MX6Q.

The patch also support the DDR 32-BIT mode option. Please define
CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT
mode.But due to the board design, it's 64bit DDR buswidth physically,
so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it.

Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-30 12:21:14 +02:00
Fabio Estevam
1037dc0a2b mx6qarm2: Remove unneeded error message when cpu_eth_init() fails
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-01-13 11:52:27 +01:00
Eric Nelson
b47abc36aa i.MX6 (DQ/DLS): use macros for mux and pad declarations
This allows the use of either or both declarations from
the files mx6q_pins.h and mx6dl_pins.h.

All board files should include <asm/arch/mx6-pins.h>
with one of the following defined in boards.cfg
    MX6Q   - for boards targeting i.MX6Q or i.MX6D
    MX6DL  - for boards targeting i.MX6DL
    MX6S   - for boards targeting i.MX6S
    MX6QDL - for boards that support any of the above with
             run-time detection

Pad declarations will be MX6_PAD_x for single-variant boards
and MX6Q_PAD_x and MX6DL_PAD_x for boards supporting both
processor classes.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-12-17 17:12:34 +01:00
Eric Nelson
10fda48779 i.MX6DQ/DLS: replace pad names with their Linux kernel equivalents
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-11-13 10:19:50 +01:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Benoît Thébaudeau
7e2173cf82 imx: iomux-v3: Include PKE and PUE to pad control pull definitions
PUE requires PKE to mean something, as do pull values with PUE, so do not
compell users to explicitly use PKE and PUE everywhere. This is also what is
done on Linux and what has already been done for i.MX51.

By the way, remove some unused pad control definitions.

There is no change of behavior.

Note that SPI_PAD_CTRL was defined by several boards with a pull value, but
without PKE or PUE, which means that no pull was actually enabled in the pad.
This might be a bug in those boards, but this patch does not change the
behavior, so it just removes the meaningless pull value from those definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-04-28 11:15:07 +02:00
Eric Nelson
cfb8b9d335 i.MX6: consolidate pad names for multi-CPU boards
Rename all i.MX6 pad declarations to MX6_PAD_x, so a board
may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo
(MX6DL) by including the proper header.

Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd
only support MX6Q, so they include mx6q_pins.h.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-03-07 16:43:46 +01:00
Eric Nelson
6e14232010 i.MX: declare iomux_v3_cfg_t arrays as const
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:11 +02:00
Benoît Thébaudeau
a2ac1b3a7d mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).

This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
2012-10-16 12:35:10 +02:00
Benoît Thébaudeau
16e43f354d fsl_esdhc: Remove cache snooping for i.MX
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().

Since no_snoop was only used on i.MX, get rid of it BTW.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
2012-09-01 14:58:30 +02:00
Ashok Kumar Reddy
acbdea2ece mx6qarm2:Use IMX_GPIO_NR macro
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:29 +02:00
Troy Kisky
af2a35fb1f i.mx: iomux-v3.h: move to imx-common include directory
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 08:00:19 +02:00
Stefano Babic
b125e7bdd8 imx6: mx6qarm2: updated board_mmc_getcd() to the new prototype
Commit 314284b156 has
changed board_mmc_getcd() function prototype, while
mx6qarm2 has still the old one.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-02-12 10:11:26 +01:00
Jason Liu
473c63592e i.mx6q: arm2: Add the enet function support
This enable the network function on the i.mx6q armadillo2
board(arm2), thus we can use tftp to load image from network.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
2012-01-16 08:40:08 +01:00
Jason Liu
76d7f57449 i.mx: i.mx6q: add the initial support for i.mx6q ARM2 board
Add the initial support for Freescale i.MX6Q Armadillo2 board
Support: MMC boot from slot 0/1, debug UART(UART4), usdhc.

There is two MMC slots on the boards:
mmc dev 0 -> connect USDHC3 -> the lower slot on the board,
mmc dev 1 -> connect USDHC4 -> the upper slot on the board,

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
2011-12-09 17:30:10 +01:00