Commit graph

23990 commits

Author SHA1 Message Date
Chanho Park
ebaee701a6 rng: Add StarFive JH7110 RNG driver
Adds to support JH7110 TRNG driver which is based on linux kernel's
jh7110-trng.c. This can support to generate 256-bit random numbers and
128-bit but this makes 256-bit default for convenience.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-11-02 17:45:53 +08:00
Chanho Park
88af85cf92 clk: starfive: jh7110: Add security clocks
Add STGCLK_SEC_HCLK and STGCLK_SEC_MISCAHB clocks for JH7110 TRNG
device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-11-02 17:45:53 +08:00
Heinrich Schuchardt
ceec977ba1 rng: Provide a RNG based on the RISC-V Zkr ISA extension
The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
provides an interface to a physical entropy source.

A RNG driver based on the seed CSR is provided. It depends on
mseccfg.sseed being set in the SBI firmware.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-11-02 16:22:06 +08:00
Tom Rini
658caf0bf1 Clock changes for 2024.01-rc2
This contains several fixes for the clock core.
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Merge tag 'clk-2024.01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock changes for 2024.01-rc2

This contains several fixes for the clock core.
2023-11-01 17:49:58 -04:00
Maksim Kiselev
0755db477f clk: use private clk struct in CLK_CCF's enable/disable functions
In clk_enable()/clk_disable() functions, when CCF is activated,
we must pass a private clk struct to enable()/disable() ops functions.
Otherwise, the use of a container_of() construction within these ops
should be banned. Because passing a non-private clk struct to
container_of() results in an out of range error.

At the moment, clk-mux, clk-fixed-factor, clk-gate and possibly other
clocks use container_of() in their enable()/disable() functions.
Therefore, for these functions to work correclty, private clk struct
must be passed.

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230905221649.3577929-1-bigunclemax@gmail.com
2023-11-01 15:14:09 -04:00
Eugen Hristev
b6a56f5533 clk: fix count parameter type for clk_release_all
The second parameter for clk_release_all is used as an unsigned
(which makes sense) but the function prototype declares it as an int.
This causes warnings/error like such below:

include/clk.h:422:48: error: conversion to ‘int’ from ‘unsigned int’ may change the sign of the result [-Werror=sign-conversion]
  422 |         return clk_release_all(bulk->clks, bulk->count);

To fix this, changed the type of the count to `unsigned int`

Fixes: 82a8a669b4 ("clk: add clk_release_all()")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230619104752.278500-1-eugen.hristev@collabora.com
2023-11-01 15:13:55 -04:00
Nathan Barrett-Morrison
aed6480fad drivers: clk: Adjust temp var data type to properly match that of struct clk_ops
In commit 5c5992cb90 ("clk: Add debugging for return values"), a
temporary storage variable was added around the ops->get_rate() call
inside clk_get_rate(), so that the result could be passed through
log_ret.

This temporary variable was declared as an int, yet when we look in
struct clk_ops, we can see this needs to be a ulong:
ulong (*get_rate)(struct clk *clk);

This was resulting in a signed to unsigned casting error on our
builds, where a clock value of 0xABCDABCD was being incorrectly cast
to 0xFFFFFFFFABCDABCD.

Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230515195005.1961495-1-nathan.morrison@timesys.com
2023-11-01 15:13:15 -04:00
Heinrich Schuchardt
073bf4a57d bootstd: BOOTDEV_SPI_FLASH requires BOOTSTD
Compiling sandbox_defconfig with CONFIG_BOOTSTD=n fails:

    /usr/bin/ld: drivers/mtd/spi/sf_bootdev.o:
    in function `sf_get_bootflow':
    /drivers/mtd/spi/sf_bootdev.c:43:(.text+0x96):
    undefined reference to `bootmeth_set_bootflow'

Add the missing Kconfig dependency.

Fixes: Fixes: 0c1f4a9fb1 ("bootstd: Add a SPI flash bootdev")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-01 12:26:44 -04:00
Sean Anderson
21c84bb111 mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B
As noted in commit 3a6383207b ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>
2023-11-01 10:01:10 +09:00
Bin Meng
c27c8102e1 mmc: pci: Drop the superfluous cast
dm_pci_map_bar() return a value of (void *) already, hence no need
to cast it again before assigning to host->ioaddr.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-01 09:58:57 +09:00
Oleksandr Suvorov
9b8ebd3aec mmc: spl: select SPL_BLK for SPL_DM_MMC
mmc_bind() in mmc-uclass.c calls blk_create_devicef() which is
defined in blk-uclass.c, so SPL_BLK is required by SPL_DM_MMC.
Implicitly select SPL_BLK for SPL_DM_MMC.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-01 08:48:49 +09:00
Vishal Mahaveer
57f9b25547 clk: ti: k3-pll: Add calibration support for non fractional mode
PLL calibration needs to be enabled when operating in non fractional
mode. Add the sequence to do a fast calibration when using PLL
in this mode.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
2023-10-31 13:08:10 -04:00
Jim Liu
5572d23f02 pinctrl: npcm8xx: Add name for gpio function
GPIO function name is needed in the debug log

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-10-31 13:07:58 -04:00
Marek Vasut
60d904a494 dfu: mmc: Add support for exposing whole mmc device
Add support for exposing the whole mmc device by setting the 'size'
parameter to 0. This can be useful in case it is not clear what the
total device size is up front. Update the documentation accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Link: https://lore.kernel.org/r/20231029223740.284149-1-marex@denx.de
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-10-31 14:53:05 +01:00
Philip Richard Oberfichtner
5b6ee512ce bootcount: Add driver model I2C driver
This adds a generic I2C bootcounter adhering to driver model to replace
the previously removed legacy implementation.

There is no change in functionality, it can be used on any I2C device.
The device tree configuration may look like this for example:

	bootcount {
		compatible = "u-boot,bootcount-i2c";
		i2cbcdev = <&i2c_rtc>;
		offset = <0x11>;
	};

Signed-off-by: Philip Richard Oberfichtner <pro@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-31 09:09:04 +01:00
Philip Richard Oberfichtner
b483552773 i2c: Implement i2c_get_chip_by_phandle()
This new function enhances the i2c_get_chip*() toolbox by implementing a
variant that does not require a chip_addr. Instead, the desired device
is pointed to by a phandle.

Signed-off-by: Philip Richard Oberfichtner <pro@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-31 09:08:51 +01:00
Philip Richard Oberfichtner
31f4ee4b13 bootcount: Remove legacy I2C driver
The legacy I2C bootcounter will hereby be removed and eventually
be replaced by a driver model implementation in the follow-up commit.

The legacy driver has the following drawbacks:
	- It's not adhering to the driver model
	- Settings are grabbed from Kconfig rather than device tree
	- i2c_{read,write} are being used instead of dm_i2c_{read,write}

Signed-off-by: Philip Richard Oberfichtner <pro@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-31 09:08:36 +01:00
Michel Alex
5ed1c55fb4 misc: i2c_eeprom: consider pagesize when writing to eeprom
Calculate the maximum length of the buffer when writing
across the page boundary. If the buffer length (len)
exceeds the page boundary (pagesize), split it. Use this
length instead of comparing the length with the pagesize,
because if the write start address (offset) is not at the
beginning of a page and the page_offset + len is greater
than the page boundary (pagesize), the write operation
would overflow the current page and the behaviour can be
undefined (e.g. at24).

Signed-off-by: Alex Michel <alex.michel@wiedemann-group.com>
2023-10-30 15:32:49 -04:00
Michal Simek
18370f1497 Kconfig: Remove all default n/no options
Similar change was done by commit b4c2c151b1 ("Kconfig: Remove all
default n/no options") and again sync is required.

default n/no doesn't need to be specified. It is default option anyway.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
2023-10-30 15:32:49 -04:00
Abdellatif El Khlifi
482a0f1764 arm_ffa: fix: remove deadcode in ffa_print_error_log()
address the CID 464361 Control flow issues [1]

[1]: https://lore.kernel.org/all/20230821210927.GL3953269@bill-the-cat/

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Cc: Tom Rini <trini@konsulko.com>
2023-10-30 15:32:49 -04:00
Heinrich Schuchardt
35e8007ef3 i2c: designware_i2c: adjust timing calculation
In SPL probing of the designware_i2c device on the StarFive VisionFive 2
board fails with

    dw_i2c: mode 0, ic_clk 1000000, speed 100000,
    period 10 rise 1 fall 1 tlow 5 thigh 4 spk 0
    dw_i2c: bad counts. hcnt = -4 lcnt = 4
    device_probe: i2c@12050000 failed to probe -22

When changing the offset for the high phase from 7 to 3 the device is
probed correctly. This now matches the value from the Linux driver.

Without this fix the memory size of the StarFive VisionFive 2 board cannot
be read from EEPROM.

Fixes: e71b6f6622 ("i2c: designware_i2c: Rewrite timing calculation")

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-30 06:09:42 +01:00
Jim Liu
af7a4ff86f i2c: nuvoton: remove standard mode only
first version is only support standard mode.
remove this judgment to support standard/fast/fast plus  mode.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>

Changes for v2:
   - add commit message
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-30 06:08:40 +01:00
Tom Rini
c594b43022 Merge branch 'master_tmio_fixes' of https://source.denx.de/u-boot/custodians/u-boot-sh
- MMC fixes for Renesas platforms
2023-10-28 12:51:28 -04:00
Udit Kumar
b254975b1a driver: misc: k3_avs: Add support for thermal shutdown
To avoid thermal burn out, program thermal shutdown
value in VTM (Voltage and Thermal Manager) IP.

Part of Linux kernel driver (drivers/thermal/k3_j72xx_bandgap.c)
is ported from kernel 6.6-rc1, which sets thermal shutdown values.

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Neha Francis <n-francis@ti.com>
2023-10-27 21:02:08 -04:00
Wei Chen
ffdb85bfcf misc: vexpress_config: Use member .priv_auto to set the private data
In current vexpress_config_probe code, it sets the uclass private data
directly. This will cause one compilation error:
drivers/misc/vexpress_config.c:114:27: error: lvalue required as left operand of assignment
  114 |  dev_get_uclass_priv(dev) = priv;
      |                           ^

In this patch we set the uclass private data through struct member
.priv_auto, and this compilation error disappears.

Signed-off-by: Wei Chen <wei.chen@arm.com>
Signed-off-by: Qi Feng <qi.feng@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-27 21:02:08 -04:00
Tom Rini
d5d9770f58 bootX measurements and measurement API moved to u-boot core
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Merge tag 'tpm-next-27102023' of https://source.denx.de/u-boot/custodians/u-boot-tpm

bootX measurements and measurement API moved to u-boot core:

Up to now, U-Boot could perform measurements and EventLog creation as
described by the TCG spec when booting via EFI.

The EFI code was residing in lib/efi_loader/efi_tcg2.c and contained
both EFI specific code + the API needed to access the TPM, extend PCRs
and create an EventLog. The non-EFI part proved modular enough and
moving it around to the TPM subsystem was straightforward.

With that in place we can have a common API for measuring binaries
regardless of the boot command, EFI or boot(m|i|z), and contructing an
EventLog.

I've tested all of the EFI cases -- booting with an empty EventLog and
booting with a previous stage loader providing one and found no
regressions.  Eddie tested the bootX part.

Eddie also fixed the sandbox TPM which couldn't be used for the EFI code
and it now supports all the required capabilities. This had a slight
sideeffect in our testing since the EFI subsystem initializes the TPM
early and 'tpm2 init' failed during some python tests. That code only
opens the device though, so we can replace it with 'tpm2 autostart'
which doesn't error out and still allows you to perfom the rest of the
tests but doesn't report an error if the device is already opened.

There's a few minor issues with this PR as well but since testing and
verifying the changes takes a considerable amount of time, I prefer
merging it now.

Heinrich has already sent a PR for -master containing "efi_loader: fix
EFI_ENTRY point on get_active_pcr_banks" and I am not sure if that will
cause any conflicts, but in any case they should be trivial to resolve.

Both the EFI and non-EFI code have a Kconfig for measuring the loaded
Device Tree.  The reason this is optional is that we can't reason
when/if devices add random info like kaslr-seed, mac addresses etc in
the DT. In that case measurements are random, board specific and
eventually useless.  The reason it was difficult to fix it prior to this
patchset is because the EFI subsystem and thus measurements was brought
up late and DT fixups might have already been applied. With this
patchset we can measure the DT really early in the future.

Heinrich also pointed out that the two Kconfigs for the DTB measurements
can be squashed in a single one and that the documentation only explains
the non-EFI case.  I agree on both but as I said this is a sane working
version, so let's pull this first it's aleady big enough and painful to
test.
2023-10-27 19:27:29 -04:00
Igor Prusov
b59b0ce118 spi: add support for Amlogic A1 SPI Flash Controller
Add A1 SPIFC driver from Linux. Slightly modified to use u-boot driver
framework and accommodate to lack of ioread32_rep/iowrite32_rep.

Based on Linux version 6.6-rc4

Signed-off-by: Igor Prusov <IVPrusov@sberdevices.ru>
Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20231024225140.366571-2-ivprusov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
[trini: Drop <common.h> as it's not needed]
2023-10-27 12:49:52 -04:00
Eddie James
54b96e8b2b tpm: sandbox: Update for needed TPM2 capabilities
The driver needs to support getting the PCRs in the capabilities
command. Fix various other things and support the max number
of PCRs for TPM2.
Remove the !SANDBOX dependency for EFI TCG2 as well.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-10-27 13:08:25 +03:00
Marek Vasut
1332bdc2df mmc: tmio: Disable 1/1024 clock divider on Renesas R-Car platforms
The R-Car Gen3 SD_CLK_CTRL register does not use BIT(16) to implement
divider 1/1024, instead BIT(16) is reserved bit and divider 1/1024 is
not supported. The divider 1/1024 is specific to Socionext variant of
the IP, as is indicated by Linux commit:

0196c8db8363 ("mmc: tmio: move tmio_mmc_set_clock() to platform hook")
"
Socionext (and Panasonic) uses bit 10 (CLKSEL) for 1/1.  Also, newer
versions of UniPhier SoC variants use bit 16 for 1/1024.
"

Do not set the TMIO_SD_CAP_DIV1024 on Renesas R-Car platforms even if
the IP VERSION register does exist, and indicates IP version is newer
or equal to version 1.0 . The IP version 1.0 or newer does not imply
presence of the 1/1024 divider.

Since the TMIO driver is used exactly by two supported platforms, that
is Renesas R-Car and Socionext UniPhier, it is OK to check whether the
TMIO_SD_CAP_RCAR capability is not set to identify the UniPhier platform
and add the capability only on that platform.

Fixes: 58c35b17aa ("mmc: matsushita-common: Always check controller version")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Thuan Nguyen Hong <thuan.nguyen-hong@banvien.com.vn>
2023-10-27 11:21:28 +02:00
Marek Vasut
631dbe0c08 mmc: tmio: Always check for errors after receiving an IRQ
Unconditionally check for errors even after successful reception
of IRQ flag, since the hardware may set both an IRQ completion
flag and an error flag at the same time.

This mode of failure happens in case of an error during transfer,
in which case the hardware may set the expected IRQ completion
flag as well as error flags. The later is currently not checked
by the driver and such an error is not detected. Improve the
error detection.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Thuan Nguyen Hong <thuan.nguyen-hong@banvien.com.vn>
2023-10-27 11:21:28 +02:00
Marek Vasut
0fb6cd6aa4 mmc: sh_sdhi: Drop unused driver
This driver is long superseded by renesas-sdhi.c and unused.
Drop the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2023-10-27 11:21:28 +02:00
Paul Barker
fa8422df94 mmc: renesas-sdhi: Fix error handling in rzg2l_sdhi_setup
We should ensure that reset_free() is called in the error path.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Fixes: 93c811b733 ("mmc: renesas-sdhi: Initialize module on RZ/G2L")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-27 11:21:28 +02:00
Rasmus Villemoes
35dc728a3c serial: introduce CONFIG_CONSOLE_FLUSH_ON_NEWLINE
When debugging, one sometimes only gets partial output lines or
nothing at all from the last printf, because the uart has a largish
buffer, and the code after the printf() may cause the CPU to hang
before the uart IP has time to actually emit all the characters. That
can be very confusing, because one doesn't then know exactly where the
hang happens.

Introduce a config knob allowing one to wait for the uart fifo to
drain whenever a newline character is printed, roughly corresponding
to the effect of setvbuf(..., _IOLBF, ...) in ordinary C programs.

Since this uses IS_ENABLED() instead of cpp ifdef, we can remove the
ifdef around the _serial_flush() definition - if neither
CONSOLE_FLUSH_SUPPORT or CONSOLE_FLUSH_ON_NEWLINE are enabled, the
compiler elides _serial_flush(), but it won't warn about it being
unused.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24 17:05:24 -04:00
Rasmus Villemoes
1000e2f96b serial: serial-uclass.c: move definition of _serial_flush up a bit
Preparation for next patch.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-10-24 17:05:24 -04:00
AKASHI Takahiro
8e545b3781 sandbox: add SCMI power domain protocol support for testing
SCMI power domain management protocol is supported on sandbox
for test purpose. Add fake agent interfaces and associated
power domain devices.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24 17:05:24 -04:00
AKASHI Takahiro
c1d2ed0c63 power: domain: add SCMI driver
Add power domain driver based on SCMI power domain management protocol.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2023-10-24 17:05:24 -04:00
AKASHI Takahiro
fc358b1a76 firmware: scmi: add power domain protocol support
In this patch, added are helper functions to directly manipulate
SCMI power domain management protocol. DM compliant power domain
driver will be implemented on top of those interfaces in a succeeding
patch.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2023-10-24 17:05:24 -04:00
Tom Rini
5cab3515f8 Merge tag 'u-boot-rockchip-20231024' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add Board: rk3588 NanoPC-T6, Orange Pi 5, Orange Pi 5 Plus;
- clk driver fix for rk3568 and rk3588;
- rkmtd cmd support for rockchip nand device;
- dts update and sync from linux;
2023-10-24 09:39:52 -04:00
Tom Rini
1b2a3d08c0 u-boot-imx-20231024
-------------------
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/18211
 
 - Fixes for MC2432 Eeprom
 - i.MX93 ADC
 - Secondary boot mode on i.MX8M
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Merge tag 'u-boot-imx-20231024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20231024
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/18211

- Fixes for MC2432 Eeprom
- i.MX93 ADC
- Secondary boot mode on i.MX8M
2023-10-24 09:39:02 -04:00
Johan Jonker
81bd22e935 rockchip: block: blk-uclass: add bounce buffer flag to blk_desc
Currently bounce buffer support is enabled for all block devices
when available. Add a flag to blk_desc to enable only on demand.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24 15:55:17 +08:00
Johan Jonker
80201eccaa rockchip: block: add rkmtd class and drivers
Add rkmtd class and drivers to create a virtual block device
to transfer Rockchip boot block data to and from NAND with
block orientated tools like "ums" and "rockusb".

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24 15:55:17 +08:00
Johan Jonker
900c303a02 rockchip: dm: prepare rkmtd UCLASS
Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
in combination with existing userspace tools and rockusb command.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-24 15:55:16 +08:00
Johan Jonker
d27f227271 mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option
On Rockchip SoCs the first boot stages are written on NAND
with help of manufacturer software that uses a different format
then the MTD framework. Skip the automatic BBT scan with the
NAND_SKIP_BBTSCAN option to be able to pass the driver probe
function and to let the original data unchanged.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24 15:55:16 +08:00
Ricardo Pardini
7b4544f122 mtd: spi-nor: Add support for XMC XM25QU128C
Add support for XMC XM25QU128C (128M-bit) Serial Flash memory. Used on
the Xunlong Orange Pi 3B, 5 and 5 Plus boards.

Datasheet:
https://www.xmcwh.com/uploads/806/XM25QU128C_Ver2.0.pdf

Signed-off-by: Ricardo Pardini <ricardo@pardini.net>
[jonas@kwiboo.se: update commit message]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-24 15:55:16 +08:00
Tony Dinh
1052920aa9 bootstd: sata: bootdev scanning for ahci sata with no drive attached
It's normal to have no SATA drive attached to the controller, so return a
successful status when there is no block device found after probing.

Note: this patch depends on the previous patch
https://patchwork.ozlabs.org/project/uboot/patch/20230917230649.30357-1-mibodhi@gmail.com/

Resend the right patch.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-23 13:07:23 -04:00
Tony Dinh
a7527fbbf2 bootstd: sata: Add bootstd support for ahci sata
Add ahci sata bootdev and corresponding hunting function.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-23 13:07:12 -04:00
Tom Rini
a8f6dab0d4 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This is mostly about support for the Allwinner R528/T113s SoC, which is
reportedly the same die as the Allwinner D1, but with the two
Arm Cortex-A7 cores activated instead of the RISC-V one.
Using sunxi code outside of arch/arm proved to be difficult, so apart
from enabling this Arm SoC, the patches also prepare for more refactoring
to get the D1 nicely supported some day:
- We get rid of some Kconfig (hard-)coded GPIO pins, responsible for
  enabling regulators.
- The GPIO code is moved out of arch/arm, into drivers/gpio.
- Some definitions are moved out of header files under asm/arch.
- Some T113s/D1 specific definitions are guarded by a generic Kconfig
  symbol (CONFIG_SUNXI_GEN_NCAT2).
- The DRAM controller initialisation code is located under drivers/ram.
- The base SoC .dtsi files are shared (under arch/riscv, as in Linux).

Of course there are also the usual new SoC specific patches, like clock
and pinmux descriptions, alongside a rework of the pinctrl code, since
Allwinner changed the GPIO register layout, for the first time since
sunxi's inception.
On top of this the PSCI code sees some update, to provide SMP services
for R528/T113s boards. Many thanks to Sam for providing this code and
staying strong through the review cycles.
The final patch enables support for one popular board, I hope to see
more DTs and defconfigs contributed in the future!

Many thanks to all the various contributors, testers and reviewers,
that series was a real team effort!
2023-10-23 11:39:33 -04:00
Tom Rini
c51f2ea726 - updates for pwm_backlight, simple_panel and tegra20 to keep
fixed/gpio regulator counter in balance
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Merge tag 'video-20231022' of https://source.denx.de/u-boot/custodians/u-boot-video

 - updates for pwm_backlight, simple_panel and tegra20 to keep
   fixed/gpio regulator counter in balance
2023-10-23 09:04:40 -04:00
Tom Rini
0339e81be1 - sync A1 with Linux and add missing UART compatible
- fix USB2 gadget init on G12/SM1 based Boards
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Merge tag 'u-boot-amlogic-20231023' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- sync A1 with Linux and add missing UART compatible
- fix USB2 gadget init on G12/SM1 based Boards
2023-10-23 09:04:17 -04:00
Elaine Zhang
6bfb37e702 clk: rockchip: rk3588: fix up the frac pll calculation
rk3588 frac pll:
FFVCO = ((m + k / 65536) * FFIN) / p
FFOUT = ((m + k / 65536) * FFIN) / (p * 2s)
k is the original code, but the K[15:0] is complement code
(6'b1000_0000_0000_0000 <= K[15:0] <= 16'b0111_1111_1111_1111),
need to be converted.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-23 18:21:55 +08:00