Commit graph

42 commits

Author SHA1 Message Date
Eddie Cai
57ca63b86e usb: dwc2: invalidate the dcache before starting the DMA
We should invalidate the dcache before starting the DMA. In case there are
any dirty lines from the DMA buffer in the cache, subsequent cache-line
replacements may corrupt the buffer in memory while the DMA is still going on.
Cache-line replacement can happen if the CPU tries to bring some other memory
locations into the cache while the DMA is going on.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2017-04-14 16:44:16 +02:00
Kever Yang
5c73536738 usb: dwc2: add support for external vbus supply
Some board do not use the dwc2 internal VBUS_DRV signal, but
use a gpio pin to enable the 5.0V VBUS power, add interface to
enable the power in dwc2 driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-14 14:07:46 +02:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Stefan Roese
2bf352f0c1 usb: dwc2: Add delay to fix the USB detection problem on SoCFPGA
With patch c998da0d (usb: Change power-on / scanning timeout handling),
the USB scanning is started earlier and with a smaller timeout. This
resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not
getting detected any more. This patch now adds a 1 second delay (in
the host mode only) to the DWC2 driver before the scanning is started.
With this delay, now all problematic USB keys are detected successfully
again. And there is no need any more to change the delay / timeout
in the common USB code (usb_hub.c).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
2016-05-06 20:06:56 +02:00
Marek Vasut
e96e064f51 usb: dwc2: Init desc_before_addr
Initialize desc_before_addr, otherwise the USB core won't send the
first 64B Get Device Descriptor request in common/usb.c function
usb_setup_descriptor() . There are some USB devices which expect
this sequence and otherwise can misbehave.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Tom Rini <trini@konsulko.com>
2016-05-03 19:21:18 +02:00
Marek Vasut
b4fbd089e4 usb: dwc2: Make OC protection configurable
Introduce a new flag in the controller private data, which allows selectively
disabling the OC protection. Use the standard 'disable-over-current' OF prop
to set this flag. This OC protection must be disabled on EBV SoCrates rev 1.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2016-05-03 19:21:18 +02:00
Marek Vasut
618da5630b usb: dwc2: Pull Ext VBUS macro from dwc_otg_core_init()
Introduce a boolean flag in the dwc2 controller private data and set
it according to the macro (for now) instead of having this macro
directly in the dwc_otg_core_init(). This will let us configure the
flag from DT or such later on, if needed.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2016-05-03 19:21:17 +02:00
Marek Vasut
559019894b usb: dwc2: Pass private data into dwc_otg_core_init()
Pass the whole bulk of private data instead of just the regs,
since the private data will soon contain important configuration
flags.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2016-05-03 19:21:17 +02:00
Dinh Nguyen
b5ab663a69 usb: dwc2: disable erroneous overcurrent condition
For the case where an external VBUS is used, we should enable the external
VBUS comparator in the driver. This would prevent an unnecessary overcurrent
error which would then disable the host port.

The overcurrent condition was happening on the SoCFPGA Cyclone5 devkit, thus
USB was not working on the devkit. This patch fixes that problem.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-03-05 02:21:36 +01:00
Tom Rini
9c3193f8d0 Merge branch 'master' of git://git.denx.de/u-boot-usb 2016-01-25 17:23:19 -05:00
Mateusz Kulikowski
fd2cd66290 usb: dwc2: Use shared wait_for_bit
Use existing library function to poll bit(s).

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
2016-01-25 10:39:48 -05:00
Stefan Brüns
25612f23b5 usb: dwc2: Do not mix data toggle for IN and OUT endpoints, check bounds
USB protocol allows for 16 IN and 16 OUT endpoints (USB 2.0 Spec,
8.3.2.2 Endpoint Field). A function may have an EP 1 for both IN and OUT,
so these two should be kept separate. As EPs are either BULK or INTERRUPT
(or ISO), it is fine to have one array per direction for all transfer
types (also see e236519b73).

USB device address is 7 bits, so a bus may have more than 16 devices.
Check the device number, as the DWC2 driver only supports BULK/ISO for
the first 16 devices.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2016-01-23 16:21:11 +01:00
Stefan Brüns
d2ff51b372 usb: dwc2: Add SPLIT INTERRUPT transaction support
CSPLITs for INTERRUPT transactions have to be scheduled in each microframe
following the SSPLIT. INTERRUPT transfers are executed in the next even/
odd microframe depending on the HCCHAR_ODDFRM flag.

As there are no handshakes for INTERRUPT SSPLITs the SSPLIT may have
failed (transport error) without the error being detected by the host
driver. If the last CSPLIT is not received within 4 microframes after the
SSPLIT there was a transaction error and the complete transaction has
to be restarted.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2016-01-23 16:21:11 +01:00
Stefan Brüns
b54e447052 usb: dwc2: Implement SPLIT transaction support
In contrast to non-SPLIT transfers each transaction has to be submitted
as an individual chunk.
The transaction state machine proceeds from SSPLIT to CSPLIT if the ACK
flag is set. CSPLIT has to be repeated while NYET is set.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2016-01-23 16:21:11 +01:00
Stefan Brüns
890f0ee4bb usb: dwc2: add helper function for setting SPLIT HC registers
The split register setting is used for both SSPLIT and CSPLIT transactions,
the bit for CSPLIT has to be set seperately.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2016-01-23 16:21:11 +01:00
Stefan Brüns
daed305941 usb: dwc2: split transfer core from outer loop
Split the movement of data between CPU and Host Controller from the
status handling and tracking of transfer progress.
This will also simplify adding of SPLIT transaction support.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2016-01-23 16:21:11 +01:00
Stefan Brüns
03460cdc3d usb: dwc2: Simplify wait_for_chhltd(), remove ignore_ack
A transfer is completed if the XFERCOMP flag is set, irrespective of the
ACK flag. BULK OUT transfers to some HS devices complete without having
the ACK flag set, which signal the devices has responded with an NYET
to the transfer (PING protocol).
The new behaviour matches the Linux kernel minus any PING protocol.

Also see 5966defabdcc (usb: dwc2: fix bulk transfers)

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2016-01-23 16:21:11 +01:00
Stefan Brüns
56a7bbd741 usb: dwc2: Fix out-of-bounds access, fix chunk size
Fix two errors in transfer len calculation, move loop invariant code out
of loop.

If xfer_len is equal to CONFIG_DWC2_MAX_TRANSFER_SIZE (or slightly
smaller), the xfer_len will be to large, e.g.:
  xfer_len = MAX_TRANSFER_SIZE = 65535
  max packet size = 512
    => num_packets = 128
    => IN xfer_len = 65536

For OUT transactions larger than (65536 - mps) bytes, the xfer_len
determination is quite awkward, it is only correct due to:
- max_packet_size for control/bulk/interrupt is required to be
  power-of-two.
- (CONFIG_DWC2_MAX_TRANSFER_SIZE + 1) % max-packet-size is zero
  for all allowed (2^3 ... 2^9) packet sizes

As the max xfer len is loop invariant, it can be moved out of the loop.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
2016-01-23 16:21:10 +01:00
Stefan Brüns
5253aded46 usb: dwc2: avoid out of bounds access
flush_dcache_range may access data after priv->aligned_buffer end if
len > DWC2_DATA_BUF_SIZE.
memcpy may access data after buffer end if done > 0

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-12-31 10:05:31 +01:00
Simon Glass
cf92e05c01 Move ALLOC_CACHE_ALIGN_BUFFER() to the new memalign.h header
Now that we have a new header file for cache-aligned allocation, we should
move the stack-based allocation macro there also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:15:20 -04:00
Marek Vasut
7a1386f96b usb: dwc2: Rename to dwc2_usb
This driver is not used only on exynos, but also on Altera SoCFPGA,
HiSilicon SoCs, RPi etc, so rename it accordingly to prevent confusion.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-19 22:31:39 +02:00
Marek Vasut
f522f9475f usb: dwc2: Add original Synopsys compat string
Add the Synopsys compatible string. This is used in SoCFPGA DT files.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-19 22:31:39 +02:00
Alexander Stein
db402e005a dwc2: Add dcache support
This adds dcache support for dwc2. The DMA buffers must be DMA aligned and
is flushed for outgoing transactions before starting transfer. For
ingoing transactions it is invalidated after the transfer has finished.

Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[trini: Update to apply again on top of DM patches]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:47:43 -04:00
Simon Glass
f58a41e001 dm: usb: Add driver-model support to dwc2
Add driver model support to this driver so it can be used with the new USB
stack.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
cc3e3a9e0e dm: usb: Prepare dwc2 driver for driver-model conversion
Put all global data in a structure and move (what will be) common code into
common functions. This will make the driver-model conversion much easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Peter Griffin
93b9957894 usb: dwc2: Call board_usb_init() from usb_lowlevel_init()
This patch makes the dwc2 controller like ehci / ohci / xhci controllers
by calling the board_usb_init() function from usb_lowlevel_init.

This can then be implemented by specific platforms to initialise
their USB hardware (phys / clocks etc).

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
2015-08-05 17:20:34 +02:00
Peter Griffin
5cfd6c002a usb: dwc2: Add support for v3 snpsid value
This has been tested to the extent that I can enumerate
a asix usb networking adapter and boot a kernel over usb
on the 96boards hikey u-boot port I'm currently doing.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
2015-05-29 12:41:04 +02:00
Stephen Warren
5877de9165 usb: dwc2: retry NAK'd interrupt transfers
IIUC, interrupt transfers are NAK'd by devices until they wish to trigger
an interrupt, and e.g. EHCI controllers retry these in HW until they are
ACK'd. However, DWC2 doesn't seem to retry, so we need to do this in SW.
In practice, I've seen DWC2_HCINT_FRMOVRUN happen too. I'm not quite sure
what this error implies; perhaps it's related to how near the end of a
USB frame we're at when the interrupt transfer is initiated? Anyway,
retrying this temporary error seems to be necessary too.

With all these commits applied, both my USB keyboards (one LS Lenovo and
one FS Dell) work correctly when there is no USB hub between the SoC and
the keyboard; We still need split transactions to be implemented for hubs
to work.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:59 +02:00
Stephen Warren
e236519b73 usb: dwc2: implement interrupt transfers
As best I can tell, there's no difference between bulk and interrupt
transfers in terms of how the HW should be programmed, at least given
that we're executing one transaction at a time rather than scheduling
them into frames for maximum throughput.

This patch ends up sharing the toggle bit state between bulk and
interrupt transfers on a particular EP. However I believe this is fine;
AFAIK a given EP either uses bulk or interrupt transfers and doesn't mix
them.

This patch doesn't do anything with the "interval" parameter for
interrupt transfers, but then most other USB controller drivers in U-Boot
don't either.

It turns out that one of my keyboards is happy to work using control
transfers but the other only gives non-zero "HID reports" via interrupt
transfers.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:59 +02:00
Stephen Warren
ed9bcbc792 usb: dwc2: correctly program hcchar for LS devices
A bit must be set in HCCHAR when communicating with low-speed devices.
I have no idea why there's no corresponding bit to distinguish between
full-speed and high-speed devices, but no matter; they all work now!

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:59 +02:00
Stephen Warren
4748cce573 usb: dwc2: detect device speed correctly
This doesn't make my LS keyboard work any better, but it does at least
report the correct speed in "usb tree".

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:59 +02:00
Stephen Warren
5c0beb5c58 usb: dwc2: use phys_to_bus/bus_to_phys
Use of these APIs is required on the Raspberry Pi. With this change, USB
on RPi1 should be more reliable, and USB on the RPi2 will start working.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:59 +02:00
Stephen Warren
fc909c0563 usb: dwc2: fix bulk transfers
When I created wait_for_chhltd(), I noticed that some instances of the
code it replaced expected the ACK bit to be set and others didn't. I
assumed this was an accidental inconsistency in the code, so wrote
wait_for_chhltd() to always expect ACK to be set. This code appeared to
work correctly for both enumeration of USB keyboards and operation of
USB Ethernet devices. However, this change broke USB Mass Storage (at
least my USB SD card reader). This change reverts to exactly the
original behaviour. I'm not sure why the ACK bit isn't always set
(perhaps a quirk in the USB HW or DWC2 controller), but the code works
this way!

Fixes: 5be4ca7d6ac8 ("usb: dwc2: unify waiting for transfer completion")
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:59 +02:00
Stephen Warren
805b67e1ea usb: dwc2: remove restriction on buffer length
Each USB transfer is split up into chunks that are held in an aligned
buffer. This imposes a limit on the size of each chunk, but no limit on
the total size of transferred data. Fix the logic in chunk_msg() not to
reject large transfers, but simply take the size of the aligned buffer
into account when calculating the chunk size.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:59 +02:00
Stephen Warren
d1c880c66c usb: dwc2: fix aligned buffer usage
The original aligned_buffer usage:
a) Uselessly copied data into the aligned buffer even for IN
   transactions. Fix this my making the copy conditional.
b) Always programmed the HW to transfer to/from the start of the aligned
   buffer. This worked fine for OUT transactions since the memcpy copied
   the OUT data to this location too. However, for large IN transactions,
   since the copy from the aligned buffer to the "client" buffer was
   deferred until after all chunks were transferred. it resulted in each
   chunk's transfer over-writing the data for the first transfer. Fix
   this by copying IN data as soon as it's received.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:59 +02:00
Stephen Warren
66ffc87586 usb: dwc2: simplify wait_for_chhltd
toggle is never NULL. Simplify the code by removing handling of when it
is NULL.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:58 +02:00
Stephen Warren
282685e07e usb: dwc2: remove control_data_toggle[]
The control data toggle resets to DATA1 at the start of the data phase
of every setup transaction. We don't need a global variable to store
the value; we can just store it on the stack.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:58 +02:00
Stephen Warren
ee83755401 usb: dwc2: usb chunk_msg() for control transfers too
This removes duplicated code.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:58 +02:00
Stephen Warren
7b5e504dae usb: dwc2: refactor submit_bulk_msg to be common
Move the body of submit_bulk_msg() into new function chunk_msg(). This
can be shared with submit_control_msg() to reduce code duplication, and
allow control messages larger than maxpacket.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:58 +02:00
Stephen Warren
4a1d21fc52 usb: dwc2: unify waiting for transfer completion
Lift common code out of submit_bulk_msg() and submit_control_msg().

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-14 05:47:58 +02:00
Masahiro Yamada
b41411954d linux/kernel.h: sync min, max, min3, max3 macros with Linux
U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does.  This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.

Many of references of those macros must be fixed to suppress warnings.
We have two options:
 - Use min, max, min3, max3 only when the arguments have the same type
   (or add casts to the arguments)
 - Use min_t/max_t instead with the appropriate type for the first
   argument

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini <trini@ti.com>
2014-11-23 06:48:30 -05:00
Oleksandr Tymoshenko
6e9e06260d usb: dwc2: Add driver for Synopsis DWC2 USB IP block
This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.

This code has three checkpatch warnings, but to make sure it stays at least
readable and clear, these are not fixed. These bugs are in the USB request
handling combinatorial logic, so any abstracting of those is out of question.

Tested on DENX MCV (Altera SoCFPGA 5CSFXC6C6U23C8N) and RPi B+ (BCM2835).

Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Vince Bridgers <vbridger@altera.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-10-22 22:01:58 +02:00