Commit graph

242 commits

Author SHA1 Message Date
Simon Glass
9e5616dea9 Drop PCMCIA
This is no-longer used in U-Boot and has not been converted to driver
model. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 19:27:41 -04:00
Simon Goldschmidt
a8b5031108 spl: kconfig: separate sysreset and firmware drivers from misc
This adds separate kconfig options for drivers/sysreset and
drivers/firmware.

Up to now, CONFIG_SPL_DRIVERS_MISC_SUPPORT added drivers/misc to SPL
build but also added drivers/firmware and drivers/sysreset at the same
time.

Since that is confusing, this patch uses CONFIG_SPL_SYSRESET for
drivers/sysreset and adds CONFIG_SPL_FIRMWARE for
drivers/firmware (and accordingly for the TPL options).

CONFIG_SPL_DRIVERS_MISC_SUPPORT stays for including drivers/misc into
the SPL build (and accordingly for TPL) since there are boards using
non-DM (non UCLASS_MISC) files from drivers/misc. Such boards don't
have CONFIG_SPL_MISC enabled, so cannot use this to include
drivers/misc into the SPL build.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-07-21 12:47:13 +02:00
Ramon Fried
914026d258 drivers: pci_ep: Introduce UCLASS_PCI_EP uclass
Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Tom Rini
6984044d05 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Assorted stratix10 fixes.
- DDR driver DM migration.
2019-05-07 09:37:11 -04:00
Ley Foon Tan
5918afda9d ddr: altera: Compile ALTERA SDRAM in SPL only
Compile ALTERA_SDRAM driver in SPL only.
Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06 12:44:17 +02:00
Dinh Nguyen
84b124db35 dm: cache: Create a uclass for cache
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.

Add a uclass and a test for cache.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-05-05 08:48:50 -04:00
Simon Glass
c882163b09 x86: sandbox: pch: Add a CONFIG option for PCH
At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20 15:25:30 +08:00
Andrew F. Davis
2d59ec8482 dfu: Make DFU support more SPL friendly
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
This ensures the files and features are only built into the right build
for which they are enabled. Using the macros to simplify this patch was
made possible by the config symbol rename done in the last patch.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26 08:13:55 -05:00
Andrew F. Davis
6536ca4d66 spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
to allow for cleaner use in code.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26 08:13:54 -05:00
Jean-Jacques Hiblot
f811e9763f Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGET
The SPL option for USB gadget should be named after the option for u-boot
(CONFIG_USB_GADGET)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-01-10 18:52:55 +01:00
Tom Rini
522e035441 imx for 2019.01
- introduce support for i.MX8M
 - fix size limit for Vhybrid / pico boards
 - several board fixes
 - w1 driver for MX2x / MX5x
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Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imx

imx for 2019.01

- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x
2019-01-01 10:01:00 -05:00
Peng Fan
e3963c0943 drivers: ddr: introduce DDR driver for i.MX8M
Introduce DDR driver for i.MX8M. The driver will be used by SPL to
initialze DDR PHY and DDR Controller.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Jean-Jacques Hiblot
9a1dde58f5 spl: drivers: Link usb common library to SPL if USB gadget is enabled
Some drivers might need to access common USB functions such as
usb_get_maximum_speed() or usb_get_dr_mode().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Sekhar Nori
d50d6817b5 spl: fix build failure with !CONFIG_SPL_PCI_SUPPORT
Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but
CONFIG_SPL_PCI_SUPPORT disabled, results in following linker
error:

lib/built-in.o: In function `fdtdec_get_pci_bar32':
lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32'
fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32'

This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c
while SPL build does not descend into drivers/pci directory in
drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled.

Fix this by applying appropriate #define guards in lib/fdtdec.c.
It looks like ns16550.c has the same problem, so fixed that too.

To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI
(enables use of CONFIG_IS_ENABLED() macro).

Suggested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-12 12:14:23 -05:00
Tom Rini
91ff686562 blk: Rework guard around part_init call
The function part_init() will only be built when we have both
CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE set.  Protect the call to
this function with both of these tests now.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-12 12:14:22 -05:00
Benjamin Gaignard
7f84fc670b dm: Add Hardware Spinlock class
This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:32 -05:00
Simon Glass
2d424eb0cd spl: Support hash, input, pch, pci, rtc, tpm in SPL
At present these subsystems are only supported in U-Boot proper but it is
sometimes necessary to support them in SPL, or even TPL. Update the
Kconfig and Makefile to support this. Also adjust GPIO so that it can be
used in TPL if required.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-26 08:25:33 -05:00
Bin Meng
8fb49b4c7a dm: Add a new uclass driver for VirtIO transport devices
This adds a new virtio uclass driver for “virtio” [1] family of
devices that are are found in virtual environments like QEMU,
yet by design they look like physical devices to the guest.

The uclass driver provides child_pre_probe() and child_post_probe()
methods to do some common operations for virtio device drivers like
device and driver supported feature negotiation, etc.

[1] http://docs.oasis-open.org/virtio/virtio/v1.0/virtio-v1.0.pdf

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:27 -08:00
Jens Wiklander
9ff4a31175 Add UCLASS_TEE for Trusted Execution Environment
Adds a uclass to interface with a TEE (Trusted Execution Environment).

A TEE driver is a driver that interfaces with a trusted OS running in
some secure environment, for example, TrustZone on ARM cpus, or a
separate secure co-processor etc.

The TEE subsystem can serve a TEE driver for a Global Platform compliant
TEE, but it's not limited to only Global Platform TEEs.

The over all design is based on the TEE subsystem in the Linux kernel,
tailored for U-Boot.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Tom Rini
592cd5defd Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.

[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-02 17:01:46 -04:00
Tom Rini
d24c1d0f4d Merge git://git.denx.de/u-boot-dm 2018-09-30 18:16:51 -04:00
Mario Six
5381c2856d drivers: Add board uclass
Since there is no canonical "board device" that can be used in board
files, it is difficult to use DM function for board initialization in
these cases.

Hence, add a uclass that implements a simple "board device", which can
hold devices not suitable anywhere else in the device tree, and is also
able to read encoded information, e.g. hard-wired GPIOs on a GPIO
expander, read-only memory ICs, etc. that carry information about the
hardware.

The devices of this uclass expose methods to read generic data types
(integers, strings, booleans) to encode the information provided by the
hardware.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-29 11:49:35 -06:00
Maxime Ripard
c924ee25aa W1-EEPROM: Add an W1-EEPROM uclass for 1 wire EEPROMs
We might want to access data stored onto one wire EEPROMs.
Create a framework to provide a consistent API.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked patch]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:35 -04:00
Maxime Ripard
d3e19cf919 w1: Add 1-Wire uclass
We might want to use 1-Wire devices connected on boards such as EEPROMs in
U-Boot.

Provide a framework to be able to do that.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:34 -04:00
Miquel Raynal
a430fa06a4 mtd: move NAND files into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Lokesh Vutla
08c45314a8 spl: Allow remoteproc drivers to be used within SPL
Add an option for building remoteproc drivers within SPL.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
880274192c spl: Allow mailbox drivers to be used within SPL
Add an option for building mailbox drivers within SPL.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Mario Six
a63e54ab5f drivers: Add AXI uclass
Add a uclass for AXI (Advanced eXtensible Interface) busses, and a
driver for the gdsys IHS AXI bus on IHS FPGAs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-11 08:07:36 +02:00
Peng Fan
e13278c943 power: Add CONFIG_SPL_POWER_DOMAIN config
Add CONFIG_SPL_POWER_DOMAIN config entry.
Build drivers/power/domain if this config is selected.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-06 11:51:10 +02:00
Ramon Fried
7b384eccc7 dm: SMEM (Shared memory) uclass
This is a uclass for Shared memory manager drivers.

A Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-19 16:31:37 -04:00
Ley Foon Tan
bfc6bae8fa reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use
CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:25:43 -04:00
Tom Rini
809e0e398a Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-06-04 08:55:00 -04:00
Alex Kiernan
d2df2abbcd fastboot: Extract fastboot_okay/fail to fb_common.c
Add drivers/fastboot/fb_common.c, where fastboot_okay/fail are implemented
so we can call them from a non-USB implementation.

Introduce fastboot_response which takes varargs parameters so we can
use it to generate formatted response strings. Refactor fastboot_okay/fail
to use it.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
312a10f16b fastboot: Move fastboot to drivers/fastboot
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to
drivers/fastboot.

Switch dependencies on FASTBOOT to USB_FUNCTION_FASTBOOT as anyone who wants
FASTBOOT before this series wants USB_FUNCTION_FASTBOOT. Split
USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing
behaviour.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Jagan Teki
6768594326 phy: Add Allwinner A64 USB PHY driver
USB PHY implementation for Allwinner SOC's can be handling
in to single driver with different phy configs.

This driver handle all Allwinner USB PHY's start from 4I to
50I(except 9I). Currently added A64 compatibility more will
add in next coming patches.

Current implementation is unable to get pinctrl, clock and reset
details from DT since the dm code on these will add it future.

Driver named as phy-sun4i-usb.c since the same PHY logic
work for all Allwinner SOC's start from 4I to A64 except 9I
with different phy configurations.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Lukasz Majewski
afa9609eca bootcount: spl: Enable bootcount support in SPL
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been
added to allow drivers/bootcount code re-usage in SPL.

This code is necessary to use and setup bootcount in SPL in the case of
falcon boot mode.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10 20:37:05 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Patrick Delaunay
0e373c0ade spl: add SPL_RESET_SUPPORT
Add option to include RESET driver and uclass in SPL.
That can be useful to handle IP reset with same driver
in U-Boot and in SPL.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:20 -04:00
Faiz Abbas
b432b1ebdf spl: Kconfig: Rename SPL_USBETH_SUPPORT to SPL_USB_ETHER to match with the U-boot CONFIG
Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER.

This enables users to block text using CONFIG_IS_ENABLED() instead
of resorting to #if ladders with SPL and non-SPL cases.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-03-05 10:06:05 -05:00
Faiz Abbas
8502f9f6d7 thermal: ti-bandgap: Add support for temperature sensor
The dra7xx series of SOCs contain a temperature sensor and an
associated analog-to-digital converter (ADC) which produces
an output which is proportional to the SOC temperature.
Add support for this temperature sensor.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-21 08:03:38 -05:00
Tom Rini
c1b62ba9ca Merge branch 'master' of git://git.denx.de/u-boot-rockchip 2017-08-14 10:40:01 -04:00
Zhikang Zhang
982388eaa9 nvme: Add NVM Express driver support
NVM Express (NVMe) is a register level interface that allows host
software to communicate with a non-volatile memory subsystem. This
interface is optimized for enterprise and client solid state drives,
typically attached to the PCI express interface.

This adds a U-Boot driver support of devices that follow the NVMe
standard [1] and supports basic read/write operations.

Tested with a 400GB Intel SSD 750 series NVMe card with controller
id 8086:0953.

[1] http://www.nvmexpress.org/resources/specifications/

Signed-off-by: Zhikang Zhang <zhikang.zhang@nxp.com>
Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 15:17:31 -04:00
Philipp Tomsich
e9e5d9d29f dm: timer: normalise SPL and TPL support
To fully support DM timer in SPL and TPL, we need a few things cleaned
up and normalised:
- inclusion of the uclass and drivers should be an all-or-nothing
  decision for each stage and under control of $(SPL_TPL_)TIMER
  instead of having the two-level configuration with TIMER and
  $(SPL_TPL_)TIMER_SUPPORT
- when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can
  not be compiled in

This normalises configuration to $(SPL_TPL_)TIMER and moves the config
options to drivers/timer/Kconfig (and cleans up the collateral damage
to some defconfigs that had SPL_TIMER_SUPPORT enabled).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13 17:12:36 +02:00
Philipp Tomsich
87c16d49a6 drivers: spl: consistently use the $(SPL_TPL_) macro
To simplify drivers/Makefile a bit when using TPL/SPL, we consistently
use the $(SPL_TPL_) macro to test for drivers that have separate
configuration symbols for the full U-boot, SPL and TPL stages.
Instead of explicitly repeating them in two separate if-guarded
sections of the Makefile, we can now simply list these options once.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13 17:12:21 +02:00
Tien Fong Chee
386c65e556 drivers: Enable FPGA driver build on SPL
Enable FPGA driver build for Arria 10 SPL because FPGA driver is
needed by Arria 10 SPL to configure and getting DDR up before
loading U-boot into DDR and booting from there.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2017-07-26 10:31:44 +02:00
Simon Glass
0fcd48fe00 scsi: Move drivers into new drivers/scsi directory
At present we have the SCSI drivers in the drivers/block and common/
directories. It is better to split them out into their own place. Use
drivers/scsi which is what Linux does.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11 10:08:19 -06:00
Simon Glass
f2105c6182 sata: Move drivers into new drivers/ata directory
At present we have the SATA and PATA drivers mixed up in the drivers/block
directory. It is better to split them out into their own place. Use
drivers/ata which is what Linux does.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11 10:08:19 -06:00
Simon Glass
853eaa4f30 Drop digital thermometer and thermostat (DTT) drivers
This subsystem is quite old. It has been replaced with a driver-model
version (UCLASS_THERMAL). Boards are free to convert to that if required,
but here is a removal patch that could be applied in the meantime.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22 08:37:11 -04:00
Simon Glass
ab3c4fbe8a Drop three-wire serial (TWS) support
This subsystem has not been converted to driver model, there is only one
driver and only one board that uses it. Drop it and its CONFIG option.

Also drop the rtc4543 RTC driver since it uses TWS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-22 08:37:10 -04:00
Masahiro Yamada
792f0054a4 mmc: descend into drivers/mmc only when CONFIG_MMC is enabled
This simplifies makefiles.  Also, arrange the order of objects in
drivers/mmc/Makefile so that the framework objects are listed before
drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15 18:28:23 +09:00
Jean-Jacques Hiblot
72e5016f87 drivers: phy: add generic PHY framework
The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_off() and
reset(). The framework provides a way to get a reference to a phy from the
device-tree.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09 12:14:16 -06:00
Masahiro Yamada
573a3811ed sysreset: psci: support system reset in a generic way with PSCI
If the system is running PSCI firmware, the System Reset function
(func ID: 0x80000009) is supposed to be handled by PSCI, that is,
the SoC/board specific reset implementation should be moved to PSCI.
U-Boot should call the PSCI service according to the arm-smccc
manner.

The arm-smccc is supported on ARMv7 or later.  Especially, ARMv8
generation SoCs are likely to run ARM Trusted Firmware BL31.  In
this case, U-Boot is a non-secure world boot loader, so it should
not be able to reset the system directly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-04-18 10:29:19 -04:00
Simon Glass
5a6f06f696 dm: core: Allow driver model to be disabled for TPL
Since TPL often needs to be very very small it may not make sense to
enable driver model. Add an option for this.

This changes brings the 'rock' board under the TPL limit with gcc 4.9.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-05 16:36:58 -04:00
Simon Glass
bbe41abf7f spl: Allow PCH drivers to be used in SPL
Add an option for building Platorm Controller Hub drivers in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
4a6c81ff42 spl: Allow timer drivers to be used in SPL
Add a new Kconfig option to allow timer drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
30bf8a0dae spl: Allow RTC drivers to be used in SPL
Add a new Kconfig option to allow RTC drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
2446b6b8f7 spl: Allow PCI drivers to be used in SPL
Add a new Kconfig option to allow PCI drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Simon Glass
5e148df952 spl: Allow CPU drivers to be used in SPL
Add a new Kconfig option to allow CPU drivers to be used in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-06 11:38:46 +08:00
Stefan Agner
e94793c844 spl: add USB Gadget config option
Introduce USB Gadget config option. This allows to combine Makefile
entries for SPL_USBETH_SUPPORT and SPL_DFU_SUPPORT.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Ravi Babu <ravibabu@ti.com>
2016-11-28 19:49:49 -05:00
Stefan Agner
5991703e88 spl: dfu: move DFU Kconfig to SPL Kconfig
The DFU Kconfig menu entries should be part of the SPL
Kconfig file. Also avoid using the top level Makefile by
moving the config dependent build artifacts to the driver/
and driver/usb/gadget/ Makfiles.

With that, DFU can be built again in SPL if
CONFIG_SPL_DFU_SUPPORT is enabled.

Fixes: 6ad6102246 ("usb:gadget: Disallow DFU in SPL for now")

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2016-11-28 19:49:49 -05:00
Stefan Roese
3335786a98 drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 3k
This version is based on the Marvell U-Boot version with this patch
applied as latest patch:

Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb
device mode" from 2016-07-05.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
2016-09-27 17:29:53 +02:00
Simon Glass
76f1f38816 Use separate options for TPL support
At present TPL uses the same options as SPL support. In a few cases the board
config enables or disables the SPL options depending on whether
CONFIG_TPL_BUILD is defined.

With the move to Kconfig, options are determined for the whole build and
(without a hack like an #undef in a header file) cannot be controlled in this
way.

Create new TPL options for these and update users. This will allow Kconfig
conversion to proceed for these boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:03:39 -04:00
Max Filippov
b25732c22b drivers/sysreset: group sysreset drivers
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:22:17 -04:00
Thomas Gleixner
6f4e7d3c75 spl: Lightweight UBI and UBI fastmap support
Booting a payload out of NAND FLASH from the SPL is a crux today, as
it requires hard partioned FLASH. Not a brilliant idea with the
reliability of todays NAND FLASH chips.

The upstream UBI + UBI fastmap implementation which is about to
brought to u-boot is too heavy weight for SPLs as it provides way more
functionality than needed for a SPL and does not even fit into the
restricted SPL areas which are loaded from the SoC boot ROM.

So this provides a fast and lightweight implementation of UBI scanning
and UBI fastmap attach. The scan and logical to physical block mapping
code is developed from scratch, while the fastmap implementation is
lifted from the linux kernel source and stripped down to fit the SPL
needs.

The text foot print on the board which I used for development is:

6854	0	0	6854	1abd
drivers/mtd/ubispl/built-in.o

Attaching a NAND chip with 4096 physical eraseblocks (4 blocks are
reserved for the SPL) takes:

In full scan mode:      1172ms
In fastmap mode:          95ms

The code requires quite some storage. The largest and unknown part of
it is the number of fastmap blocks to read. Therefor the data
structure is not put into the BSS. The code requires a pointer to free
memory handed in which is initialized by the UBI attach code itself.

See doc/README.ubispl for further information on how to use it.

This shares the ubi-media.h and crc32 implementation of drivers/mtd/ubi
There is no way to share the fastmap code, as UBISPL only utilizes the
slightly modified functions ubi_attach_fastmap() and ubi_scan_fastmap()
from the original kernel ubi fastmap implementation.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-22 09:53:00 -04:00
Ladislav Michl
05fc5ef161 mtd: Sort subsystem directories aplhabeticaly in Makefile
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2016-07-22 09:52:59 -04:00
Stephen Warren
89c1e2da78 Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that
affect other hardware modules or chips.

This patch defines a standard API that connects reset clients (i.e. the
drivers for devices affected by reset signals) to drivers for reset
controllers/providers. Initially, DT is the only supported method for
connecting the two.

The DT binding specification (reset.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/reset/reset.txt.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19 17:05:55 -06:00
Teddy Reed
51c14cd128 verified-boot: Minimal support for booting U-Boot proper from SPL
This allows a board to configure verified boot within the SPL using
a FIT or FIT with external data. It also allows the SPL to perform
signature verification without needing relocation.

The board configuration will need to add the following feature defines:
CONFIG_SPL_CRYPTO_SUPPORT
CONFIG_SPL_HASH_SUPPORT
CONFIG_SPL_SHA256

In this example, SHA256 is the only selected hashing algorithm.

And the following booleans:
CONFIG_SPL=y
CONFIG_SPL_DM=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_OF_LIBFDT=y
CONFIG_SPL_FIT_SIGNATURE=y

Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
Acked-by: Sumit Garg <sumit.garg@nxp.com>
2016-06-12 13:14:58 -04:00
Stephen Warren
6238935d01 Add a mailbox driver framework/uclass
A mailbox is a hardware mechanism for transferring small message and/or
notifications between the CPU on which U-Boot runs and some other device
such as an auxilliary CPU running firmware or a hardware module.

This patch defines a standard API that connects mailbox clients to mailbox
providers (drivers). Initially, DT is the only supported method for
connecting the two.

The DT binding specification (mailbox.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-05-26 20:48:31 -06:00
Simon Glass
0776167ec5 dm: mmc: spl: Use the legacy block interface in SPL
Bring this in for SPL so that we can use generic code for loading from
block devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Simon Glass
57ebf67bad dm: usb: Drop the get_dev() function
This function is implemented by the legacy block functions now. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-17 09:54:43 -06:00
Mateusz Kulikowski
04868b407b drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-04-01 17:18:12 -04:00
Purna Chandra Mandal
9ffa7a35ef drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.
This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module.
DDR2 controller operates in half-rate mode (upto 533MHZ frequency).

Signed-off-by: Paul Thacker <paul.thacker@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-01 22:14:01 +01:00
Simon Glass
ca831f4933 dm: Expand the uclass for Platform Controller Hubs (PCH)
A Platform Controller Hub is an Intel concept - it is like the peripherals
on an SoC and is often in a separate chip from the CPU. The chip is typically
found on the first PCI bus and integrates multiple devices.

We have a very simple uclass to support PCHs. Add a few operations, such as
setting up the devices on the PCH and finding the SPI controller base
address. Also move it into drivers/pch/ since we will be adding a few PCH
drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:17 +08:00
Stefan Roese
81e33f4b65 arm: mvebu: Move SoC selection (A38X vs AXP) into Kconfig
Until now, the SoC selection for the ARCH_MVEBU platforms has been done
in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As
it needed to get selected for AXP and A38x based boards. This patch
now changes this to move the SoC selection to Kconfig. And also
uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x.
This makes things a bit clearer - especially for new board additions.

Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and
CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available
CONFIG_ARMADA_38X and CONFIG_ARMADA_XP.

And CONFIG_DDR3 is removed, as its not referenced anywhere.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14 14:08:59 +01:00
Tom Rini
da58dec866 Various Makefiles: Add SPDX-License-Identifier tags
After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one.  This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.

Cc: Kate Stewart <kstewart@linuxfoundation.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-10 09:19:52 -05:00
Przemyslaw Marczak
5decbf5300 dm: adc: add simple ADC uclass implementation
This commit adds:
- new uclass id: UCLASS_ADC
- new uclass driver: drivers/adc/adc-uclass.c

The new uclass's API allows for ADC operation on:
* single-channel with channel selection by a number
* multti-channel with channel selection by bit mask

ADC uclass's functions:
* single-channel:
  - adc_start_channel()        - start channel conversion
  - adc_channel_data()         - get conversion data
  - adc_channel_single_shot()  - start/get conversion data
* multi-channel:
  - adc_start_channels()       - start selected channels conversion
  - adc_channels_data()        - get conversion data
  - adc_channels_single_shot() - start/get conversion data for channels
                                 selected by bit mask
* general:
  - adc_stop()      - stop the conversion
  - adc_vdd_value() - positive reference Voltage value with polarity [uV]
  - adc_vss_value() - negative reference Voltage value with polarity [uV]
  - adc_data_mask() - conversion data bit mask

The device tree can provide below constraints/properties:
- vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1)
- vss-polarity-negative: if true: Vss = vss-microvolts * (-1)
- vdd-supply:            phandle to Vdd regulator's node
- vss-supply:            phandle to Vss regulator's node
And optional, checked only if the above corresponding, doesn't exist:
  - vdd-microvolts:      positive reference Voltage [uV]
  - vss-microvolts:      negative reference Voltage [uV]

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02 10:38:00 +09:00
Thomas Chou
c8a7ba9e6a dm: implement a Timer uclass
Implement a Timer uclass to work with lib/time.c.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-23 07:37:03 +08:00
Nishanth Menon
ddf56bc7e3 drivers: Introduce a simplified remoteproc framework
Many System on Chip(SoC) solutions are complex with multiple processors
on the same die dedicated to either general purpose of specialized
functions. Many examples do exist in today's SoCs from various vendors.
Typical examples are micro controllers such as an ARM M3/M0 doing a
offload of specific function such as event integration or power
management or controlling camera etc.

Traditionally, the responsibility of loading up such a processor with a
firmware and communication has been with a High Level Operating
System(HLOS) such as Linux. However, there exists classes of products
where Linux would need to expect services from such a processor or the
delay of Linux and operating system being able to load up such a
firmware is unacceptable.

To address these needs, we need some minimal capability to load such a
system and ensure it is started prior to an Operating System(Linux or
any other) is started up.

NOTE: This is NOT meant to be a solve-all solution, instead, it tries to
address certain class of SoCs and products that need such a solution.

A very simple model is introduced here as part of the initial support
that supports microcontrollers with internal memory (no MMU, no
execution from external memory, or specific image format needs). This
basic framework can then (hopefully) be extensible to other complex SoC
processor support as need be.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-22 14:18:38 -04:00
Masahiro Yamada
d90a5a30de pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.

This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.

This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print.  Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.

We are often limited on code size for SPL.  Besides, we still have
many boards that do not support device tree configuration.  The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards.  So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface.  With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc.  They must be
done in each low-level driver.  In return, you can save much memory
footprint and it might be useful especially for SPL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-31 07:57:29 -06:00
Masahiro Yamada
e00e8b3989 led: unify obj-$(CONFIG_LED) and obj-$(CONFIG_SPL_LED) entries
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:03 -04:00
Masahiro Yamada
f0cd245448 led: rename CONFIG_SPL_LED_SUPPORT to CONFIG_SPL_LED
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:03 -04:00
Masahiro Yamada
26d5fa805d ram: unify obj-$(CONFIG_RAM) and obj-$(CONFIG_SPL_RAM) entries
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:02 -04:00
Masahiro Yamada
40c9abbd6b ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAM
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:02 -04:00
Masahiro Yamada
5525958346 clk: unify obj-$(CONFIG_CLK) and obj-$(CONFIG_SPL_CLK) entries
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:02 -04:00
Masahiro Yamada
0543589118 clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLK
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:01 -04:00
Masahiro Yamada
040906f68d dm: unify obj-$(CONFIG_DM) and obj-$(CONFIG_SPL_DM) entries
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:01 -04:00
Masahiro Yamada
d6c2ac5b75 spl: move SPL driver entries to driver/Makefile
Just preparing for upcoming cleaning.

The board-specific linker script  board/vpac270/u-boot-spl.lds
has been touched to avoid build error.  It does not change the
size of spl/u-boot-spl.bin for this board, so it should be OK.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-18 13:46:00 -04:00
Simon Glass
f26c8a8e77 dm: Add a clock uclass
Clocks are an important feature of platforms and have become increasing
complex with time. Most modern SoCs have multiple PLLs and dozens of clock
dividers which distribute clocks to on-chip peripherals.

Some SoC implementations have a clock API which is private to that SoC family,
e.g. Tegra and Exynos. This is useful but it would be better to have a
common API that can be understood and used throughout U-Boot.

Add a simple clock API as a starting point. It supports querying and setting
the rate of a clock. Each clock is a device. To reduce memory and processing
overhead the concept of peripheral clocks is provided. These do not need to
be explicit devices - it is possible to write a driver that can adjust the
I2C clock (for example) without an explicit I2C clock device. This can
dramatically reduce the number of devices (and associated overhead) in a
complex SoC.

Clocks are referenced by a number, and it is expected that SoCs will define
that numbering themselves via an enum.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:29 -06:00
Simon Glass
6c51df6859 dm: Add support for RAM drivers
Add support for a driver which sets up DRAM and can return information about
the amount of RAM available. This is a first step towards moving RAM init
to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:27 -06:00
Simon Glass
5917112c9e dm: Add support for LEDs
Add a simple uclass for LEDs, so that these can be controlled by the device
tree and activated when needed. LEDs are referred to by their label.

This implementation requires a driver for each type of LED (e.g GPIO, I2C).

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:24 -06:00
Simon Glass
11f4dc1583 dm: Implement a CPU uclass
It is useful to be able to keep track of the available CPUs in a multi-CPU
system. This uclass is mostly intended for use with SMP systems.

The uclass provides methods for getting basic information about each CPU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-04-29 21:02:33 -06:00
Tom Rini
85bafb6da4 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2014-11-26 11:23:26 -05:00
Ye.Li
e3568d2eca DM: thermal: Add imx thermal DM driver
Add a new thermal uclass for thermal sensor and implement the imx
thermal driver basing on this uclass.

Signed-off-by: Ye.Li <B37916@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-11-21 15:30:01 +01:00
Zhao Qiang
93d3320417 qe: add u-qe support to arm board
ls1021 is arm-core and support qe which is u-qe.
add u-qe init for arm board.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
[York Sun: Fix compiling error caused by u_qe_init()]
Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-19 12:55:45 -08:00
Khoronzhuk, Ivan
a43febde44 soc: keystone_serdes: create a separate SGMII SerDes driver
This patch split the Keystone II SGMII SerDes related code from
Ethernet driver and create a separate SGMII SerDes driver.
The SerDes driver can be used by others keystone subsystems
like PCI, sRIO, so move it to driver/soc/keystone directory.

Add soc specific drivers directory like in the Linux kernel.
It is going to be used by keysotone soc specific drivers.

Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Masahiro Yamada
f494e0a184 kbuild: refactor some makefiles
[1] Move driver/core/, driver/input/ and drivers/input/ entries
    from the top Makefile to drivers/Makefile

[2] Remove the conditional by CONFIG_DM in drivers/core/Makefile
    because the whole drivers/core directory is already selected
    by CONFIG_DM in the upper level

[3] Likewise for CONFIG_DM_DEMO in drivers/demo/Makefile

[4] Simplify common/Makefile - both CONFIG_DDR_SPD and
    CONFIG_SPD_EEPROM are boolean macros so they can directly
    select objects

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-09-24 18:30:29 -04:00
Heiko Schocher
b2f97cf279 pwm, imx6: add support for pwm modul on imx6
add basic support for the pwm modul found on imx6.
Pieces of this code are based on linux code from drivers/pwm/pwm-imx.c
Commit "cd3de83f1476 Linux 3.16-rc4"

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-07-23 12:25:42 +02:00
Khoronzhuk, Ivan
909ea9aa26 ARM: keystone: aemif: move aemif driver to drivers/memory/ti-aemif.c
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-06-19 17:53:58 -04:00
Masahiro Yamada
4c76b55231 drivers/qe: move the entry to drivers/Makefile
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-17 14:11:31 -05:00
Masahiro Yamada
7b6af41ef3 drivers: descend into sub directories only when it is necessary
- Descend into drivers/fpga/ only when CONFIG_FPGA=y
  - Descend into drivers/bios_emulator only when CONFIG_BIOSEMU=y

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-17 14:11:30 -05:00