Commit graph

895 commits

Author SHA1 Message Date
Tom Rini
9452b7496f Merge tag 'u-boot-rockchip-20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix mmc of path after syncfrom kernel dts;
- Add dwc3 host support with DM for rk3399;
- Add usb2phy and typec phy for rockchip platform;
- Migrate board list doc to rockchip.rst;
- Add rk3399 Pinebook Pro board support;
- Update dram_init in board_init and add memory node in SPL;
2020-05-31 20:07:39 -04:00
Frank Wang
604ab3ecda driver: usb: drop legacy rockchip xhci driver
We have changed to use dwc3 generic driver for usb3.0 host, so the
legacy Rockchip's xHCI driver is not needed, and drop it.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30 07:38:50 +08:00
Marek Vasut
73021d11d4 usb: ehci-mx6: Print error code on failure
Print the error code if the regulator enable fails, otherwise the error
message is rather useless and confusing.

Signed-off-by: Marek Vasut <marex@denx.de>
2020-05-29 19:23:36 +02:00
Marek Vasut
10bcafb8ac usb: ehci-mx6: Handle fixed regulators correctly
The regulator-fixed would return -ENOSYS when enabled/disabled,
because this operation is not supported, but this is not an error
e.g. on systems where the VBUS cannot be controlled, so if this
is the error code reported by the regulator core, consider it a
success and continue.

Signed-off-by: Marek Vasut <marex@denx.de>
2020-05-29 19:18:55 +02:00
Chunfeng Yun
58221d7e87 usb: dwc3: fix NULL pointer issue
The phy_bulk pointer *usb_phys is used before allocated,
fix it by using a phy_bulk variable instead in
xhci_dwc3_platdata struct

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-05-22 15:22:36 +02:00
Adam Ford
94ed66194f usb: ehci-omap: Add Support for DM_USB and OF_CONTROL
The omap3.dtsi file shows the usbhshost node with two sub-nodes
for ohci and ehci.  This patch file creates the usbhshost, and
pulls the portX-mode information.  It then locates the EHCI
sub-node, and initializes the EHCI controller with the info
pulled from the usbhshost node.

There is still more to do since there isn't an actual link
between the 'phys' reference and the corresponding phy driver,
and there is no nop-xceiv driver yet.

In the meantime, the older style reference to
CONFIG_OMAP_EHCI_PHYx_RESET_GPIO is still needed to pull
the phy out of reset until the phy driver is completed and the
phandle reference is made.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-22 15:22:35 +02:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
eb41d8a1be common: Drop linux/bug.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Trevor Woerner
18138ab203 rename symbol: CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
bb0fb4c0f4 rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
Have this symbol follow the pattern of all other such symbols.
This patch also removes a TODO from the code.

Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Trevor Woerner
b16a331697 rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
Have this symbol follow the pattern of all other such symbols.
This patch removes a TODO from the code.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Peng Fan
0bd3d911df usb: mx6: add fuse check
Add fuse check for USB. If the fuse indicates the module
will not work in the SoC, let's fail the initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:21:27 +02:00
Chunfeng Yun
7410283415 xhci: mediatek: Add support for MTK xHCI host controller
This patch is used to support the on-chip xHCI controller on
MediaTek SoCs, currently control/bulk/interrupt transfers are
supported.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-02 12:32:28 +02:00
Chunfeng Yun
6dfb8a8052 usb: dwc3: use the phy bulk API to get phys
Get a group of phys by the phy bulk API

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-05-02 12:32:28 +02:00
Patrice Chotard
f3bc736e41 usb: host: dwc3-sti-glue: Use UCLASS_NOP instead of UCLASS_MISC
dwc3-sti-glue has been broken since MISC uclass has been
modified to scan DT sub-nodes after bind.
Fixing it by a using the no-op uclass.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
245847f065 usb: host: dwc2: add trace to have clean usb start
Solve issue for the display of "usb start" command on stm32mp1
because one carriage return is missing in DWC2 probe.

Before the patch:

STM32MP> usb start
starting USB...
Bus usb-otg@49000000:    Bus usbh-ehci@5800d000:   USB EHCI 1.00

after the patch:

STM32MP> usb start
starting USB...
Bus usb-otg@49000000: USB DWC2
Bus usbh-ehci@5800d000: USB EHCI 1.00

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
6600438166 usb: host: dwc2: force reset assert
Assert reset before deassert in dwc2_reset;
this patch solve issues when the DWC2 registers are already
initialized with value incompatible with host mode.

Force a hardware reset of the IP reset all the DWC2 registers at
default value, the host driver start with a clean state
(Core Soft reset doen in dwc_otg_core_reset is not enought
 to reset all register).

The error can occurs in U-Boot when DWC2 device gadget driver
force device mode (called by ums or dfu command, before to execute
the usb start command).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
0bc632c9b1 usb: host: dwc2: add clk support
Add support for clock with driver model.

This patch don't added dependency because when CONFIG_CLK
is not activated the clk function are stubbed.

Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
e17a4bf198 usb: host: dwc2: add phy support
Use generic phy to initialize the PHY associated to the
DWC2 device and available in the device tree.

This patch don't added dependency because when CONFIG_PHY
is not activated, the generic PHY function are stubbed.

Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Heinrich Schuchardt
cff0144e4c usb: avoid NULL check before free
The free() function checks if the argument is NULL.
Do not duplicate this check.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-28 13:52:52 +02:00
Rayagonda Kokatanur
9cadf05958 drivers: usb: host: Add BRCM xHCI driver
Base driver for Broadcom xHCI controllers

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-04-13 13:48:41 +02:00
Kever Yang
2517deafc2 usb: Migrate to support live DT for some driver
Use ofnode_ instead of fdt_ APIs so that the drivers can support live DT.
This patch updates usb_get_dr_mode() and usb_get_maximum_speed() to use
ofnode as parameter instead of fdt offset. And all the drivers who use
these APIs update to use live dt APIs at the same time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-13 13:48:30 +02:00
Kever Yang
0148bbe8f3 usb: ehci-msm: Use dev interface to get device address
Use dev_read_addr_ptr() instead of devfdt_get_addr() so that we can support
live DT.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-04-13 13:48:30 +02:00
Kever Yang
5c17030358 usb: dwc3-of-simple: Drop redundant inclding header file
The fdtdec.h is no use in this file, remove the include code.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-13 13:48:30 +02:00
Marek Vasut
31232de07e usb: Keep async schedule running only across mass storage xfers
Rather than keeping the asynchronous schedule running always, keep it
running only across USB mass storage transfers for now, as it seems
that keeping it running all the time interferes with certain control
transfers during device enumeration.

Note that running the async schedule all the time should not be an
issue, especially on EHCI HCD, as that one implements most of the
transfers using async schedule.

Note that we have usb_disable_asynch(), which however is utterly broken.
The usb_disable_asynch() blocks the USB core from doing async transfers
by setting a global flag. The async schedule should however be disabled
per USB controller. Moreover, setting a global flag does not prevent the
controller from using the async schedule, which e.g. the EHCI HCD does.

This patch implements additional callback to the controller, which
permits it to lock the async schedule and keep it running across
multiple transfers. Once the schedule is unlocked, it must also be
disabled. This thus prevents the async schedule from running outside
of the USB mass storage transfers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> [omap3_beagle, previously failing]
2020-04-09 15:26:59 -04:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Chunfeng Yun
e0891bb679 usb: xhci: support 1.1 or later version
The xHCI 1.1 version also need set Transfer Type field

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-08 11:09:08 +01:00
Marek Vasut
02b0e1a36c usb: ehci-hcd: Keep async schedule running
Profiling the EHCI driver shows a significant performance problem in
ehci_submit_async(). Specifically, this function keeps enabling and
disabling async schedule back and forth for every single transaction.
However, enabling/disabling the async schedule does not take effect
immediatelly, but instead may take up to 1 mS (8 uFrames) to complete.

This impacts USB storage significantly, esp. since the recent reduction
of maximum transfer size to support more USB storage devices. This in
turn results in sharp increase in the number of ehci_submit_async()
calls. Since one USB storage BBB transfer does three such calls and
the maximum transfer size is 120 kiB, the overhead is 6 mS per 120 kiB,
which is unacceptable.

However, this overhead can be removed simply by keeping the async
schedule running. Specifically, the first transfer starts the async
schedule and then each and every subsequent transfer only adds a new
QH into that schedule, waits until the QH is completed and does NOT
disable the async schedule. The async schedule is stopped only by
shutting down the controller, which must happen before moving out
of U-Boot, otherwise the controller will corrupt memory.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
2019-10-31 12:13:40 +01:00
Ye Li
235f5e158e ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP
The ULP has two USB controllers. These two controllers have similar NC
registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not
the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY
to work.

This patch only supports OTG0 with UTMI PHY.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-10-24 15:31:13 +02:00
Igor Opaniuk
1198a104d3 usb: ehci-mx6: Fix bus enumeration for iMX7 SoCs
This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x10000.

Example of USB nodes for iMX7S/D:

usbotg1: usb@30b10000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b10000 0x200>;
           ^^^^^^^^^^
....
usbotg2: usb@30b20000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b20000 0x200>;
           ^^^^^^^^^^
....

usbh: usb@30b30000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b30000 0x200>;
           ^^^^^^^^^^
....

Which was leading to usb enumeration issues:
Colibri iMX7 # usb start
starting USB...
Bus usb@30b10000: USB EHCI 1.00
Bus usb@30b20000: probe failed, error -22
scanning bus usb@30b10000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Fixes: 501547cec1("usb: ehci-mx6: Fix bus enumeration for DM case")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-10-24 15:31:13 +02:00
Jean-Jacques Hiblot
1708a12377 usb: xhci: move xhci.h to include usb
The xhci.h header file is currently located under drivers/usb/xhci
Move it to the include/usb folder to make it available to drivers that
are not under drivers/usb/xhci

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-24 11:28:17 +02:00
Jean-Jacques Hiblot
a8973731a4 usb: host: remove the xhci-zynqmp driver
This driver is not used anymore.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-24 11:28:16 +02:00
Tom Rini
6f4001315a Merge branch 'master' of git://git.denx.de/u-boot-usb
- Assorted bugfixes
2019-09-14 19:56:09 -04:00
Kever Yang
6578db8961 usb: ohci-generic: don't probe fail if there is no clk_enable() ops
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-09-11 16:16:12 +08:00
Kever Yang
54a0c7b2e7 usb: ehci-generic: don't probe fail if there is no clk_enable() ops
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-09-11 16:16:12 +08:00
Michal Suchanek
9dcab2c4d2 dwc2: use the nonblock argument in submit_int_msg
An USB 1.1 keyboard connected to dwc2 through a high-speed hub does not
report status until it changes. With this patch you can enable keyboard
by pressing a key while USB devices are probed. Without a keypress no
state is reported and the probe times out. We don't want to wait for a
keypress or timeout while polling for keypresses so implement an int_msg
nonblock variant that exits early on error.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2019-09-11 10:11:29 +02:00
Michal Suchanek
3437121c03 usb: Add nonblock argument to submit_int_msg
This will be used to implement non-blocking keyboard polling in case of
errors.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
2019-09-11 10:11:29 +02:00
Neil Armstrong
b35b807682 usb: xhci-dwc3: Add support for dis_u2_susphy_quirk
This quirk is necessary for the Amlogic GXL SoCs otherwise the
Port 2 PHY doesn't get out of suspend and U-Boot resets the board after:

XHCI timeout on event type 33... cannot recover.
BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()!
BUG!

This quirk is also handled in the dwc3 core code, but until the
xhci-dwc3 driver uses the dwc3 core, the quirk must be handled here
to fix USB support on the Amlogic libretech-cc and libretech-ac board
when a device is only plugged in the OTG port.

Cc: Yuri Frolov <crashing.kernel@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Fixes: dc9cdf859e ("usb: dwc3: Add DWC3 controller driver support")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-10 10:00:53 +02:00
Marek Vasut
769a9cd4bb usb: r8a66597: Add optional DM VBUS regulator support
Add DM regulator support for toggling VBUS, this is useful on boards
which control the VBUS e.g. through GPIO.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Marek Vasut
8b54830154 usb: r8a66597: Checkpatch cleanup
Fix remaining checkpatch complaints in the driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Marek Vasut
a3d65651d9 usb: r8a66597: Add Kconfig entry
Add missing Kconfig entry for the R8A66597 driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Marek Vasut
7f3858f90d usb: r8a66597: Convert to USB DM
Convert the R8A66597 USB driver to DM and add support for DT probing.
Drop support for legacy non-DM and non-DT probing, since there are no
platform using that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Marek Vasut
1eb381af9a usb: r8a66597: Replace R8A66597_BASE0
Replace R8A66597_BASE0 with proper SYSCFG0 accesses, no functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Marek Vasut
81644e01c0 usb: r8a66597: Remove BE support
While the USB controller can work both in LE and BE modes, there is
no user for the BE mode, so drop it. If there ever is a user for it,
it can be easily re-added back.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Marek Vasut
4c9a135715 usb: r8a66597: Replace IO accessors
Replace in{bwl}()/out{bwl}() IO accessors with read{bwl}()/write{bwl}(),
to make the driver compile both on SH and ARM.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Marek Vasut
3ff134b7f1 usb: r8a66597: Make CONFIG_RZA_USB default
No other platforms use this r8a66597 controller but RZ/A1,
make RZ/A1 support the default and drop all the other SoC
support to remove ifdeffery.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Marek Vasut
0b80f21282 usb: r8a66597: Remove CONFIG_SUPERH_ON_CHIP_R8A66597
Remove CONFIG_SUPERH_ON_CHIP_R8A66597 macro, which is unused.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-22 18:23:36 +02:00
Simon Glass
7b51b576d6 env: Move env_get() to env.h
Move env_get() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Heiko Schocher
991e66017c usb, ohci, pci: add DM support for PCI-based OHCI USB controller
add new DM based PCI driver ohci-pci for PCI-based
OHCI USB support.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-08-08 11:35:02 +02:00
Heiko Schocher
f9c7fecbeb usb, ohci: add warning if none on pci found
Signed-off-by: Heiko Schocher <hs@denx.de>
2019-08-08 11:35:02 +02:00
Heiko Schocher
dc4e48d845 usb, ohci-hcd: set OHCI_USE_NPS if DM_PCI
set OHCI_USE_NPS if DM_PCI is enabled.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-08-08 11:35:02 +02:00
Heiko Schocher
a5a7486e62 usb, ohci: fix ohci swap register access
commit 57faca19a8 ("drivers: USB: OHCI: allow compilation for 64-bit targets")
broke ohci support for the mpc85xx based socrates board,
as it removed volatile keyword from ohci_readl/writel.

Fix this so usb works again on socrates board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-08-08 11:35:02 +02:00
Heiko Schocher
b005d7d5f9 usb, ohci-hdc: fix warning 'ohci_pci_ids' defined but not used
var ohci_pci_ids is only used if DM_USB is not enabled.
So define this varaible only if
!CONFIG_IS_ENABLED(DM_USB)

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-08-08 11:35:02 +02:00
Mark Kettenis
c908d46f3a rockchip: xhci: Remove RK3399 support
Remove RK3399 compatible strings as this driver is no longer
used on that SoC.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-19 11:11:09 +08:00
Mark Kettenis
062790f461 usb: xhci-dwc3: Add USB2 PHY configuration
Configure USB2 PHY register based on "phy_type" property and
handle all the quirks that are relevant for Rockchip RK3399 SoCs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-19 11:11:09 +08:00
Mark Kettenis
aaa8d6b149 usb: dwc3-of-simple: Add support for RK3399
Add compatible string for RK3399 and enable it by default on
Rockchip platforms with USB3 support.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-19 11:11:09 +08:00
Marek Vasut
501547cec1 usb: ehci-mx6: Fix bus enumeration for DM case
The EHCI iMX6 driver is only partly converted to DT probing and
still uses a tremendous amount of hard-coded addresses. Worse,
the driver uses hard-coded SoC-model-specific base addresses, which
are derived from values protected by SoC-specific macros, hence the
driver is also compiled for a specific SoC model. Even worse, the
driver depends on specific sequential indexing of the controllers,
from which it derives offsets in the PHY and ANATOP register sets.

However, when the driver is probed from DT, the indexing is not
correct. In fact, each controller has index 0. This patch derives
the index for DT probing case from the controller base addresses,
which is not the way this should be done, however it is the least
intrusive approach, favorable this close to release.

The necessary steps to convert this driver fully to DT probing are
described inside the patch, however this should be done in the next
release and depends on iMX clock driver patches.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Vagrant Cascadian <vagrant@debian.org>
2019-07-05 14:19:40 +02:00
Yinbo Zhu
ad9f2be334 usb: ehci: adopt 32 bit address for CONFIG_PPC
adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.
So  adopt 32 bit address for CONFIG_PPC.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-23 19:53:08 +05:30
Adam Ford
3a90b50a32 usb: ohci: ohci-da8xx: Cleanup Error handling and fix flags
Per feedback from Marek, he suggested better handling and
to enable DM_FLAG_OS_PREPARE, this patch re-orders some of
the error checking, and errors returns the error code right
away and also sets DM_FLAG_OS_PREPARE.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-09 19:52:55 -04:00
Adam Ford
9da5474389 usb: ohci: ohci-da8xx: Enable da850-ohci driver with DM support
This patch reuses some former code for the hawkboard, combines it
with some some similar DM_USB compatible code for the OHCI driver,
and enables the use of the da850's OHCI controller with DM_USB
compatibility.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-05 08:48:50 -04:00
Adam Ford
e0b0af666a usb: ohci: Re-enable commented out delay
There is a delay function that was commented out.  This patch
re-enables it, because it will be needed for da850 ohci support.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-05-03 17:14:49 +02:00
Lukasz Majewski
400b972a7e Convert CONFIG_USB_EHCI_MX5 to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_EHCI_MX5

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25 17:03:25 +02:00
Lukasz Majewski
22988766da USB: DM: Convert i.MX5 ehci code to driver model
This commit converts i.MX5's EHCI USB host driver to driver model (DM_USB).
It is a straightforward conversion (to reuse as much code as possible),
based on ehci-mx6.c code.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25 17:03:25 +02:00
Marcel Ziswiler
20df4b570d configs: move CONFIG_USB_EHCI_VF to Kconfig
Move CONFIG_USB_EHCI_VF to drivers/usb/host/Kconfig and update the one
and only user thereof being colibri_vf.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-13 20:30:09 +02:00
Adam Ford
69535b33bc usb: ehci-mx6: Use common code to extract dr_mode
There exists code in drivers/common/common.c to read the dr_mode
from the device tree.  This patch converts this driver to use that
function to initialize the driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-04-09 13:11:45 +02:00
Ismael Luceno Cortes
89aea23abb usb: host: Print device name when scanning
Drop the counter, it has no meaning other than being the order in which
the interface is found; the name assigned to the USB host controller
interface is a better indicator.

Example of the original output:
> USB0:   USB EHCI 1.10
> scanning bus 0 for devices... 2 USB Device(s) found
>        scanning usb for storage devices... 1 Storage Device(s) found

Patched output:
> Bus usb@ee080100: USB EHCI 1.10
> scanning bus usb@ee080100 for devices... 2 USB Device(s) found
>        scanning usb for storage devices... 1 Storage Device(s) found

Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
2019-04-09 13:11:45 +02:00
Peter Robinson
747fed56d3 Kconfig: tegra: Migrate USB_EHCI_TEGRA
Migrate USB_EHCI_TEGRA from headers to Kconfig

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peter.Chubb@data61.csiro.au
Cc: Lucas Stach <dev@lynxeye.de>
Cc: Stefan Agner <stefan.agner@toradex.com>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-02-20 09:01:44 -07:00
Abel Vesa
921208ebca usb: ehci-mx6: Make regulator DM_REGULATOR dependent
Do the regulator related work only if the build has the DM_REGULATOR.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-02-15 22:01:15 +01:00
Jagan Teki
543049ab59 usb: host: Drop [e-o]hci-sunxi drivers
Now Allwinner platform is all set to use Generic USB
controller drivers, so remove the legacy sunxi drivers.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
29d280c88a sunxi: usb: Switch to Generic host controllers
Onc of key blocker for using USB Generic host controller
drivers in Allwinner are CLK and RESET drivers, now these
available for USB usage.

So switch sunxi USB use EHCI and OHCI Generic controllers.

Enabling USB is wisely a board choise, So Enable USB_OHCI_HCD
where it already have USB_EHCI_HCD

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-01-18 22:19:09 +05:30
Ye Li
8c6cc71b40 usb: xhci-mem: Fix scratchpad array issue
After updating the value of dev_context_ptrs[0], we should flush this
from cache to memory. Otherwise the xhci controller won't use it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-01-09 16:03:56 +01:00
Jean-Jacques Hiblot
4dd76d0f96 usb: host: replace xhci-keystone driver by the generic dwc3 driver
The keystone platforms can use the generic DC3 driver. Removing the
keystone-spcecific xchi driver and add the configuration options to enable
the generic DWC3 driver on all K2 platforms.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Jean-Jacques Hiblot
d648a50c0a dwc3: move phy operation to core.c
Those operations can be used for peripheral operation as well as host
operation.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>

# Conflicts:
#	drivers/usb/dwc3/core.c
#	drivers/usb/host/xhci-dwc3.c
2018-12-07 16:31:45 +01:00
Sven Schwermer
fd09c205fc usb: s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/
This allows to disable the USB driver model in SPL because it checks
the CONFIG_SPL_DM_USB variable for SPL builds. Nothing changes for
regular non-SPL builds.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
2018-11-26 21:19:03 +01:00
Sven Schwermer
ab5817027f usb: Remove CMD_USB dependency for common code
Common USB code is built whenever USB is enabled (in non-SPL builds).
The USB uclass is built whenever (SPL_)DM_USB is enabled. Both need to
be independent from CMD_USB.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
2018-11-26 21:19:03 +01:00
Sven Schwermer
41a25f4604 usb: Introduce CONFIG_SPL_DM_USB
This allows building the SPL without driver model for USB. Since
CONFIG_SPL_DM_USB is enabled if and only if CONFIG_DM_USB was enabled
before, this patch does not change the build behaviour.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
2018-11-26 21:19:03 +01:00
Chris Packham
4eaf7f525a fsl/usb: Workaround for USB erratum-A005275
Workaround makes FS as default mode on all affected socs.

Add support to check erratum-A005275 validity for an soc. This info is
required to determine whether a given soc is affected by this erratum.
Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
to enable workaround for the errata

Force FS mode as default by:
        - making EPS as FS
        - setting PFSC bit to disable HS chirping

This workaround can be disabled by mentioning "no_erratum_a005275" in
hwconfig string

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-10-29 13:13:05 -07:00
Ramon Fried
246670417c usb: ehci-msm: Add init_after_reset for CI_UDC
MSM uses the chipidea controller IP, however it requires
to reinit the phy after controller reset. in EHCI mode there's a
dedicated callback for it.
In device mode however there's no such callback.
Add implementaion of ci_init_after_reset() to implement the above
requirement in case CI_UDC driver is used.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:37 -04:00
Ramon Fried
0683b27ae3 ehci: msm: use init_type in probe
Change ehci_usb_probe() function to initialize the
USB according to the init_type provided.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
0ac0b6eb6a ehci: msm: switch to generic PHY uclass
All the underlying USB PHY was handled in the ehci driver.
Use the generic phy API instead.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
2df49234c6 ehci: msm: Add missing platdata
platdata_auto_alloc_size was not initialized in structure.
Caused null pointer dereference when configuring device as
gadget.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Ramon Fried
cd8c3aec7f ehci: Replace board_prepare_usb with board_usb_init
Use standard board_usb_init() instead of the specific board_prepare_usb.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Patrice Chotard
5c349e179d usb: ehci-generic: Add vbus-supply regulator support
Add vbus-supply regulator support.
On some board vbus is not controlled by the phy but by
an external regulator.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-09-15 03:17:43 +02:00
Ley Foon Tan
88c34b8da6 usb: dwc2: Add reset ctrl to driver
Add code to reset all reset signals as in usb DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-29 03:10:30 +02:00
Marek Vasut
1335e7745f usb: ehci: Add PHY support to ehci-pci
Add support for operating a PHY attached to ehci-pci. There are
systems where the EHCI controller is internally wired to a PCI
bus and has a PHY connected to it as well, ie. the R-Car Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-08-28 11:00:19 +02:00
Marek Vasut
b43cdf9b3f usb: ehci: Make the PHY handling generic
Pull out the EHCI PHY functions into the ehci-hcd.c to let other
EHCI drivers use them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-08-28 11:00:18 +02:00
Andre Przywara
0bc846a769 sunxi: A64: OHCI: prevent turning off shared USB clock
On the A64 the clock for the first USB controller is actually the parent
of the clock for the second controller, so turning them off in that order
makes the system hang.
Fix this by only turning off *both* clocks when the *last* OHCI controller
is brought down. This covers the case when only one controller is used.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-07-05 11:25:50 +02:00
Emmanuel Vadot
ff5d5cc233 usb: dwc2: Add brcm,bcm2708-usb compatible
When using CONFIG_OF_BOARD on rpi to use the dtb provided by the
RaspberryPi Fundation, the compatible string isn't the same, resulting
in not-functional usb from u-boot.

Signed-off-by: Oleksandr Tymoshenko <gonzo@FreeBSD.org>
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
2018-07-05 11:25:49 +02:00
Jagan Teki
9c22aec410 usb: sunxi: Use proper reg_mask for clock gate, reset
Masking clock gate, reset register bits based on the
probed controller is proper only due to the assumption
that masking should start with 0 even thought the controller
has separate PHY or shared between OTG.

unfortunately these are fixed due to lack of separate
clock, reset drivers.

Say for example EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG)
so we need to start reg_mask 0 - 2.

This patch calculated the mask, based on the register base
so that we can get the proper bits to set with respect to
probed controller.

We even do this masking by using PHY index specifier from dt,
but dev_read_addr_size is failing for 64-bit boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-06-29 10:52:18 +02:00
Zeng Tao
11080bf6c7 usb: ohci: change the NUM_EDs from 8 to 32
For ohci, the maximam supported endpoint number is 32(in and out), and
now we have used (usb_pipeendpoint(pipe) << 1) to index the specified
endpoint descritor, usb_pipeendpoint(pipe) can reach 0xf, so we need
change the NUM_EDs from 8 to 32.

Signed-off-by: Zeng Tao <prime.zeng@hisilicon.com>
2018-06-29 10:52:12 +02:00
Vasily Khoruzhick
ebbc23a049 usb: sunxi: ohci: make ohci_t the first member in private data
ohci-hcd casts priv_data pointer to (ohci_t *), thus it must be
the first member in private data struct.

Fixes 831cc98b1 ("usb: sunxi: Simplify ccm reg base code")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-29 10:52:07 +02:00
Tom Rini
a715415bb5 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-06-16 00:07:37 -04:00
Vasily Khoruzhick
b9f34757db usb: sunxi: access ahb_reset0_cfg in CCM using its offset
struct sunxi_ccm_reg doesn't have ahb_reset0_cfg on sun4i and sun5i,
thus compilation fails with:

drivers/usb/host/ohci-sunxi.c:96:26: error: 'struct sunxi_ccm_reg' has
no member named 'ahb_reset0_cfg'

Access this reg using its offset to fix this issue.

Fixes commit 1ed9c1118 ("usb: sunxi: ehci: get rid of ifdefs")
and commit 56830cee3 ("usb: sunxi: ohci: get rid of ifdefs")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-14 12:57:19 +02:00
Vasily Khoruzhick
11bb62768d usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
clock when OHCI1 is in use.

Fixes commit dd3228170a ("usb: sunxi: Switch to use generic-phy")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00