The Juno reference design typically plugs the root FS
on a USB stick. We need to wait a bit for the root to
appear so tell this on the default command line.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ARM Trusted Firmware or other security solutions are
eating memory from the top of the physical SDRAM1 space,
moving backward from 0xffffffff, currently occupying e.g.
0xfe000000-0xffffffff with Trusted Firmware.
This solution to reserving memory for secure world is not
optimal, so we need to think of how the secure world and
earlier boot stages should communicate to U-Boot what
memory they are eating up. For now let's just put 16MB
aside.
Also enable the memory test command and define start and
end of the test range so we can check that we actually have
all that memory available and working.
Suggested-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Testing on the ARM Versatile Express Juno board showed intermittent CFI
flash detection problems.
Debug output in exception cases showed that the NOR flash was returning
incorrect values to a query command:
fwc addr 0000000008000000 cmd f0 f0f0f0f0 32bit x 8 bit
fwc addr 0000000008000000 cmd ff ffffffff 32bit x 8 bit
fwc addr 0000000008000154 cmd 98 98989898 32bit x 8 bit
is= cmd 51(Q) addr 0000000008000040 is= 00800051 51515151
fwc addr 0000000008001554 cmd 98 98989898 32bit x 8 bit
is= cmd 51(Q) addr 0000000008000040 is= 00800051 51515151
fwc addr 0000000008000000 cmd f0 00f000f0 32bit x 16 bit
fwc addr 0000000008000000 cmd ff 00ff00ff 32bit x 16 bit
fwc addr 0000000008000154 cmd 98 00980098 32bit x 16 bit
is= cmd 51(Q) addr 0000000008000040 is= 00800051 00510051
fwc addr 0000000008001554 cmd 98 00980098 32bit x 16 bit
is= cmd 51(Q) addr 0000000008000040 is= 00800051 00510051
Debugging showed that the problem could be solved by preventing u-boot
from scanning different flash widths by specifying
CONFIG_SYS_FLASH_CFI_WIDTH so that only using the 'correct' width was
used.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Commit d8bafe1310
"ARMv8: enable DM in vexpress64 board" only enabled DM
for the simulated vexpress64 board (FVP) with the
hardcoded clock value for the simulated board, causing
a console regression on the Juno board which was using
a different clock setting.
Fix this by enabling DM for all vexpress64 boards,
defining the clock frequency per-board, deleting the
static array of PL01x ports from the config file and
relying solely on the port defined in the boardfile
using platform data.
Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This modifies the vexpress64 Juno configuration so that
it will by default load and boot a kernel and a device tree
from the images stored in the NOR flash. When we are
at it, also define the proper command line for the Juno and
indicate that the USB stick (/dev/sda1) is the default
root file system.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This variant that is neither FVP / Base Model or Juno Versatile
Express 64bit is confusing. Get rid of it unless someone can
point out what machine that really is. Seems to be an evolutional
artifact in the config base.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This removes the kludgy late board init from the FVP simulator
version of Versatile Express 64bit (ARMv8), and replace it with
a default boot command using the new smhload command to load
the files using semihosting. Tested on the Foundation Model.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
While the Freescale ARMv8 board LS2085A will enter U-Boot both
on a master and a secondary (slave) CPU, this is not the common
behaviour on ARMv8 platforms. The norm is that U-Boot is entered
from the master CPU only, while the other CPUs are kept in
WFI (wait for interrupt) state.
The code determining which CPU we are running on is using the
MPIDR register, but the definition of that register varies with
platform to some extent, and handling multi-cluster platforms
(such as the Juno) will become cumbersome. It is better to only
enable the multiple entry code on machines that actually need
it and disable it by default.
Make the single entry default and add a special
ARMV8_MULTIENTRY KConfig option to be used by the
platforms that need multientry and set it for the LS2085A.
Delete all use of the CPU_RELEASE_ADDR from the Vexpress64
boards as it is just totally unused and misleading, and
make it conditional in the generic start.S code.
This makes the Juno platform start U-Boot properly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This configures the Juno board to enable ethernet using the
SMSC9118 ethernet controller found in the board. Tested by
TFTP-booting a kernel over ethernet.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Juno Development Platform is a physical Versatile Express
device with some differences from the emulated semihosting
models. The main difference is that the system is split in
a SoC and an FPGA where the SoC hosts the serial ports at
totally different adresses.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Versatile Express ARMv8 semihosted FVP platform is still
using the legacy CONFIG_SYS_EXTRA_OPTIONS method to configure
some compile-time flags. Get rid of this and create a Kconfig
entry for the FVP model, and a selectable bool for the
semihosting library.
The FVP subboard is now modeled as a target choice so we can
eventually choose between different ARMv8 versatile express
boards (FVP, base model, Juno...) this way. All dependent
symbols are updated to reflect this.
The 64bit Versatile Express board symbols are renamed
VEXPRESS64 so we have some chance to see what is actually
going on. Tested on the FVP fast model.
Acked-by: Steve Rae <srae@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The few Versatile Express ARMv8 platforms we have may just as
well be switched to generic board from the beginning.
Tested on the ARM foundation model and the in progress support
for the ARMv8 Juno board.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Steve Rae <srae@broadcom.com>
This option specifies the default Device Tree used for the run-time
configuration of U-Boot.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Michal Simek <michal.simek@xilinx.com>
- Drop DEBUG
- Drop defines we can use the default of.
- Provide a larger malloc pool.
- Correct default locations for kernel / initrd / device tree
Signed-off-by: Tom Rini <trini@ti.com>
The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF
images and u-boot, and does this for virtual platforms by using
semihosting. This commit extends this idea by allowing u-boot to also
use semihosting to load the kernel/ramdisk/dtb. This eliminates the need
for a bootwrapper and produces a more realistic boot sequence with
virtual models.
Though the semihosting code is quite generic, support for armv7 in
fastmodel is less useful due to the wide range of available silicon
and the lack of a free armv7 fastmodel, so this change contains an
untested armv7 placeholder for the service trap opcode.
Please refer to doc/README.semihosting for a more detailed description
of semihosting and how it is used with the armv8 virtual platforms.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Cc: trini@ti.com
Cc: fenghua@phytium.com.cn
Cc: bhupesh.sharma@freescale.com
This patch add gicv3 support to uboot armv8 platform.
Changes for v2:
- rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
- move smp_kick_all_cpus() from gic.S to start.S, it would be
implementation dependent.
- Each core initialize it's own ReDistributor instead of master
initializeing all ReDistributors. This is advised by arnab.basu
<arnab.basu@freescale.com>.
Signed-off-by: David Feng <fenghua@phytium.com.cn>
This patch enables ethernet support in ARMv8 foundation model. The ARMv8
foundation model supports a SMSC91C111 integrated MAC and PHY module
which is present at base address 0x01A000000.
The previous implementation had enabled SMSC9115 ethernet controller
which is not present on the ARMv8 foundation model.
Tested on ARMv8 foundation model v1 and v2 by running ping/tftp
between the foundation model and the host PC via a bridged network.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
