Commit graph

321 commits

Author SHA1 Message Date
Michal Simek
1e3e68f109 arm64: zynqmp: Check return value from calloc
calloc() can fail and return NULL. The patch is checking return value
and return in case of error.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:05 +02:00
Michal Simek
0ecd14e636 arm: zynq: Add missing watchdog header
Add missing header detected by sparse.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:06:31 +02:00
Michal Simek
2882b39d56 arm64: zynqmp: Setup the first boot_target at run time
Detect mmc alias at run time for setting up proper boot_targets sequence.
The first target has to correspond with boot mode.

The purpose of this patch is to get rid of CONFIG_ZYNQ_SDHCI0/1
parameters in full U-Boot.
Unfortunately this patch can't remove it because there is missing
mmc implementation for SPL_DM_SEQ_ALIAS.

Also xilinx_zynqmp.h only setup boot commands for mmc0 and mmc1.
It means using aliases with higher number won't work. But switching
between mmc0 and mmc1 should work properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-31 13:50:39 +02:00
Michal Simek
d348beaa63 arm64: zynqmp: Show reset reason
Read reset reason reg and show it in log and also save it as variable.
Clearing reset reason when it is read to show only one status

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
b4af64fdfd arm64: zynqmp: Use DWC3 generic driver and DM_USB
Remove harcoded XHCI lists and detect mode, speed based on DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Serial-changes: 2
- Remove also XHCI macros from hardware.h
- Remove additional new line in zcu106
2018-05-18 13:23:15 +02:00
Tom Rini
57a72d0560 SPDX: Correct SPDX tags from recent xilinx merge
Correct the SPDX tag format.

Fixes: 3b52847a45 ("Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-11 14:54:57 -04:00
Tom Rini
3b52847a45 Xilinx changes for v2018.07
microblaze:
 - Align defconfig
 
 zynq:
 - Rework fpga initialization and cpuinfo handling
 
 zynqmp:
 - Add ZynqMP R5 support
 - Wire and enable watchdog on zcu100-revC
 - Setup MMU map for DDR at run time
 - Show board info based on DT and cleanup IDENT_STRING
 
 zynqmp tools:
 - Add read partition support
 - Add initial support for Xilinx bif format for boot.bin generation
 
 mmc:
 - Fix get_timer usage on 64bit cpus
 - Add support for SD3.0 UHS mode
 
 nand-zynq:
 - Add support for 16bit buswidth
 - Use address cycles from onfi params
 
 scsi:
 - convert ceva sata to UCLASS_AHCI
 
 timer:
 - Add Cadence TTC for ZynqMP r5
 
 watchdog:
 - Minor cadence driver cleanup
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlr1ldMACgkQykllyylKDCHioACghoJw6+NqsZXl8zGWRP38yZ5K
 mvgAnihfOQq125mpKPZmcc5yt6wVwYIU
 =8ji9
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07

microblaze:
- Align defconfig

zynq:
- Rework fpga initialization and cpuinfo handling

zynqmp:
- Add ZynqMP R5 support
- Wire and enable watchdog on zcu100-revC
- Setup MMU map for DDR at run time
- Show board info based on DT and cleanup IDENT_STRING

zynqmp tools:
- Add read partition support
- Add initial support for Xilinx bif format for boot.bin generation

mmc:
- Fix get_timer usage on 64bit cpus
- Add support for SD3.0 UHS mode

nand-zynq:
- Add support for 16bit buswidth
- Use address cycles from onfi params

scsi:
- convert ceva sata to UCLASS_AHCI

timer:
- Add Cadence TTC for ZynqMP r5

watchdog:
- Minor cadence driver cleanup
2018-05-11 11:45:28 -04:00
Siva Durga Prasad Paladugu
d1f4e39d58 mmc: zynq_sdhci: Add support for SD3.0
This patch adds support of SD3.0 for ZynqMP.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 11:13:51 +02:00
Michal Simek
1d6c54ecb3 arm: zynqmp: Add ZynqMP minimal R5 support
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot.
This patch is adding minimal support to get U-Boot boot.
U-Boot on R5 runs out of DDR with default configuration that's why
DDR needs to be partitioned if there is something else running on arm64.
Console is done via Cadence uart driver and the first Cadence Triple
Timer Counter is used for time.

This configuration with uart1 was tested on zcu100-revC.

U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200)

Model: Xilinx ZynqMP R5
DRAM:  512 MiB
WARNING: Caches not enabled
MMC:
In:    serial@ff010000
Out:   serial@ff010000
Err:   serial@ff010000
Net:   Net Initialization Skipped
No ethernet found.
ZynqMP r5>

There are two ways how to run this on ZynqMP.
1. Run from ZynqMP arm64
tftpb 20000000 u-boot-r5.elf
setenv autostart no && bootelf -p 20000000
cpu 4 disable && cpu 4 release 10000000 lockstep
or
cpu 4 disable && cpu 4 release 10000000 split

2. Load via jtag when directly to R5

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:23 +02:00
Michal Simek
0478b0b9b6 arm64: zynqmp: Simplify boot_target variable composition
Call calloc for space allocation only at one location and include if/else
to sprintf. This will simplify run time device adding based on id aliases.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11 09:23:43 +02:00
Nitin Jain
0678941ae5 arm64: zynqmp: Setup MMU map for DDR at run time
This patch fills the MMU map for DDR at run time based on information read
from Device Tree or automatically detected from static configuration.

The patch is needed because for systems which has for example 1GB of memory
but MMU map is 2GB there could be spurious accesses which was seen in past
when mapping is not fitting with actual memory installed.

Signed-off-by: Nitin Jain <nitin.jain@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
4490e013ee arm64: zynqmp: Wire watchdog internals
Enable watchdog in full U-Boot.

Similar changes were done by:
"arm: zynq: Wire watchdog internals"
(sha1: e6cc3b25d7)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
e00656b2a9 arm64: zynqmp: Reset FPD Watchdog on zcu100
Low level configuration didn't reset FPD Watchdog that's why accessing
it caused u-boot hang.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Siva Durga Prasad Paladugu
04ab29ab25 arm64: zynqmp: Add new defconfig for zc1275 revB
This patch enables support zc1275 revB board. It has
SD added compared to revA. The same configuration will
work for RevC boards aswell.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
0b4b82ad14 arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO
Now that showing silicon version is part of the CPU
info display, let's remove checkboard().

Note that the generic show_board_info() will still
show the DT 'model' property. For instance:

U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)

CPU:   Zynq 7z045
Silicon: v1.0
Model: Zynq ZC706 Development Board
I2C:   ready

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>,
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

mini configuration doesn't need to show this information.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
4aba5fb857 arm: zynq: Rework FPGA initialization
This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Tom Rini
f739fcd831 SPDX: Convert a few files that were missed before
As part of the main conversion a few files were missed.  These files had
additional whitespace after the '*' and before the SPDX tag and my
previous regex was too strict.  This time I did a grep for all SPDX tags
and then filtered out anything that matched the correct styles.

Fixes: 83d290c56f ("SPDX: Convert all of our single license tags to Linux Kernel style")
Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-10 20:38:35 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Michal Simek
61dc92a29d arm: zynq: Wire automatic ddr detection for Zynq and ZynqMP case
When static memory configuration is used U-Boot has capability to detect
memory size in setup range. Enable this feature for static
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-23 13:15:32 +02:00
Michal Simek
cf0bcd7d02 arm64: zynqmp: Add support for Xilinx zcu106-revA
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
f7c8e491e9 arm64: zynqmp: Add support for zcu104 customer board
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with
some differences.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
85231c087e arm64: zynqmp: Add support for zc12xx boards
Add support for zc12xx boards. All of them are internal boards for
silicon validation and share very similar base platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
10aaa3584b arm64: zynqmp: Add support for zc1751 dc3
zc1751 is based board with dc3 extenstion card which is used for silicon
validation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
6d0340931e arm64: zynqmp: Add support for zcu100 aka Ultra96 board
Add support for Xilinx zcu100.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
8314bfe5c7 arm64: zynqmp: Add low level initialization for zc1751
Add psu init for zc1751 dc cards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
979707baa9 arm64: zynqmp: Add low level initialization for zcu102-revA
Add psu init for zcu102-revA.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
8ae3d0b50c MAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragments
Fix my fragments to list all files in the repo.

Also fix path to for Xilinx Zynq SoC (mach-zynq)
It should be the part of
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f24036)

And cover dts files in board MAINTAINERS files.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:36:15 +01:00
Siva Durga Prasad Paladugu
c436bf92f6 arm64: zynqmp: Add support for verifying secure images
This patch adds new command "zynqmp" to handle zynqmp
specific commands like "zynqmp secure". This secure command is
used for verifying zynqmp specific secure images. The secure
image can either be authenticated or encrypted or both encrypted
and authenticated. The secure image is prepared using bootgen
and will be in xilinx specific BOOT.BIN format. The optional
key can be used for decryption of encrypted image if user
key was specified while creation BOOT.BIN.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:36:15 +01:00
Siva Durga Prasad Paladugu
83bf2ff03d arm64: zynqmp: Correct EG/EV part detection logic
The vcu disable bit in efuse ipdisable register is valid only
if PL powered up so, consider PL powerup status for determing
EG/EV part. If PL is not powered up, ignore EG/EV part of string.
The PL powerup status will be filled by pmufw based on PL PROGB
status in the 9th bit of version field.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:44 +01:00
Michal Simek
e6cc3b25d7 arm: zynq: Wire watchdog internals
Watchdog is only enabled in full u-boot. Adoption for SPL should be also
done because that's the right place where watchdog should be enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Nitin Jain
51916864b3 arm64: zynqmp: Add support to load an app at EL1
This patch is adding support to switch to EL1 while loading an EL1
application with u-boot running at EL above EL1 in aarch64 mode.

Signed-off-by: Nitin Jain <nitinj@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:42 +01:00
Michal Simek
3e1b61de58 arm: zynq: Update years in copyright to reflect latest changes
Updating year in zynq files. Also add missing Copyright to board.c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:32 +01:00
Michal Simek
6c45abe709 arm64: zynqmp: Add psu_init for zcu102-rev1.0
Add low level initialization for zcu102-rev1.0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:24 +01:00
Michal Simek
2ad341ed7d arm64: zynqmp: Prepare psu_init rework
Move generic functions to common location psu_spl_init.c. Function
declarations are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:18 +01:00
Michal Simek
88f05a926d arm64: zynqmp: Call psu_init() only when ZYNQMP_PSU_INIT_ENABLED
Remove SPL_BUILD dependency from zynqmp.c and move it to header file.
Use only one symbol for including psu_init.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:12 +01:00
Michal Simek
9753c4f886 arm64: zynqmp: Remove unused empty functions
Remove functions which are no longer renerated by PCW.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:08 +01:00
Michal Simek
f32e79f159 arm64: zynqmp: Propagate error value from psu_init()
psu_init() returns int which wasn't declared and checked.
The patch is fixing function declarations and code to handle return
values properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:59 +01:00
Siva Durga Prasad Paladugu
01c42d3d74 xilinx: zynqmp: Use strlen only if env_get doesn't return null
Add check if boot_targets exists in environment and then
generate new_targets env accordingly. Performing strlen on
null address causes it to fail with exception if isolation
is enabled with DDR address zero as secure. It works with out
isolation enabled as zero is valid address but it may lead to
junk values in boot_targets.
This patch fixes the issue by checking return value of env_get
so that it generate boot_targets properly.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:35 +01:00
Michal Simek
77cbd9536e arm: zynq: Add support for zc770-xm011-x16 configuration
zc770-xm011 is x8 width configuration. This FMC card has also x16
variant which requires different ps7_init configuration. This patch adds
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:25 +01:00
Michal Simek
b9b2724111 arm: zynq: Add zc770-xm013 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
7f6a0d4688 arm: zynq: Add zc770-xm012 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
7ad2a5b8fb arm: zynq: Add zc770-xm011 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
ecd69c3e36 arm: zynq: Add zc770-xm010 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Siva Durga Prasad Paladugu
ec60a279ec arm64: zynqmp: Access timestamp_ref_ctrl register only if running in el3
Access the timestamp ref ctrl register only if runinng
at el3 level otherwise just return. This change fixes
the issue when CRL APB is marked as secure and accessing
when not in el3 causes exception.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-18 09:32:07 +01:00
Michal Simek
0fc9d84872 arm64: zynqmp: Add support for zynqmp automotive silicons
Remove silicon prefix. Automotive grade devices are using xazu instead
of xczu prefix.

The patch "fpga: xilinx: Check for substring in device ID validation"
(sha1: f72132673a)
enables this functionality for zynq devices that only substrings are
checked.
Unfortunately there is no way how to detect device grade that's why
this change is reasonable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14 20:08:45 +01:00
Michal Simek
07656ba5f7 arm64: zynqmp: Setup modeboot variable based on bootmode
Setup bootmode variable based on bootmode selection.
This is helping with setting up boot method.
Also setup sdbootdevice.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14 20:08:22 +01:00
Siva Durga Prasad Paladugu
d1db89f47d arm64: zynqmp: Read boot mode register using zynqmp_mmio_read
Dont read boot mode register directly read it using
zynqmp_mmio_read().

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14 20:08:22 +01:00
Michal Simek
40df796133 arm: zynq: Add ps7_init for cc108
After some generic cleanup adding ps7_init* to repository
is not big pain now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29 08:02:40 +01:00
Michal Simek
29fb570378 arm: zynq: Show information about silicon version
Show information about silicon in bootlog.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29 08:02:40 +01:00
Michal Simek
460b05d96d arm: zynq: Convert all board to use arch ps7_init code
Use generic implementation. It will also reduce config data size for
converted boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29 08:02:39 +01:00