Commit graph

463 commits

Author SHA1 Message Date
Simon Glass
6e780c7a7b ns16550: Improve debug UART so it can work with 32-bit access
Since Rockchip requires 32-bit serial access, add this to the driver.
Refactor a little to make this easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:28 -06:00
Siva Durga Prasad Paladugu
e05412f5ec arm: dcc: Add uart dcc support for armv8
Added UART DCC support for armv8

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-07-07 11:39:39 +02:00
Simon Glass
af28224546 sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig
Move this over to Kconfig and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
e9fc058314 dm: serial: Don't support CONFIG_CONS_INDEX with device tree
This feature should be deprecated for new boards, and significantly adds
to SPL code size. Drop it. Instead, we can use stdout-path in the /chosen
node.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
9091400859 dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model
This option is used by some boards, so support it with driver model. This
is really ugly - we should rewrite this driver once all users are moved to
driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Masahiro Yamada
b6ef3a3f04 ARM: UniPhier: update the vendor name of UniPhier in Kconfig
The business for UniPhier Soc family has been transferred from
Panasonic Corporation to Socionext Inc.

Update the SoC select menu in Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:55:30 +09:00
Masahiro Yamada
f6e7f07c17 ARM: UniPhier: replace <asm/io.h> with <linux/io.h>
In the Linux coding style, it is recommended to include <linux/io.h>
rather than <asm/io.h>.  Follow this trend.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-05-31 02:53:56 +09:00
Tom Rini
445614cc2f Revert "Revert "stm32f4: fix serial output""
Due to a misunderstanding, in 698a12b we reverted changes that we in
fact wanted to keep.  So lets fix that mistake and bring the code back
to how it should have been.

This reverts commit 698a12bef9.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-05-27 13:24:10 -04:00
Tom Rini
698a12bef9 Revert "stm32f4: fix serial output"
As per the author, we don't need this patch really since the other patch
"stm32f4: fix serial output" superseded it.

This reverts commit 85e5f5b7a7.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-05-10 16:01:48 -04:00
Vikas Manocha
6975172930 serial: fdt: add device tree support for pl01x
This patch adds device tree support for arm pl010/pl011 driver.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-05-10 09:59:37 -04:00
kunhuahuang
60570df19c stm32f4: add serial print port
Add the stm32F4 board's serial ports support.
User can use it easily.
The user only need to edit the number of the usart.
The patch also fix the serial print out.

Last, this version of patch fix the first patch checkpatch.pl error.
Thanks to Kamil Lulko.

Signed-off-by: kunhuahuang <huangkunhua@gmail.com>
2015-05-10 07:29:38 -04:00
kunhuahuang
85e5f5b7a7 stm32f4: fix serial output
This patch fix the serial output.
The source is from Kamil Lulko's "stm32f429-discovery board support"

Thanks, Varcain. I learned a lot.

Signed-off-by: kunhuahuang <huangkunhua@gmail.com>
2015-05-10 07:29:38 -04:00
Albert ARIBAUD
b939689c7b Merge branch 'u-boot/master' into 'u-boot-arm/master' 2015-05-05 10:09:06 +02:00
Tom Rini
ace97d2617 Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze 2015-04-29 06:46:33 -04:00
Michal Simek
04bc5c939a serial: zynq: Add support for slow emulation platform
On slow platforms not all baudrate setting is valid.
Check it directly in the driver and setup maximum possible
frequency.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-29 11:19:01 +02:00
Axel Lin
4f60166c90 serial: ns16550: Remove hard-coded baud_divisor setting
This was accidentally added by commit dd0b0122ba
"serial: ns16550: Add an option to specify the debug UART register shift".
Remove it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-04-28 16:49:03 -06:00
Tom Rini
5f757cdcc6 Merge branch 'master' of git://git.denx.de/u-boot-dm 2015-04-23 14:56:10 -04:00
Simon Glass
66312374dc dm: Add a panic_str() function to reduce code size
The printf() in panic() adds about 1.5KB of code size to SPL when compiled
with Thumb-2. Provide a smaller version that does not support printf()-style
arguments and use it in two commonly compiled places.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-23 09:05:52 -06:00
Simon Glass
ab9fd2e83a serial: ns16550: Remove unnecessary init on UART setup
It is not necessary to write a zero baud rate to the device, and for some
chips this will cause problems. Drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:04:18 -06:00
Simon Glass
363e6da103 dm: ns16550: Support non-byte register spacing with driver model
Allow this driver to support boards where the register shift is not 0.
This fixes some compiler warnings which appear in that case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:03:48 -06:00
Simon Glass
dd0b0122ba serial: ns16550: Add an option to specify the debug UART register shift
This UART permits different register spacing. To support the debug UART on
devices which have a spacing other than 1 byte, allow the shift value to
be specified.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-22 20:03:41 -06:00
rev13@wp.pl
ab3f0c7dae stm32f4: Add serial driver
Signed-off-by: Kamil Lulko <rev13@wp.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-22 12:14:55 -04:00
Linus Walleij
d77447fdb1 serial: pl01x: fix PL010 regression
commit aed2fbef5e
"dm: serial: Tidy up the pl01x driver"
caused a regression on (real hardware) PL010 by omitting
to update the line control register when switching baudrate.

Fix this by inlining the missing write to the baud control
register.

Also renaming the set_line_control() function to
pl011_set_line_control() since this function is clearly
PL011-specific, and it won't suffice to call that to
set up line control.

Tested on the Integrator/AP hardware.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-21 10:05:42 -04:00
Joe Hershberger
0eb25b6196 common: Make sure arch-specific map_sysmem() is defined
In the case where the arch defines a custom map_sysmem(), make sure that
including just mapmem.h is sufficient to have these functions as they
are when the arch does not override it.

Also split the non-arch specific functions out of common.h

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-04-18 11:11:09 -06:00
Simon Glass
e564f054af dm: core: Add dev_get_uclass_priv() to access uclass private data
Add a convenience function to access the private data that a uclass stores
for each of its devices. Convert over most existing uses for consistency
and to provide an example for others.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-04-16 19:27:42 -06:00
Alexander Merkle
fd602c5635 fix ARM DCC support for ARMv7 based cores (e.g. CortexA)
Signed-off-by: Alexander Merkle <alexander.merkle@lauterbach.com>
2015-04-16 11:31:00 +02:00
Alexey Brodkin
01496c4fac serial-arc: switch to DM
Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
36d68668e3 serial/serial_arc: set registers address during compilation
Being global variable with 0 value it falls into .bss area which we may
only use after relocation to RAM. And right afetr relocation we zero
.bss - effectively cleaing register address set for early console.

Now with pre-set value "regs" variable is no longer in .bss and this way
safely survives relocation.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:49 +03:00
Masahiro Yamada
891ee87e2b dm: serial: remove bogus include <ns16550.h>
Serial-uclass should be generically implemented without depending
a particular hardware.  Fortunately, nothing in include/ns16550.h is
referenced from drivers/serial/serial-uclass.c, so remove this bogus
include.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-03-25 16:33:27 -06:00
Masahiro Yamada
6462cdedc2 ARM: UniPhier: adjust device trees for business transfer
Panasonic's System LSI products, UniPhier SoC family, have been
transferred to Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-15 13:37:00 +09:00
Axel Lin
20379c115e serial: ns16550: Fix build error due to a typo
Fix trivial typo.

Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
2015-03-02 08:48:00 -05:00
Tom Rini
1da7ce4155 Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2015-03-01 21:07:53 -05:00
Tom Rini
00956eb5f3 Merge branch 'master' of git://git.denx.de/u-boot-sh 2015-03-01 21:06:33 -05:00
Masahiro Yamada
099cf77c15 serial: UniPhier: move LCR register setting to probe function
We do not have to set the LCR register every time we change the
baud-rate.  We just need to set it up once in the probe function.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01 00:02:26 +09:00
Masahiro Yamada
d0c47b3ef7 serial: UniPhier: use 32 bit register access
For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11)
is not working correctly.  As a side effect, it also modifies MCR
register (offset = 0x10) and results in unexpected behavior.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01 00:02:23 +09:00
Vladimir Barinov
2cbb17c0e9 serial: sh: fix internal clock source on SCIF
The formula to calculate SCIF BRR for R-Car H2/M2/E2 SoCs is as follows:

BRR = pclk / (64 * 2^(2n-1) * baudrate) - 1,
the prescaler is 0 due to SCSMR settings, hence n=0

Also SCSCR must be set to use internal or external clock source.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2015-02-25 13:53:37 +09:00
Nobuhiro Iwamatsu
89f99a62c1 serial: sh: Remove invalid UTF-8 character
serial_sh.c contains invalid UTF-8 character.
This deletes the character.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2015-02-25 13:53:28 +09:00
Masahiro Yamada
a2f39e830e ARM: remove cm4008 and cm41xx board support
These are still non-generic boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Greg Ungerer <greg.ungerer@opengear.com>
Acked-by: Marek Vasut <marex@denx.de>
2015-02-24 17:07:11 -05:00
Simon Glass
21d004368f serial: ns16550: Support debug UART
Add debug UART functions to permit ns16550 to provide an early debug UART.
Try to avoid using the stack so that this can be called from assembler before
a stack is set up (at least on ARM and PowerPC).

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-19 06:20:28 -07:00
Simon Glass
765716744f serial: ns16550: Add access functions that don't need platdata
For the debug UART we need to be able to provide any parameters before
driver model is set up. Add parameters to the low-level access functions
to make this possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-19 06:20:28 -07:00
Simon Glass
2f964aa7b1 serial: Support an early UART for debugging
This came up in a discussion on the mailing list here:

https://patchwork.ozlabs.org/patch/384613/

My concerns at the time were:
- it doesn't need to be written in assembler
- it doesn't need to be ARM-specific

This patch provides a possible alternative. It works by allowing any serial
driver to export one init function and provide a putc() function. These
can be used to output debug data before the real serial driver is available.

This implementation does not depend on driver model, and it is possible for
it to operate without a stack on some architectures (e.g. PowerPC, ARM). It
provides the same features as the ARM-specific debug.S but with more UART
and architecture support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-19 06:20:25 -07:00
Michal Simek
484fdf5ba0 dm: Add support for all targets which requires MANUAL_RELOC
Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA
relocation (mostly only GOT) where functions aray are not
updated. This patch is fixing function pointers for DM core
and serial-uclass to ensure that relocated functions are called.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-12 15:17:29 -07:00
Nobuhiro Iwamatsu
59088e4a76 dm: sh: serial: Add support driver model
This adds driver model support with this driver. This was tested by Koelsch
board and Gose board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-12 15:17:17 -07:00
Simon Glass
f94a1bed07 dm: Expand and complete Kconfig in drivers/
Expand the help messages for each driver. Add missing Kconfig for I2C,
SPI flash and thermal.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-02-12 10:35:33 -07:00
Simon Glass
fad486ce51 powerpc: Add serial driver for driver model
This uses the ns16550 driver but sets up the clock at run-time. It does
not seem to be available in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-12 10:35:31 -07:00
Simon Glass
9cc36a2b89 dm: core: Add a flag to control sequence numbering
At present we try to use the 'reg' property and device tree aliases to give
devices a sequence number. The 'reg' property is often actually a memory
address, so the sequence numbers thus-obtained are not useful. It would be
better if the devices were just sequentially numbered in that case. In fact
neither I2C nor SPI use this feature, so drop it.

Some devices need us to look up an alias to number them within the uclass.
Add a flag to control this, so it is not done unless it is needed.

Adjust the tests to test this new behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-29 17:09:55 -07:00
Tom Rini
306df2c824 Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze 2015-01-26 06:42:15 -05:00
Michal Simek
a2425e6207 serial: Extend structure comments with register offset
This information help with debugging issues with uart.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-26 08:55:59 +01:00
Michal Simek
12c9e7d622 serial: zynq: Use global baudrate instead of hardcoded one
This change enables to change baudrate on command line.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-26 08:55:58 +01:00
Bin Meng
1eb47efc49 x86: Use ePAPR defined properties for x86-uart
Use ePAPR defined properties for x86-uart: clock-frequency and
current-speed. Assign the value of clock-frequency in device tree
to plat->clock of x86-uart instead of using hardcoded number.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-01-13 07:24:57 -08:00