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https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
stm32f4: add serial print port
Add the stm32F4 board's serial ports support. User can use it easily. The user only need to edit the number of the usart. The patch also fix the serial print out. Last, this version of patch fix the first patch checkpatch.pl error. Thanks to Kamil Lulko. Signed-off-by: kunhuahuang <huangkunhua@gmail.com>
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parent
85e5f5b7a7
commit
60570df19c
4 changed files with 107 additions and 22 deletions
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@ -11,6 +11,38 @@
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#ifndef _STM32_GPIO_H_
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#define _STM32_GPIO_H_
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#if (CONFIG_STM32_USART == 1)
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#define STM32_GPIO_PORT_X STM32_GPIO_PORT_A
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#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_9
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#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_10
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#define STM32_GPIO_USART STM32_GPIO_AF7
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#elif (CONFIG_STM32_USART == 2)
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#define STM32_GPIO_PORT_X STM32_GPIO_PORT_D
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#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_5
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#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_6
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#define STM32_GPIO_USART STM32_GPIO_AF7
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#elif (CONFIG_STM32_USART == 3)
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#define STM32_GPIO_PORT_X STM32_GPIO_PORT_C
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#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_10
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#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_11
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#define STM32_GPIO_USART STM32_GPIO_AF7
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#elif (CONFIG_STM32_USART == 6)
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#define STM32_GPIO_PORT_X STM32_GPIO_PORT_G
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#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_14
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#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_9
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#define STM32_GPIO_USART STM32_GPIO_AF8
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#else
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#define STM32_GPIO_PORT_X STM32_GPIO_PORT_A
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#define STM32_GPIO_PIN_TX STM32_GPIO_PIN_9
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#define STM32_GPIO_PIN_RX STM32_GPIO_PIN_10
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#define STM32_GPIO_USART STM32_GPIO_AF7
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#endif
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enum stm32_gpio_port {
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STM32_GPIO_PORT_A = 0,
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STM32_GPIO_PORT_B,
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@ -33,21 +33,21 @@ const struct stm32_gpio_ctl gpio_ctl_usart = {
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.otype = STM32_GPIO_OTYPE_PP,
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.speed = STM32_GPIO_SPEED_50M,
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.pupd = STM32_GPIO_PUPD_UP,
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.af = STM32_GPIO_AF7
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.af = STM32_GPIO_USART
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};
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static const struct stm32_gpio_dsc usart1_gpio[] = {
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{STM32_GPIO_PORT_A, STM32_GPIO_PIN_9}, /* TX */
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{STM32_GPIO_PORT_A, STM32_GPIO_PIN_10}, /* RX */
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static const struct stm32_gpio_dsc usart_gpio[] = {
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{STM32_GPIO_PORT_X, STM32_GPIO_PIN_TX}, /* TX */
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{STM32_GPIO_PORT_X, STM32_GPIO_PIN_RX}, /* RX */
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};
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int uart1_setup_gpio(void)
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int uart_setup_gpio(void)
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{
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int i;
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int rv = 0;
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for (i = 0; i < ARRAY_SIZE(usart1_gpio); i++) {
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rv = stm32_gpio_config(&usart1_gpio[i], &gpio_ctl_usart);
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for (i = 0; i < ARRAY_SIZE(usart_gpio); i++) {
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rv = stm32_gpio_config(&usart_gpio[i], &gpio_ctl_usart);
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if (rv)
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goto out;
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}
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@ -272,7 +272,7 @@ int board_early_init_f(void)
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{
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int res;
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res = uart1_setup_gpio();
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res = uart_setup_gpio();
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if (res)
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return res;
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@ -10,11 +10,34 @@
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#include <serial.h>
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#include <asm/arch/stm32.h>
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/*
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* Set up the usart port
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*/
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#if (CONFIG_STM32_USART >= 1) && (CONFIG_STM32_USART <= 6)
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#define USART_PORT (CONFIG_STM32_USART - 1)
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#else
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#define USART_PORT 0
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#endif
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/*
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* Set up the usart base address
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*
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* --STM32_USARTD_BASE means default setting
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*/
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#define STM32_USART1_BASE (STM32_APB2PERIPH_BASE + 0x1000)
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#define RCC_APB2ENR_USART1EN (1 << 4)
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#define USART_BASE STM32_USART1_BASE
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#define RCC_USART_ENABLE RCC_APB2ENR_USART1EN
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#define STM32_USART2_BASE (STM32_APB1PERIPH_BASE + 0x4400)
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#define STM32_USART3_BASE (STM32_APB1PERIPH_BASE + 0x4800)
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#define STM32_USART6_BASE (STM32_APB2PERIPH_BASE + 0x1400)
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#define STM32_USARTD_BASE STM32_USART1_BASE
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/*
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* RCC USART specific definitions
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*
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* --RCC_ENR_USARTDEN means default setting
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*/
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#define RCC_ENR_USART1EN (1 << 4)
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#define RCC_ENR_USART2EN (1 << 17)
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#define RCC_ENR_USART3EN (1 << 18)
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#define RCC_ENR_USART6EN (1 << 5)
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#define RCC_ENR_USARTDEN RCC_ENR_USART1EN
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struct stm32_serial {
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u32 sr;
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@ -39,6 +62,24 @@ struct stm32_serial {
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DECLARE_GLOBAL_DATA_PTR;
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static const unsigned long usart_base[] = {
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STM32_USART1_BASE,
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STM32_USART2_BASE,
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STM32_USART3_BASE,
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STM32_USARTD_BASE,
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STM32_USARTD_BASE,
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STM32_USART6_BASE
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};
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static const unsigned long rcc_enr_en[] = {
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RCC_ENR_USART1EN,
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RCC_ENR_USART2EN,
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RCC_ENR_USART3EN,
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RCC_ENR_USARTDEN,
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RCC_ENR_USARTDEN,
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RCC_ENR_USART6EN
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};
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static void stm32_serial_setbrg(void)
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{
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serial_init();
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@ -46,14 +87,17 @@ static void stm32_serial_setbrg(void)
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static int stm32_serial_init(void)
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{
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struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
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struct stm32_serial *usart =
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(struct stm32_serial *)usart_base[USART_PORT];
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u32 clock, int_div, frac_div, tmp;
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if ((USART_BASE & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE) {
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setbits_le32(&STM32_RCC->apb1enr, RCC_USART_ENABLE);
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if ((usart_base[USART_PORT] & STM32_BUS_MASK) ==
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STM32_APB1PERIPH_BASE) {
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setbits_le32(&STM32_RCC->apb1enr, rcc_enr_en[USART_PORT]);
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clock = clock_get(CLOCK_APB1);
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} else if ((USART_BASE & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE) {
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setbits_le32(&STM32_RCC->apb2enr, RCC_USART_ENABLE);
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} else if ((usart_base[USART_PORT] & STM32_BUS_MASK) ==
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STM32_APB2PERIPH_BASE) {
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setbits_le32(&STM32_RCC->apb2enr, rcc_enr_en[USART_PORT]);
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clock = clock_get(CLOCK_APB2);
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} else {
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return -1;
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@ -72,7 +116,8 @@ static int stm32_serial_init(void)
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static int stm32_serial_getc(void)
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{
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struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
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struct stm32_serial *usart =
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(struct stm32_serial *)usart_base[USART_PORT];
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while ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
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;
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return readl(&usart->dr);
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@ -80,7 +125,8 @@ static int stm32_serial_getc(void)
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static void stm32_serial_putc(const char c)
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{
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struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
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struct stm32_serial *usart =
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(struct stm32_serial *)usart_base[USART_PORT];
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if (c == '\n')
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stm32_serial_putc('\r');
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@ -92,7 +138,8 @@ static void stm32_serial_putc(const char c)
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static int stm32_serial_tstc(void)
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{
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struct stm32_serial *usart = (struct stm32_serial *)USART_BASE;
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struct stm32_serial *usart =
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(struct stm32_serial *)usart_base[USART_PORT];
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u8 ret;
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ret = readl(&usart->sr) & USART_SR_FLAG_RXNE;
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@ -50,8 +50,14 @@
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#define CONFIG_STM32_GPIO
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#define CONFIG_STM32_SERIAL
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#define CONFIG_STM32_USART1
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/*
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* Configuration of the USART
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* 1: TX:PA9 PX:PA10
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* 2: TX:PD5 RX:PD6
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* 3: TX:PC10 RX:PC11
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* 6: TX:PC6 RX:PC7
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*/
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#define CONFIG_STM32_USART 1
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#define CONFIG_STM32_HSE_HZ 8000000
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