Commit graph

35127 commits

Author SHA1 Message Date
Simon Glass
28a943c110 rockchip: spi: Remember the last speed to avoid re-setting it
Rather than changing the clock to the same value on every transaction,
remember the last value and don't adjust the clock unless it is necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
a49dc0a914 rockchip: reset: Use the rk_clr/setreg() interface
Use this function in preference to the macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
0906995bf3 rockchip: sdram: Use the rk_clr/setreg() interface
Use this function in preference to the macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
a4b10c088c dm: clk: Add a simple version of clk_get_by_index()
This function adds quite a bit of code to SPL and we probably don't need
all the features in SPL. Add a simple version (for SPL only) to save space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
364809de31 dm: power: Allow regulators to not implement all operations
Some regulators will not implement any operations (e.g. fixed regulators).
This is not an error, so allow the autoset process to continue when one
of these regulators is found.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
7d5779993d dm: power: Tidy up debugging output and return values
The currect PMIC debugging is a little confusing. Adjust it so that it is
clear whether the operation succeeded or failed. Also, avoid creating a new
error return value when a perfectly good one is already available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
1b30d61d78 dm: core: Export uclass_find_device_by_of_offset()
It is sometimes useful to be able to find a device before probing it,
perhaps to set up some platform data for it. Allow finding by of_offset
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
77eaa19e73 dm: pinctrl: Add a way for a GPIO driver to obtain a pin function
GPIO drivers want to be able to show if a pin is enabled for input, output,
or is being used by another function. Some drivers can easily find this
and the code is included in the driver. For some SoCs this is more complex.
Conceptually this should be handled by pinctrl rather than GPIO. Most
pinctrl drivers will have this feature anyway.

Add a method by which a GPIO driver can obtain the pin mux value given a
GPIO reference. This avoids repeating the code in two places.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
1f2b4b06ae dm: power: Allow regulators to be omitted from SPL
For some boards the pmic interface is useful but the regulator interface
(which comes with it) is too large. Allow them to be separated such that
SPL can decide which it needs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
d178a1c5b2 spi: Correct device tree usage in spi_flash_decode_fdt()
This function currently searches the entire device tree for a node that
it thinks is relevant. But the node is known and is passed in. Correct the
code and enable it only with driver model, since only driver-model boards
will use it.

This avoids bringing in a large number of strings from fdtdec.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
4082fce924 dm: i2c: Allow muxes to be enabled for SPL separately
Since I2C muxes are seldom needed in SPL, and the code for this increases
the size somewhat, add a separate option to enable I2C muxes for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
d7248c42f1 cros_ec: Disable the Chrome OS EC in SPL
This is not used in SPL so don't allow it to be built there, even if I2C
is enabled in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
0ffe6ab521 gpio: Allow 's' as an abbreviation for 'status'
The 'gpio' command allows abbreviations for most subcommands. Allow them
for 'status' also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
69a050483e rockchip: jerry: Drop unused options
To reduce the SPL image size, drop the LED features. Jerry does not have
an LED and we can leave out GPIO support also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
7991809c98 rockchip: Disable simple-bus in SPL for firefly-rk3288, jerry
This is not needed for booting, so drop it from SPL to save about 300 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
156ac85e1d rockchip: jerry: Enable the RK808 PMIC and regulator
Enable this PMIC and regulator, which is used on jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
9c56d6f71e rockchip: Move firefly and jerry to use the full pinctrl
Use the full pinctrl driver in U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
bea705c993 rockchip: pinctrl: Add a full pinctrl driver
We can make use of the device tree to configure pinctrl settings. Add this
support for the driver so we can use it in U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:35 -07:00
Simon Glass
342999f9b3 rockchip: mmc: Update the driver to use the new clock ID
We can use the new clk_get_by_index() function to get the correct clock.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
6d97786b4c rockchip: spi: Avoid setting the pinctrl twice
If full pinctrl is enabled we don't need to manually set the pinctrl in the
driver. It will happen automatically. Adjust the code to suit - we will
still use manual mode in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
71037d1ca0 rockchip: spi: Update the driver to use the new clock ID
We can use the new clk_get_by_index() function to get the correct clock.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
930bc37423 rockchip: i2c: Update the driver to use the new clock ID
We can use the new clk_get_by_index() function to get the correct clock.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
64b7faa7f9 rockchip: clock: Add a function to find a clock by ID
The current approach of using uclass_get_device() is error-prone. Another
clock (for example a fixed-clock) may cause it to break. Add a function that
does a proper search.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
4f43673e5a rockchip: clk: Add a function to get a peripheral clock rate
It is useful to be able to read the rate of a peripheral clock. Add a
handler for that.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
542635a0cf rockchip: clock: Rename the general clock variable to gclk_rate
The current name is confusing and a bit verbose. Rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
898d64395c rockchip: Use a separate clock ID for clocks
At present we use the same peripheral ID for clocks and pinctrl. While this
works it is probably better to use the device tree clock binding ID for
clocks. We can use the clk_get_by_index() function to find this.

Update the clock drivers and the code that uses them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
f4adc9a504 rockchip: jerry: Disable pmic-int-1 setup to avoid a hang
This hangs when activated (by probing the PMIC). Disable it for now until we
understand the root cause.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
79d020ee74 rockchip: Use pwrseq for MMC start-up on jerry
This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
ec4ac4e7c0 rockchip: Correct the defconfig order
This has got out of sequence somehow. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
e1efec4e0a rockchip: mmc: Use a pwrseq device if available
Use the pwrseq uclass to find a suitable power sequence for the MMC device.
If this is enabled in the device tree, we will pick it up automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
a4275f5e52 rockchip: Convert the PMU IOMUX registers into an array
This is easier to deal with when using generic code since it allows us to
use a register index instead of naming each register.

Adjust it, adding an enum to improve readability.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
1e724f8ea8 rockchip: Avoid using MMC code when not booting from MMC
This saves some code space in SPL which is useful on jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
5fd6badbd2 dm: Add a power sequencing uclass
Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
e1227764cd power: Add support for RK808 regulators
Add regulator support for the RK808 PMIC. It integrated 4 BUCKs and 8 LDOs
all of which are supported by this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
2a4febfd91 power: Add base support for the RK808 PMIC
This Rockchip PMIC provides features suitable for battery-powered
applications. It is commonly used with Rockchip SoCs.

Add a driver which provides register access. The regulator driver will use
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
61101e0583 dts: Bring in pinctrl device tree binding
Add this binding file since we now use it in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
931b24c5a0 dm: pmic: Add 'reg status' to show all regulators
It is convenient to be able to see the status of all regulators in a list.
Add this feature to the 'reg status' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
52db39a22b dm: pinctrl: Add a function to parse PIN_CONFIG flags
Add a function which produces a flags word from a few common PIN_CONFIG
settings. This is useful for simple pinctrl drivers that don't need to worry
about drive strength, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Simon Glass
0379597e55 dm: core: Don't set pinctrl for pinctrl devices
There is sort-of race condition when a pinctrl device is probed. The pinctrl
function is called which may end up using the same device as is being
probed. This results in operations being used before the device is actually
probed.

For now, disallow pinctrl operations on pinctrl devices while probing. An
alternative solution would be to move the operation to later in the
device_probe() function (for pinctrl devices only) but this needs more
thought.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:34 -07:00
Jeffy Chen
b6517a0d02 rockchip: kylin: Store env in emmc
There's a 64K reserved area at the end of the first 4M.
Store env there, so we can use fastboot to flash it.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:05:41 -07:00
Jeffy Chen
e68f203667 rockchip: kylin: Check fastboot request
We will save boot mode flag in grf's os_reg[4], if fastboot
requested or fastboot key pressed, try to enter fastboot mode
at preboot stage.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:05:26 -07:00
Jeffy Chen
197e14ea7a rockchip: kylin: Add default gpt partition table
Add default android gpt partition table for kylin board.

Use "gpt write mmc 0 $partitions" to apply.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-21 20:04:10 -07:00
Jeffy Chen
9d19e5d3da rockchip: rk3036: Bind GPIO banks
Call dm_scan_fdt_node() in rk3036 pinctrl uclass binding.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-21 20:04:04 -07:00
Jeffy Chen
f7ee071a22 ARM: bootm: Try to use relocated ramdisk
After boot_ramdisk_high(), ramdisk would be relocated to
initrd_start & initrd_end, so use them instead of rd_start & rd_end.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-21 20:03:59 -07:00
Simon Glass
e70cc43831 dm: clk: Add support for decoding clocks from the device tree
Add a method which can locate a clock for a device, given its index. This
uses the normal device tree bindings to return the clock device and the
first argument which is normally used as a peripheral ID in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-21 19:47:29 -07:00
Masahiro Yamada
b21e20b255 clk: add fixed rate clock driver
This commit intends to implement "fixed-clock" as in Linux.
(drivers/clk/clk-fixed-rate.c in Linux)

If you need a very simple clock to just provide fixed clock rate
like a crystal oscillator, you do not have to write a new driver.
This driver can support it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-21 19:46:47 -07:00
Tom Rini
6905f4d3c7 Merge git://git.denx.de/u-boot-dm 2016-01-21 11:49:49 -05:00
Tom Rini
45fe3809b9 Merge branch 'master' of git://git.denx.de/u-boot-i2c; branch 'master' of git://git.denx.de/u-boot-nds32 2016-01-21 09:12:22 -05:00
Jelle van der Waa
9d0826879e sunxi: Add support for the I2C controller which is part of the PRCM
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: Minor cleanups]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

applied with fixing 2 checkpatch warnings:
WARNING: please, no space before tabs

Signed-off-by: Heiko Schocher <hs@denx.de>
2016-01-21 07:30:01 +01:00
Hans de Goede
904dfbfd67 i2c: mvtwsi: Fix mvtwsi not working on sun6i and newer sunxi SoCs
On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1,
rather then a normal r/w bit which is cleared by writing 0.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

applied with fixing 3 checkpatch warnings
in drivers/i2c/mvtwsi.c:
WARNING: line over 80 characters
ERROR: code indent should use tabs where possible
WARNING: please, no spaces at the start of a line

Signed-off-by: Heiko Schocher <hs@denx.de>
2016-01-21 07:23:29 +01:00