Commit graph

1158 commits

Author SHA1 Message Date
Tom Rini
24b628a8f8 Xilinx changes for v2022.04-rc3
microblaze:
 - Fix exception handler
 
 zynqmp:
 - Show information about secure images
 - DT changes (som u-boot file removal)
 - Fix zynqmp_pm_cfg_obj_convert.py
 - Fix platform boot
 
 xilinx:
 - Fix bootm_size calculation
 - Remove GPIO_EXTRA_HEADER selection
 
 power:
 - Add zynqmp power management driver
 
 scsi:
 - Add phy support to ceva driver
 
 zynq qspi:
 - Fix unaligned accesses and check baudrate setup
 - Add support for spi memory operations
 
 net:
 - Fix 64bit calculation in axi_emac
 
 video:
 - Add missing gpio dependency for seps driver
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Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
2022-02-21 08:32:02 -05:00
Michal Simek
e0283cbdfd power: zynqmp: Add power domain driver for ZynqMP
Driver should be enabled by CONFIG_POWER_DOMAIN=y and
CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node
but it uses zynqmp firmware DT node that's why there is a need to bind
driver when firmware node is found.

Driver itself is simple. It is sending pmufw config object overlay for
enabling access to device which is done in ...domain_request().
In ...domain_on() capabilities are passed and node is requested.
This should be bare minimum of required to get power domain driver working.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/f4b9433b91c0b18c375b061c7a4e29d428f70547.1644226055.git.michal.simek@xilinx.com
2022-02-15 13:01:42 +01:00
AKASHI Takahiro
118a0ecd6d tools: mkeficapsule: add man page
Add a man page for mkeficapsule command.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-02-11 20:07:55 +01:00
Pali Rohár
ba4e6f8a5e MAINTAINERS: Update list of Armada 385 and Armada 3720 drivers
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-10 07:12:16 +01:00
Keerthy
57b02b79f3 dts: am57xx*: Add ipu early boot DT changes
Add support for ipu early boot.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2022-02-08 11:00:03 -05:00
Keerthy
0bfc701e67 dts: dra7-ipu-common-early-boot.dtsi: Add all the ipu early boot related nodes
Add all the ipu early boot related nodes

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2022-02-08 11:00:03 -05:00
Keerthy
fc6b41fefb remoteproc: ipu: Add driver to bring up ipu
The driver enables IPU support. Basically enables the clocks,
timers, watchdog timers and bare minimal MMU and supports
loading the firmware from mmc.

Signed-off-by: Keerthy <j-keerthy@ti.com>
[Amjad: fix compile warnings]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2022-02-08 11:00:03 -05:00
Keerthy
795b2c476f reset: dra7: Add a reset driver
Add a reset driver to bring IPs out of reset.

Signed-off-by: Keerthy <j-keerthy@ti.com>
[Amjad: reset_ops structure member "free" has been renamed to "rfree",
use the latter instead]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2022-02-08 09:41:27 -05:00
Simon Glass
c77504df68 acpi: Add myself as maintainer
Add myself as maintainer of the generic ACPI code, until someone else
steps up to take it on.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-01-25 11:44:36 -07:00
Anastasiia Lukianenko
800f0d05e1 MAINTAINERS: Update e-mail in Xen maintainership
Changing e-mail because of leaving EPAM.

Signed-off-by: Anastasiia Lukianenko <vicooodin@gmail.com>
Reviewed-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
2022-01-24 10:35:10 -05:00
Tom Rini
068415eade Xilinx changes for v2022.04-rc1
gpio:
 - Add modepin driver
 
 net:
 - Save random mac addresses to eth variable
 
 zynqmp gem:
 - Add support for mdio bus DT description
 - Add support for reset and SGMII phy configuration
 - Reduce timeout for MDIO accesses
 
 zynqmp clk:
 - Fix clock handling for gem and usb
 
 phy:
 - Add zynqmp phy/serdes driver
 
 serial:
 - Add one missing compatible string
 
 microblaze:
 - Symbol alignement
 - SPL fixups
 - Code cleanups
 
 zynqmp:
 - Various dt changes, DP pre-reloc, gem resets, gem clocks
 - Switch SOM to shared psu configuration
 - Move dcache handling to firmware driver
 - Workaround gmii2rgmii DT description issue
 - Enable broadcasts again
 - Change firmware enablement logic
 - Small adjustement in firmware driver
 
 versal:
 - Support new mmc@ DT nodes
 - Fix run time variable handling
 - Add missing I2C_PMC ID for power domain
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Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc1

gpio:
- Add modepin driver

net:
- Save random mac addresses to eth variable

zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses

zynqmp clk:
- Fix clock handling for gem and usb

phy:
- Add zynqmp phy/serdes driver

serial:
- Add one missing compatible string

microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups

zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver

versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
2022-01-19 11:43:44 -05:00
Heinrich Schuchardt
bf59c46bcb MAINTAINERS: remove Alexander Graf from EFI PAYLOAD
The last review by Alex was in 2019.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-15 10:57:22 +01:00
Mark Kettenis
ee327d1d93 watchdog: Add a driver for the Apple watchdog
This driver supports the watchdog timer found on Apple's M1 SoC.
On systems that use these SoC, the watchdog timer is the primary
way to reboot the system.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg@chromium.org>
2022-01-13 06:55:46 +01:00
Michal Simek
1d78d68349 phy: zynqmp: Add serdes/psgtr driver
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.

USB3.0 and SGMII configurations are tested on SOM. In SGMII case also
IOU_SLCR reg is updated to get proper clock setup and signal detection
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/36e6e9d3baf8511af1916e91e4887032ca2b6c20.1641458978.git.michal.simek@xilinx.com
2022-01-12 10:41:46 +01:00
T Karthik Reddy
3b441cf4e4 zynqmp: gpio: Add support for zynqmp gpio modepin driver
ZynqMP modepin driver has capability to get/set/check status of modepin
gpios. These modepins are accessed using xilinx firmware. In modepin
register, [3:0] bits set direction, [7:4] bits read IO, [11:8] bits
set/clear IO.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2d802d98fd56d95d764532a33e844d935e0cebb3.1635505900.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Tom Rini
4afab30cae Prepare v2022.01-rc4
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Merge tag 'v2022.01-rc4' into next

Prepare v2022.01-rc4
2021-12-20 17:12:04 -05:00
Pali Rohár
c53a30f039 arm: mvebu: serial: Add me as co-maintainer and author of Marvell serial drivers
There is no maintainer entry for serial_mvebu_a3700.c. Add entry with Pali
and Stefan as maintainers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-19 09:50:47 +01:00
Pali Rohár
22f69fc79b arm: mvebu: pci: Add me as co-maintainer and author of Marvell PCIe drivers
There is no maintainer entry for pci-aardvark.c. Add entry for
pci-aardvark.c and pci_mvebu.c with Pali and Stefan as maintainers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-19 09:50:47 +01:00
Simon Glass
42b7f4212a efi: Add uclass for devices provided by UEFI firmware
UCLASS_EFI_LOADER is used for devices created by applications and
drivers loaded by U-Boots UEFI implementation.

This patch provides a new uclass (UCLASS_EFI_MEDIA) to be used for devices
that provided by a UEFI firmware calling U-Boot as an EFI application.

If the two uclasses can be unified, is left to future redesign.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Tom Rini
2402c93130 Prepare v2022.01-rc3
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Merge tag 'v2022.01-rc3' into next

Prepare v2022.01-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-29 12:00:57 -05:00
Sean Anderson
7d3bebb206 fastboot: Add maintainers entry
Add an entry in maintainers for fastboot. It is starting off orphaned, but
hopefully someone can pick it up.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2021-11-29 11:15:37 -05:00
Sean Anderson
4469d3b4db clk: Add myself as a maintainer for the clock subsystem
Lukasz has not been very responsive in reviewing clock patches. Add
myself as a maintainer.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2021-11-29 11:15:37 -05:00
Mark Kettenis
b814e0007e pinctrl: Add Apple pinctrl driver
This driver supports both pin muxing and GPIO support for the
pin control logic found on Apple SoCs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-11-17 17:04:58 -05:00
Simon Glass
86b9c3e4e4 env: Allow U-Boot scripts to be placed in a .env file
At present U-Boot environment variables, and thus scripts, are defined
by CONFIG_EXTRA_ENV_SETTINGS. It is painful to add large amounts of text
to this file and dealing with quoting and newlines is harder than it
should be. It would be better if we could just type the script into a
text file and have it included by U-Boot.

Add a feature that brings in a .env file associated with the board
config, if present. To use it, create a file in a board/<vendor>
directory, typically called <board>.env and controlled by the
CONFIG_ENV_SOURCE_FILE option.

The environment variables should be of the form "var=value". Values can
extend to multiple lines. See the README under 'Environment Variables:'
for more information and an example.

In many cases environment variables need access to the U-Boot CONFIG
variables to select different options. Enable this so that the environment
scripts can be as useful as the ones currently in the board config files.
This uses the C preprocessor, means that comments can be included in the
environment using /* ... */

Also support += to allow variables to be appended to. This is needed when
using the preprocessor.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
2021-11-16 14:35:08 -05:00
Ilias Apalodimas
2a10e06e07 MAINTAINERS: Add entry for TPM drivers
TPM drivers have currently no maintainers.  Add myself since I contributed
the TIS implementation.

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10 20:57:54 +01:00
Simon Glass
e16c47fa3d efi: Create a 64-bit app
Most modern platforms use 64-bit EFI so it is useful to have a U-Boot app
that runs under that. Add a (non-functional) build for this.

Note that --whole-archive causes the gcc 9.2 linker to crash, so disable
this for now. Once this is resolved, things should work.

For now, avoid mentioning the documentation for the 64-bit app, since it
does not work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-11-07 18:36:55 +01:00
Simon Glass
6b2f82901e efi: Add a script to build an image for testing on UEFI
It is quite complicated to run U-Boot on QEMU since we have four
different builds and they must use different versions of qemu and the
UEFI binaries.

Add a script to help. It requires U-Boot itself to be built. Once that
is done you can use this script to build an image for use with qemu and
optionally run it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-11-07 18:36:55 +01:00
Dzmitry Sankouski
f5a2d6b4b0 spmi: msm: add arbiter version 5 support
Currently driver supports only version 1 and 2.
Version 5 has slightly different registers structure

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-10-31 08:46:44 -04:00
Dzmitry Sankouski
324df15a29 serial: qcom: add support for GENI serial driver
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2021-10-31 08:46:44 -04:00
Mark Kettenis
003b657edc arm: apple: Add initial support for Apple's M1 SoC
Add support for Apple's M1 SoC that is used in "Apple Silicon"
Macs.  This builds a basic U-Boot that can be used as a payload
for the m1n1 boot loader being developed by the Asahi Linux
project.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Add MAINTAINERS entry]
2021-10-31 08:46:44 -04:00
Simon Glass
91aa8476b2 efi: Add a separate maintainer entry for the app
Separate this out slightly from the payload, with a new entry.

We might consider renaming EFI PAYLOAD to EFI LOADER, but that would
require quite a lot of file changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21 03:46:03 +02:00
Simon Glass
d7faa082a5 Revert "kbuild: remove unused dtc-version.sh script"
We need this to make building dtc optional. It makes no sense to build our
own dtc if the system one works correctly.

This reverts commit ddb87a0b40.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-19 11:23:07 -04:00
Heinrich Schuchardt
24ed5317d4 sysreset: provide SBI based sysreset driver
Provide sysreset driver using the SBI system reset extension.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Samuel Holland <samuel@sholland.org>
2021-10-07 16:08:23 +08:00
Marek Behún
6c96332441 MAINTAINERS: Add entry for kwbimage / kwboot tools
Add entry for these tools with Marek, Pali and Stefan as maintainers.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-10-01 11:07:13 +02:00
Tom Rini
e908d20fcb Prepare v2021.10-rc5
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Merge tag 'v2021.10-rc5' into next

Prepare v2021.10-rc5
2021-09-27 09:45:36 -04:00
Patrick Delaunay
6941ff7619 MAINTAINERS: remove SPEAR entry
As the lastest spear directories are removed, delete the associated entry
in the MAINTAINERS file:
- arch/arm/cpu/arm926ejs/spear/
- arch/arm/include/asm/arch-spear/

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-24 12:09:46 -04:00
Eugen Hristev
0d58dafd64 include: dt-bindings: mfd: add atmel flexcom include file
Add dt-bindings include file for Atmel Flexcom hardware block.
This file is copied from Linux kernel.
It is used in devicetrees from Linux.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-09-21 10:08:24 +03:00
Christophe Leroy
12ff1a8d23 MAINTAINERS: POWERPC MPC8XX: Update email address
Our email addresses have changed from @c-s.fr to @csgroup.eu

Update entry in MAINTAINERS

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2021-09-17 09:24:27 -04:00
Tom Rini
6674edaabf Prepare v2021.10-rc4
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Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	board/Arcturus/ucp1020/spl.c
#	cmd/mvebu/Kconfig
#	common/Kconfig.boot
#	common/image-fit.c
#	configs/UCP1020_defconfig
#	configs/sifive_unmatched_defconfig
#	drivers/pci/Kconfig
#	include/configs/UCP1020.h
#	include/configs/sifive-unmatched.h
#	lib/Makefile
#	scripts/config_whitelist.txt
2021-09-16 10:29:40 -04:00
Lokesh Vutla
f91c3aa07e MAINTAINERS: Update ARM TI entry
Move TI maintainership to Tom.
Updated with the following commands:
find ./ -name MAINTAINERS | xargs sed -i s/"Lokesh Vutla <lokeshvutla@ti.com>"/"Tom Rini <trini@konsulko.com>"/g

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Tom Rini <trini@konsulko.com>
2021-09-09 11:28:54 -04:00
Stephan Gerhold
7093df3c75 MAINTAINERS: Add new drivers for ARM U8500
Update MAINTAINERS with various drivers for ARM U8500 that were
added during the U-Boot 2021.10 merge window.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-09-01 19:25:37 -04:00
T Karthik Reddy
42e20f52d9 soc: xilinx: versal: Add soc_xilinx_versal driver
soc_xilinx_versal driver allows identification of family & revision
of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL.
Probe this driver using platdata U_BOOT_DEVICE structure which is
defined at mach-versal/cpu.c.
Add this config to xilinx_versal_virt_defconfig &
xilinx_versal_mini_ospi_defconfig file to select this driver.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
T Karthik Reddy
a890a53ad2 soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driver
soc_xilinx_zynqmp driver allows identification of family & revision
of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP.
Add this config to xilinx_zynqmp_virt_defconfig file.
Probe this driver using platdata U_BOOT_DEVICE structure which is
specified in mach-zynqmp/cpu.c.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Michal Simek
3f123b7424 reset: zynqmp: Add reset controller for ZynqMP SoC
Add firmware based reset controller for Xilinx ZynqMP SoC to let other
drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but
support for Xilinx Versal can be simply added. That's why reset_id and
nr_reset are assigned in probe folder.
Driver is inpired by driver from Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:03 +02:00
Michal Simek
1f065e8fea rtc: zynqmp: Add support for ZynqMP RTC
The whole driver logic is taken from Linux kernel but only set/get/reset
functions are implemented. When device is power off RTC is power out of
battery.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:02 +02:00
Roland Gaudig
236d39bd10 doc: usage: add description for setexpr command
Add usage for the setexpr command. It has been added to describe
mainly the new setexpr format string operation.

Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-27 14:50:47 -04:00
Roland Gaudig
f4f8d8bb1a cmd: setexpr: add format string handling
Add format string handling operator to the setexpr command.
It allows to use C or Bash like format string expressions to be
evaluated with the result being stored inside the environment variable
name.

  setexpr <name> fmt <format> [value]...

The following example

  setexpr foo fmt "%d, 0x%x" 0x100 ff

will result in $foo being set to "256, 0xff".

Signed-off-by: Roland Gaudig <roland.gaudig@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-27 14:50:47 -04:00
Ashok Reddy Soma
258ce79cfc net: xilinx: axi_mrmac: Add MRMAC driver
Add support for xilinx multirate(MRMAC) ethernet driver.
This driver uses multichannel DMA(MCDMA) for data transfers of MRMAC.
Added support for 4 ports of MRMAC for speeds 10G and 25G.
MCDMA supports upto 16 channels but in this driver we have setup only
one channel which is enough.

Tested 10G and 25G on all 4 ports.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
AKASHI Takahiro
d75f48a83d MAINTAINERS: correct the path of UEFI docs
Change the path from doc/uefi to doc/develop/uefi.

Fixes: commit d1ceeeff6c ("doc: Move UEFI under develop/")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-07-24 10:49:51 +02:00
Keerthy
02bfcc5c3a remoteproc: pru: Add support for various PRU cores on K3 AM65x SoCs
The K3 AM65x family of SoCs have the next generation of the PRU-ICSS
processor subsystem, commonly referred to as ICSSG. Each ICSSG processor
subsystem on AM65x SR1.0 contains two primary PRU cores and two new
auxiliary PRU cores called RTUs. The AM65x SR2.0 SoCs have a revised
ICSSG IP that is based off the subsequent IP revision used on J721E
SoCs. This IP instance has two new custom auxiliary PRU cores called
Transmit PRUs (Tx_PRUs) in addition to the existing PRUs and RTUs.

Each RTU and Tx_PRU cores have their own dedicated IRAM (smaller than
a PRU), Control and debug feature sets, but is different in terms of
sub-modules integrated around it and does not have the full capabilities
associated with a PRU core. The RTU core is typically used to aid a
PRU core in accelerating data transfers, while the Tx_PRU cores is
normally used to control the TX L2 FIFO if enabled in Ethernet
applications. Both can also be used to run independent applications.
The RTU and Tx_PRU cores though share the same Data RAMs as the PRU
cores, so the memories have to be partitioned carefully between different
applications. The new cores also support a new sub-module called Task
Manager to support two different context thread executions.
The driver currently supports the AM65xx SoC

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210622063431.3151-3-lokeshvutla@ti.com
2021-07-15 17:56:04 +05:30