Add automatic boot counter that increases after every
reset. After a power-on reset, it will be initialized with 1,
and each reboot will increment the value by 1. By default it is
disabled if bootlimit isn't set.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Select CONFIG_CMD_SQUASHFS so that the SquashFS U-Boot commands
are available.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Introduce EXTRA_BOOTPARAMS to allow passing additional parameters
to kernel command line. This is useful for debugging purposes.
Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
It doesn't seem appropriate for arch/SOC to use a board-level
functionality (CONFIG_OF_BOARD_FIXUP), because this prevents boards
that need to do FDT fixup from using that feature.
Also, this code is completely dead and useless (from comments by
Rasmus Villemoes on the mailing list):
- No in-tree imx8m-based board seems to set CONFIG_OF_BOARD_FIXUP
- The nodes which that function wants to disable don't even exist in
the U-Boot copy of imx8mp.dtsi.
This code was introduced in commit 35bb60787b. It seems to be some
random import of code from downstream NXP U-Boot, with a commit
message that makes no sense in upstream context.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
commit 787f04bb6a ("imx: add USB2_BOOT type") broke get_boot_device()
for IMX8 which affects booting from SDP due to boot_instance being
non-zero.
Fix this by only using boot_instance for imx8ulp and imx9.
Fixes: 787f04bb6a ("imx: add USB2_BOOT type")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Add debug messages to print the real pixel clock rate, which may not be
the requested one.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Add the get_lcd_clk() function to get the LCD pixel clock rate.
The patch has been tested on imx6ul platform.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
During some tests to check the pixel clock rate in the transition from
U-Boot to the Linux kernel, I noticed that with the same configuration
of the registers the debug messages reported different rates.
The same Linux kernel calculations are now used to get the PLL video
rate.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Avoid a buffer overflow if assigned-clock-rates has less than two elements.
Fixes: 98bcdf1635 ("imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The MNT Reform 2 is a modular DIY laptop. In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Stefano Babic <sbabic@denx.de>
At BDF address 00:00.0 is fictional device which PCI configuration header
is for configuring mpc85xx PCI controller itself. PCI config space of this
device has ATMU inbound registers on position of PCI BARs. Trying to do PCI
auto configuration of this device cause rewriting ATMU inbound registers.
To avoid it, do not allow overwriting registers at BARs positions. And
because this device does not have any PCI memory, return zeros when trying
to read PCI BARs config space registers. It signals to auto configuration
tool to not allocate any PCI memory for this device.
This information is taken from MPC8544E Reference Manual, sections
17.3.1.3, 17.3.1.1.1, 17.3.2 and 17.3.2.11. Available at NXP website:
https://www.nxp.com/docs/en/reference-manual/MPC8544ERM.pdf
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Driver pci_mpc85xx.c is PCI controller driver for old PCI Local Bus,
which does not support access to extended PCIe registers (above 0xff),
as opposite of the PCIe driver pcie_fsl.c for the same platform.
So do not try to access extended PCIe registers as it cannot work.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
This Freescale mpc85xx PCI controller should support 8-bit and 16-bit read
and write access to PCI config space as described in more Freescale
reference manuals.
This change fixes issue that 8-bit and 16-bit write to PCI config space
caused to clear adjacent bits of 32-bit PCI register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
On PowerPC we should use barrier after store operation to HW register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
The "Programming Environments Manual for 32-Bit Implementations of the
PowerPC™ Architecture" says "W and G bits are not defined for IBAT
registers. Attempting to write to these bits causes boundedly-undefined
results"
The "e300 Power Architecture™ Core Family Reference Manual" says the
same: "Neither the W or G bits of the IBAT registers should be set.
Attempting to write to these bits causes boundedly-undefined results."
Remove the possibility to set those bytes.
Fixes: 30915ab95d ("mpc83xx: Migrate BATS config to Kconfig")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Mario Six <mario.six@gdsys.cc>
Please pull the second part of the sunxi pull request for this cycle.
Another bunch of patches that replace old-school U-Boot hacks with
proper DM based code, this time for the raw NAND flash driver, and the
USB PHY VBUS detection code. Plus two smaller patches that were sitting
in my inbox for a while.
Gitlab CI passed. In lack of some supported board with NAND flash I
couldn't really test this part, but apparently this was tested by the
reviewer. I briefly ran the branch on some boards with USB-OTG, and
this still worked.
This pull request adds support for the last CPU board from
CS GROUP France (previously CSSI).
That CPU board called CMPCPRO has a mpc8321E CPU (Family PQII PRO hence
its name) and can be plugged in place of the CMPC885 board.
In order to support that new board, the following changes are included
in this series:
- Make the mpc8xx watchdog driver more generic for reusing it
with mpc83xx
- Fix various small problems on mpc83xx platform
- Add a GPIO Driver for QE GPIOs
- Add support for mpc832x into mpc83xx SPI driver
- Refactor existing board code that will be shared with new board
- Add the new board
various other minor fixes
-----BEGIN PGP SIGNATURE-----
iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAmRMHUARHHNqZ0BjaHJv
bWl1bS5vcmcACgkQfxc6PpAIreZYvQf/R868tRhADWw5UfUyg4TdSWsfGmNlmnYT
eU2e4L1riWvTzrQh30CGhXOamsgfrsDfOdERgypl1bRvhwI68GZPqjXXAyEcIcsP
HkqU47cUv4998Gcg4WwWdImU1vBeY1TRckgk3ILGMM1f4yGIlEaA/iYK8sqP2VuO
UYbrTVBPs5bu7BCQuLyMsR9SKpgMr8CTx9/UqBZioeXwwm8PD5+6S4kh8OlwWn93
5uFxxgFHSDioZZvM2A4sHkpsR5AxPJbC+Jxy9VHdMpfEaHk1E9H28gQnbnnDvByz
7I1JWVBeH/xu/OLjG9OR97s/yZF7IpcNtld+EMhczx1JJoxwxDBAKg==
=G7yK
-----END PGP SIGNATURE-----
Merge tag 'dm-pull-28apr23' of https://source.denx.de/u-boot/custodians/u-boot-dm
sandbox and fdt bug fixes / tweaks
various other minor fixes
For the devfdt_get_addr_index_ptr() and devfdt_get_addr_size_index_ptr()
function use map_sysmem() function as cast for the return for use in
sandbox. Also fix sandbox test.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop second hunk:
Signed-off-by: Simon Glass <sjg@chromium.org>
importlib.resources became part of 3.7 only. Allow using distros with
3.6 and the importlib_resources backport.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop the map_to_sysmem() copy paste error. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Variable orig_dir cannot be used in the finally block if it has not be
assigned outside of the try block.
tools/patman/func_test.py:523:21:
E0601: Using variable 'orig_dir' before assignment
(used-before-assignment)
tools/patman/func_test.py:691:21:
E0601: Using variable 'orig_dir' before assignment
(used-before-assignment)
Fixes: fd70986a62 ("patman: Add a test that uses gitpython")
Fixes: be051c0c77 ("patman: Detect missing upstream in CountCommitsToBranch")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There's quite a few instances of board-specific code doing
off = fdt_path_offset(gd->fdt_blob, ...);
...
ret = uclass_get_device_by_of_offset(..., off, &dev);
looking for an eeprom or a pmic via some alias. Such code can be
simplified a little if we have a helper for directly getting a device
via device tree path (including being given as an alias).
Implement it in terms of ofnode rather than raw offsets so that this
will work whether live tree is enabled or not.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The functions uclass_find_device_by_phandle() and
uclass_get_device_by_phandle_id() both loop over a given uclass
looking for a device with a given phandle. Factor that out to a common
helper.
For now, there are no (known potential) users of the new helper
outside uclass.c, so make it static.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix warning on sandbox_spl; fix code style:
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently doing 'reset' command in sandbox with tracing enabled causes
SIGSEV
```
Hit any key to stop autoboot: 0
=>
=>
=> reset
resetting ...
Segmentation fault (core dumped)
```
Tracing callback uses RAM buffer for storing tracing reports, but
state_uninit() function unmaps whole RAM, which causes SIGSEV on umapped
memory inside tracing subsystem.
Fix it by disabling tracing before unmapping memory
Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add missing check for CONFIG_TRACE:
Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/include/asm/posix_types.h and
arch/sandbox/include/asm/posix_types.h should use different defines.
Add SPDX header.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building this with clang, we get a warning such as:
cmd/bootflow.c:412:27: warning: variable 'bflow' is uninitialized when used here [-Wuninitialized]
printf("Selected: %s\n", bflow->os_name ? bflow->os_name : bflow->name);
^~~~~
And a suggestion to just initialize bflow to NULL. This would however
would be ensuring a bad dereference. Instead, looking at the function we
rework things so that when CONFIG_EXPO is not enabled (and so, no UI) we
error early and would never reach this point in the code. Simplify the
rest slightly as well while at this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Given a file ../img of size 4294967296 with GPT partition table and
partitions:
=> host bind 0 ../img
=> part list host 0
Disk host-0.blk not ready
The cause is os_filesize() returning int. File sizes must use off_t.
Correct all uses of os_filesize() too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The header binman_sym.h depends on ulong typedef but does not include
types.h. This means the header must be included after including types.h
or a header that includes it.
We could include types.h but instead let's just switch from ulong
to directly using unsigned long. This removes the need for typedef'ing
it in some of the tests, so also remove those.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Function fdt_simplefb_enable_existing_node() should be static as it is not
used outside common/fdt_simplefb.c.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
vbe_simple_read_bootflow() calls vbe_simple_read_bootflow_fw()
which is only available when BOOTMETH_VBE_SIMPLE_FW is on.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix a -Wimplicit-fallthrough warning in sandbox_sysreset_request().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a missing fallthrough macro to avoid a -Wimplicit-fallthrough warning.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid incorrect fall through:
A USB_RT_HUB request should not be treated as USB_RT_PORT.
Simplify the coding:
Avoid duplicate debug() statements.
This fixes all -Wimplicit-fallthrough warnings.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Handling of SANDBOX_FLASH_EP_OUT should never fall through to
SANDBOX_FLASH_EP_IN.
This addresses a warning shown when compiling with
-Wimplicit-fallthrough.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CSSI has another CPU board, similar to the CMPC885 board
that get plugged on the two base boards MCR3000_2G and MIAE.
That CPU board is called CMPCPRO because it has a MPC8321E CPU,
also known as Power QUICC II PRO.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
All the code used to manage the mother boards will be
common to soon to come CPU board.
Move all that code into common.c
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
On cmpc885 board, the ethernet addresses are stored in an
EEPROM that is accessed through SPI.
A 3 bytes command is sent to the chip then the content
gets read. At the time being a single block access is
performed, ignoring the first 3 bytes read.
Reword the SPI transfer to first send 3 bytes then
receive the content of the EEPROM so that there don't be
3 dummy bytes at the beginning of the buffer.
And move the function into common.c so that it can be
reused by the board that will be added in a future patch.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
In preparation of the new cssi board called cmpcpro which
we be introduce in a future patch, move common
functions into a dedicated file in a common directory.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
