Commit graph

449 commits

Author SHA1 Message Date
Nishanth Menon
08df746dd1 doc: board: ti: *: Add platform information
Add link to the actual platform for folks to find details about the
board in addition to the SoC's TRM.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
93d90bf33e doc: board: ti: j7200_evm: Convert the emmc layout to svg
Convert the emmc memory layout to svg

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
e19efb13c9 doc: board: ti: am65x_evm: Convert the emmc layout to svg
Convert the emmc memory layout to svg

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
757836d95a doc: board: ti: am65/j721e: Convert OSPI memory map to svg
Convert the memory map for OSPI as a common memory map

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:38 +02:00
Nishanth Menon
fc5b2b8ee5 doc: board: ti: am65x_evm: Convert the UART boot responsibility to list table
Use list tables to map up the UART Boot responsibility table.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
f940ec2f5e doc: board: ti: j7200_evm: Convert switch settings to list tables
Use list tables to map up the dip switch settings

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
36ed8fbf40 doc: board: ti: am62x_sk: Convert switch settings to list tables
Use list tables to map up the dip switch settings

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
d7c3ca985c doc: board: ti: am62x_sk: Add labels to reuse memory map
Add labels around the A53 SPL DDR memory layout to be able to reuse the
memory map.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
34f76921d8 doc: board: ti: am62x: Convert the image format to svg
Convert the image format into svg that can be reused across platforms as
needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
654dceddcf doc: board: ti: am65x: Convert the image format to svg
Convert the image format into svg that can be reused across platforms as
needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
3b83dff183 doc: board: ti: j721e: Convert the image format to svg
Convert the image format into svg that can be reused across platforms as
needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
f4ade09a1e doc: board: ti: j7200: Convert the image format to svg
Convert the image format into svg that can be reused across platforms as
needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
c727b81d65 doc: board: ti: k3: Reuse build instructions
Introduce common variables to define a generic build instruction that is
then used in specific board specific description.

Labels are introduced in the evm.rst files to be then reused in variant
board documentation as well.

While at this, drop using ARCH=arm when building u-boot sources. This
practice has been discouraged for some time and can potentially create
problems with Kconfig rules related to aarch64. It's best to avoid
this approach.

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
9e30ebc983 doc: board: ti: j721e: Update with boot flow diagram
Update the bootflow svg diagram instead of the ascii version

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
fd358121bd doc: board: ti: am65x: Update with boot flow diagram
Update the bootflow svg diagram instead of the ascii version

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
68b3baaf3b doc: board: ti: am62x/j7200: Update with common boot flow diagram
Update the bootflow svg diagram and reuse across the platforms as they
are common.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Nishanth Menon
cce3e7a23d doc: board: ti: Optimize sources references
We have duplication of sources which makes it hard to sustain across the
board, but at the same time, we'd like to ensure readers get specific
information without having to cross refer to different documentation to
get piecemeal information that they need to put together.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-07-28 11:36:37 +02:00
Tom Rini
f687c8f7b4 doc: ti: Clarify required file names for K3 platforms
Now that we are using binman in all cases on these platforms, reword
things to be clearer that for filesystem booting we need to use a
specific name for each component.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-28 11:36:37 +02:00
Heinrich Schuchardt
8505c0bb5c doc: describe QEMU emulation of block devices
* Add a new page about the emulation of block devices
* Add semihosting to the emulation index page
* Set toc maxdepth to 1 to improve readability

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-28 11:36:37 +02:00
Tom Rini
45622f3262 Merge branch '2023-07-22-TI-K3-improvements'
- Actually merge the assorted K3 platform improvements that were
  supposed to be in commit 247aa5a191 ("Merge branch
  '2023-07-21-assorted-TI-platform-updates'")
2023-07-24 13:55:59 -04:00
Tom Rini
590a6cff97 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Set up per-hart stack before any function call
- Sync visionfive2 board DTS with Linux
- Define cache line size for USB 3.0 driver for RISC-V CPU
2023-07-24 10:58:07 -04:00
Chanho Park
9070496794 doc: visionfive2: apply a trailing space to the prompt
Apply the trailing space changes in the guide document.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-24 13:22:02 +08:00
Manorit Chawdhry
a5e8678e0a configs: k3: Remove saved environments
Having saved environments usually causes inconsistencies while in
development workflow. The saved environments conflict with the
default ones that U-boot should be updating during development
but that doesn't happen and the saved environments need to be
reset during bootups to test the changes causing extra debugs.

Remove the saved environments as a default. Environments can always
be re-enabled locally if one does like them or needs them for
some production environment. Optionally, Uenv.txt can also be used on
some of the boot media.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 20:35:48 -04:00
Neha Malcom Francis
1ee652ab2f doc: board: ti: Update documentation for binman flow
Earlier documentation specified builds for generating bootloader images
using an external TI repository k3-image-gen and core-secdev-k3. Modify
this to using the binman flow so that user understands how to build the
final boot images.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Nikhil M Jain
a72532fa19 doc: board: ti: am62x_sk: Add A53 SPL DDR layout
To understand usage of DDR in A53 SPL stage, add a table showing region
and space used by major components of SPL.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-07-21 15:32:12 -04:00
Tom Rini
f6da5e9273 u-boot-imx-20230713
-------------------
 
 Merge for 2023.10.
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16888
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Merge tag 'u-boot-imx-20230713' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20230713
-------------------

Merge for 2023.10.

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16888
2023-07-13 20:38:24 -04:00
Yannic Moog
8a81326d79 doc: board: phytec: add phycore_imx8mp
Add documentation on how to build a bootable U-Boot image for the PHYTEC
phyCORE-i.MX 8M Plus.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
2023-07-13 11:29:40 +02:00
Yannic Moog
b3fad71647 doc: board: phytec: add phycore_imx8mm
Add documentation on how to build a bootable U-Boot image for the PHYTEC
phyCORE-i.MX 8M Mini.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
2023-07-13 11:29:40 +02:00
Yixun Lan
478fedfda4 doc: t-head: lpi4a: document Lichee PI 4A board
Reviewed-by: Wei Fu <wefu@redhat.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2023-07-12 13:21:41 +08:00
Yanhong Wang
ed3ff429c3 doc: board: starfive: Reword the make defconfig information
The defconfig file name for StarFive VisionFive2 has been changed, and
the documentation description has also changed.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-12 13:21:40 +08:00
Adam Ford
89c30846f8 imx8m: imx8mn-beacon: Migrate README to rst
Since U-Boot builds HTML documentation, migrate the contents
of the README file to an rst file which can generate the
proper outputs.

Signed-off-by: Adam Ford <aford173@gmail.com>
2023-07-11 14:40:05 +02:00
Adam Ford
e6ac438d16 imx8m: imx8mm-beacon: Migrate README to rst
Since U-Boot builds HTML documentation, migrate the contents
of the README file to an rst file which can generate the
proper outputs.

Signed-off-by: Adam Ford <aford173@gmail.com>
2023-07-11 14:40:05 +02:00
Tim Harvey
79e315761c board: gateworks: venice: update board doc to show other emmc parts
Update the venice board documentation to show how to install to the
various eMMC hardware partitions available as the same binary firmware
can be placed in either user/boot0/boot1 without build-time config
changes. Note that the boot offsets differ depending on the SoC and the
eMMC hardware partition.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-07-11 14:40:03 +02:00
Conor Dooley
5566cf2a6d riscv: dts: drop microchip from dts filenames
The original names picked for the DT doesn't match Linux's naming scheme
and it was renamed there a while ago. Rename it in U-Boot to allow
easily syncing dts between the two projects.

Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-06 17:28:08 +08:00
Ferass El Hafidi
1444acbd03 doc: boards: amlogic: add documentation for KII Pro
Add build instructions for the KII Pro set-top box.

Signed-off-by: Ferass El Hafidi <vitali64pmemail@protonmail.com>
Link: https://lore.kernel.org/r/20230507124109.31778-4-vitali64pmemail@protonmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28 10:05:34 +02:00
Tom Rini
7da82de916 Xilinx changes for v2023.10-rc1
global:
 - Use proper U-Boot project name
 
 Fix sparse warnings in zynqmp-clk, zynqmp handoff, board
 
 cmd:
 - Cover incorrect 0 length entries
 
 Versal NET:
 - Add bootmode logic
 - Support SPP production version
 - Add loadpdi command
 
 ZynqMP:
 - Clear pmufw node command ID handling
 - Change power domain behavior around zynqmp_pmufw_node()
 - Fix zynqmp cmd return values and pmufw command
 - Fix R5 tcm init and modes
 
 mmc:
 - Sync Versal NET emmc DT binding
 
 pcie:
 - Add support for ZynqMP PCIe root port
 
 video:
 - Add support for ZynqMP DP
 
 tools:
 - Fix debug message in relocate-rela
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Merge tag 'xilinx-for-v2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2023.10-rc1

global:
- Use proper U-Boot project name

Fix sparse warnings in zynqmp-clk, zynqmp handoff, board

cmd:
- Cover incorrect 0 length entries

Versal NET:
- Add bootmode logic
- Support SPP production version
- Add loadpdi command

ZynqMP:
- Clear pmufw node command ID handling
- Change power domain behavior around zynqmp_pmufw_node()
- Fix zynqmp cmd return values and pmufw command
- Fix R5 tcm init and modes

mmc:
- Sync Versal NET emmc DT binding

pcie:
- Add support for ZynqMP PCIe root port

video:
- Add support for ZynqMP DP

tools:
- Fix debug message in relocate-rela
2023-06-12 16:42:37 -04:00
Tom Rini
260d4962e0 Merge tag v2023.07-rc4 into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-12 14:55:33 -04:00
Michal Simek
1be82afa80 global: Use proper project name U-Boot
Use proper project name in comments, Kconfig, readmes.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0dbdf0432405c1c38ffca55703b6737a48219e79.1684307818.git.michal.simek@amd.com
2023-06-12 13:24:31 +02:00
Jassi Brar
6b403ca4dc fwu: DeveloperBox: add support for FWU
Add code to support FWU_MULTI_BANK_UPDATE.
The platform does not have gpt-partition storage for
Banks and MetaData, rather it used SPI-NOR backed
mtd regions for the purpose.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-09 13:52:40 -04:00
Udit Kumar
db7af51020 doc: board: ti: add documenation for j7200
This patch adds documentation for j7200.

TRM link
https://www.ti.com/lit/pdf/spruiu1

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-06-01 12:32:03 -04:00
Manorit Chawdhry
6cfdf8270e Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region
In non-combined boot flow for K3, all the firewalls are locked by default
until sysfw comes up. Rom configures some of the firewall for its usage
along with the SRAM for R5 but the PSRAM region is still locked.

The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the
firewall exception before sysfw came up. The exception started happening
after adding multi dtb support that accesses the scratchpad for reading
EEPROM contents.

The commit changes R5 MCU scratchpad for j721e to an SRAM region.

Old Map:
┌─────────────────────────────────────┐ 0x41c00000
│                 SPL                 │
├─────────────────────────────────────┤ 0x41c40000 (approx)
│                STACK                │
├─────────────────────────────────────┤ 0x41c85b20
│             Global data             │
│  sizeof(struct global_data) = 0xd8  │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc
│                HEAP                 │
│  CONFIG_SYS_MALLOC_F_LEN = 0x70000  │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│               SPL BSS               │ (0x41cf5bfc)
│  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
			                (0x41cffbfc)

New Map:
┌─────────────────────────────────────┐ 0x41c00000
│                 SPL                 │
├─────────────────────────────────────┤ 0x41c40000 (approx)
│                EMPTY                │
├─────────────────────────────────────┤ 0x41c81920
│                STACK                │
│ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │
├─────────────────────────────────────┤ 0x41c85920
│             Global data             │
│  sizeof(struct global_data) = 0xd8  │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0
│                HEAP                 │
│  CONFIG_SYS_MALLOC_F_LEN = 0x70000  │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│               SPL BSS               │ (0x41cf59f0)
│  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
├─────────────────────────────────────┤ 0x41cff9fc
│         NEW MCU SCRATCHPAD          │
│  SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
			                (0x41cffbfc)

Fixes: ab977c8b91 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT")

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
[n-francis@ti.com: SRAM allocation addressing diagram]
Signed-off-by: Neha Francis <n-francis@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-30 15:13:43 -04:00
Ralph Siemsen
a5b9f95943 doc: renesas: add Renesas board docs
As a starting point, list all currently supported Renesas boards.

For the RZ/N1 board, add details about booting and flashing.

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-05-13 04:24:05 +02:00
Simon Glass
b6b33d104d x86: coreboot: Document how to enable the debug UART
This is not obvious so add a little note about how it works.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-05-11 10:25:29 +08:00
FUKAUMI Naoki
e62ba9016e doc: rockchip: update list of Radxa ROCK (Pi) 4 boards
add Radxa ROCK (Pi) 4 variants.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-09 22:50:01 +08:00
Chris Morgan
6cf6fe2537 board: rockchip: add Anbernic RGXX3 Series Devices
The Anbernic RGxx3 is a "pseudo-device" that encompasses the following
devices:

 - Anbernic RG353M
 - Anbernic RG353P
 - Anbernic RG353V
 - Anbernic RG353VS
 - Anbernic RG503

The rk3566-anbernic-rgxx3.dtsi is synced with upstream Linux, but
rk3566-anbernic-rgxx3.dts is a U-Boot specific devicetree that
is used for all RGxx3 devices.

Via the board.c file, the bootloader automatically sets the correct
fdtfile, board, and board_name environment variables so that the
correct devicetree can be passed to Linux. It is also possible to
simply hard-code a single devicetree in the boot.scr file and use
that to load Linux as well.

The common specifications for each device are:

 - Rockchip RK3566 SoC
 - 2 external SDMMC slots
 - 1 USB-C host port, 1 USB-C peripheral port
 - 1 mini-HDMI output
 - MIPI-DSI based display panel
 - ADC controlled joysticks with a GPIO mux
 - GPIO buttons
 - A PWM controlled vibrator
 - An ADC controlled button

All of the common features are defined in the devicetree synced from
upstream Linux.

TODO: DSI panel auto-detection for the RG353 devices (requires porting
of DSI controller driver and DSI-DPHY driver to send DSI commands to
the panel).

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-05-06 17:45:05 +08:00
Heinrich Schuchardt
d1474f5aa0 doc: correct HiFive Unmatched boot description
Main U-Boot is loaded by sector number, not by partition GUID type.

Fixes: 70415e1e52 ("board: sifive: add HiFive Unmatched board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-05-04 09:57:43 +02:00
Heinrich Schuchardt
eb59b9e88b doc: fix StarFive VisionFive v2 documentation
The number of the partition that U-Boot SPL loads the main U-Boot from is
defined as 2 by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2. The
partition type GUID is not used currently.

Reword the description of the boot process to make it clearer.

Fixes: 5ecf9b0b8a ("board: starfive: add StarFive VisionFive v2 board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-05-04 09:57:43 +02:00
Heinrich Schuchardt
e942fabe8a doc: Indicate required OpenSBI release for VisionFive 2
Support for the VisionFive 2 board is not contained in the most recent
OpenSBI release (v1.2).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-05-04 09:57:43 +02:00
Tom Rini
2440719d25 u-boot-imx-20230503
-------------------
 
 - Fixes for : pico-imx6ul, smegw01
 - new boards: DMSSE20, Reform 2
 - fix: get_boot_device, PLL video rate
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16211
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Merge tag 'u-boot-imx-20230503' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20230503
-------------------

- Fixes for : pico-imx6ul, smegw01
- new boards: DMSSE20, Reform 2
- fix: get_boot_device, PLL video rate

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16211
2023-05-03 13:15:12 -04:00
Bhupesh Sharma
20cbfd680f board: Fix documentation for Snapdragon based Samsung and Qualcomm boards
The current documentation for Snapdragon based Samsung
and Qualcomm boards is vague in the sense that at one place
it mentions that u-boot  can be used as a replacement for ABL
bootloader and at another it mentions that u-boot is loaded
as an Android boot image through ABL.

Fix the same.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2023-05-03 09:05:22 -04:00