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19 commits

Author SHA1 Message Date
Simon Glass
da2c1b8fd9 x86: apl: Generate required ACPI tables
Add support for generating various ACPI tables for Apollo Lake. Add a few
S3 definitions that are needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:19 +08:00
Simon Glass
db17e40cca x86: apl: Re-enable loading of SPL
At present the SPL loader is not included in the TPL image so SPL cannot
be loaded. Fix it by including this file for both SPL and TPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: c87f9ce227 ("x86: Don't build some unused objects in TPL")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-09 12:33:24 +08:00
Tom Rini
c87f9ce227 x86: Don't build some unused objects in TPL
In the future if we have separate symbols for DM_SPI_FLASH and
SPL_DM_SPI_FLASH we will not always have function declarations available
for some DM calls.  This in turn leads to build warnings but not
failures as the code isn't used and is discarded at link time.
Restructure things to not build code we won't use for TPL anyways.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Bernhard Messerklinger
1fa6305fd6 x86: apl: Use devicetree for FSP-M configuration
A the moment the FSP-M configuration is a mix of hard coded values and
devicetree properties.

This patch makes FSP-M full configurable from devicetree by adding
binding properties for all FSP-M parameters.

Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral)
[sjg: Fix a build error for coral]
Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: Add __maybe_unused to fsp_update_config_from_dtb()]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-05-27 14:40:09 +08:00
Wolfgang Wallner
2999846c11 x86: Move P2SB from Apollo Lake to a more generic location
The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
move its driver to a common location within arch/x86.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:41:24 +08:00
Wolfgang Wallner
43709fa088 x86: Move itss.c from Apollo Lake to a more generic location
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
move it to a common location within arch/x86.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: conditionally build itss.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 12:01:08 +08:00
Simon Glass
2153e8fbfc x86: apl: Add FSP support
The memory and silicon init parts of the FSP need support code to work.
Add this for Apollo Lake.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:30 +08:00
Simon Glass
46c674bfde x86: apl: Add P2SB driver
Adds a driver for the Apollo Lake Primary-to-sideband bus. This supports
various child devices. It supposed both device tree and of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:29 +08:00
Simon Glass
4dc0ab3551 x86: apl: Add SPL/TPL init
Add code to init the system both in TPL and SPL. Each phase has its own
procedure.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:29 +08:00
Simon Glass
6a4c237af9 x86: apl: Add a CPU driver
Add a bare-bones CPU driver so that CPUs can be probed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:29 +08:00
Simon Glass
409d4c6fe9 x86: apl: Add SPL loaders
Add loaders for SPL and TPL so that the next stage can be loaded from
memory-mapped SPI or, failing that, the Fast SPI driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:29 +08:00
Simon Glass
f5b18ae309 x86: apl: Add PUNIT driver
Add a driver for the Apollo Lake P-unit (power unit). It is modelled as a
syscon driver since it only needs to be probed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:28 +08:00
Simon Glass
40fb08e917 x86: apl: Add PCH driver
Add a driver for the Apollo Lake Platform Controller Hub. It does not have
any functionality and is just a placeholder for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:28 +08:00
Simon Glass
8bd5dcd895 x86: apl: Add LPC driver
This driver the LPC and provides a few functions to set up LPC features.
These should probably use ioctls() or perhaps, better, have specific
uclass methods.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:28 +08:00
Simon Glass
3a02f699fa x86: apl: Add ITSS driver
This driver models some sort of interrupt thingy but there are so many
abreviations that I cannot find out what it stands for. Possibly something
to do with interrupts.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:27 +08:00
Simon Glass
e5fb75c9ba x86: apl: Add hostbridge driver
This driver models the hostbridge as a northbridge. It simply sets up the
graphics BAR. It supports of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:27 +08:00
Simon Glass
bd47209743 x86: apl: Add systemagent driver
This driver handles communication with the systemagent which needs to be
told when U-Boot has completed its init.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:27 +08:00
Simon Glass
7656582378 x86: apl: Add UART driver
Add a driver for the Apollo Lake UART. It uses the standard ns16550 device
but also sets up the input clock with LPSS and supports configuration via
of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:26 +08:00
Simon Glass
28eefefccf x86: apl: Add PMC driver
Add a driver for the Apollo Lake SoC. It supports the basic operations and
can use device tree or of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:26 +08:00