Commit graph

39437 commits

Author SHA1 Message Date
Tom Rini
06066a7df9 configs: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-20 09:30:07 -04:00
Masahiro Yamada
9b1b6d4225 Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"
This reverts commit 90c08d9e08.

I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much.  8KB memory for SPL is
actually too big for some boards.  Perhaps 0x800 is enough, but the
situation varies board by board.

Let's postpone our decision until we come up with a better idea.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-19 15:20:09 -04:00
Tom Rini
00709f5697 A20-OLinuXino-Lime2: Enable USB gadget support
Based on A13-OLinuXino, enable DFU and UMS support.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-09-19 11:37:06 -04:00
Tom Rini
9a6535e05f Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2016-09-18 14:05:30 -04:00
Tom Rini
b58d351244 Merge branch 'master' of git://www.denx.de/git/u-boot-sunxi 2016-09-18 14:05:29 -04:00
Tom Rini
a7a97fddb3 Merge branch 'master' of git://www.denx.de/git/u-boot-arc 2016-09-18 14:05:28 -04:00
Masahiro Yamada
f9d7e17e84 ARM: uniphier: update DRAM init code for LD20 SoC
Import the latest version from the Diag software.

  - Support LD21 SoC (including DDR chips in the package)
  - Per-board granule adjustment for both reference and TV boards
  - Misc cleanups

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:12:26 +09:00
Masahiro Yamada
682e09ff9f ARM: uniphier: add PLL init code for LD20 SoC
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper.  Split the common code into pll-base-ld20.c for easier
re-use.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:12:26 +09:00
Masahiro Yamada
fcc238baee ARM: uniphier: collect clock/PLL init code into a single directory
Now PLLs for DRAM controller are initialized in SPL, and the others
in U-Boot proper.  Setting up all of them in a single directory will
be helpful when we want to share code between SPL and U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:06:47 +09:00
Masahiro Yamada
6a3e4274e4 ARM: uniphier: move PLL init code to U-Boot proper where possible
The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper.  Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:06:44 +09:00
Masahiro Yamada
22de6b3374 ARM: uniphier: rename CONFIG_DPLL_SSC_RATE_1PER
Basically, this should not be configured by users.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:47:27 +09:00
Masahiro Yamada
b78ffc53c5 ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20
This is the last code in the mach-uniphier/pinctrl/ directory.
Push the remaining code out to delete the directory entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:47:27 +09:00
Masahiro Yamada
68557ec37e ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20
Use the pin-mux data in the pinctrl drivers by directly calling
pinctrl_generic_set_state().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:47:18 +09:00
Masahiro Yamada
6bf12eaea4 ARM: dts: uniphier: include System Bus pin group node in SPL DT
This will be needed for setting up the System Bus pin-mux via the
LD11/LD20 pinctrl driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:10:46 +09:00
Masahiro Yamada
5ac9dfbe9d ARM: uniphier: consolidate NAND pin-mux settings
The NAND subsystem has not supported the Driver Model yet, but the
NAND pin-mux data are already in the pinctrl drivers.  Use them by
calling pinctrl_generic_set_state() directly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:10:44 +09:00
Masahiro Yamada
6a93478b93 ARM: uniphier: remove ad-hoc pin-mux code for sLD3
These settings are nicely cared by the pinctrl driver now.  Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:10:37 +09:00
Masahiro Yamada
cd477c9def ARM: uniphier: remove redundant pin-muxing for EA24 pin of sLD3 SoC
This is enabled by default for all the supported boot modes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:10:36 +09:00
Masahiro Yamada
27350c922e ARM: uniphier: select PINCTRL and SPL_PINCTRL
Now all UniPhier SoCs support a pinctrl driver.  Select (SPL_)PINCTRL
since it is mandatory even for base use.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:10:35 +09:00
Masahiro Yamada
4475c0ca5f ARM: dts: uniphier: add pinctrl device node and pinctrl properties
DT-side updates to make pinctrl on sLD3 SoC really available.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:10:29 +09:00
Masahiro Yamada
24572db909 pinctrl: uniphier: add UniPhier sLD3 pinctrl driver
Add pin-mux support for UniPhier sLD3 SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:10:17 +09:00
Masahiro Yamada
bbb119800f pinctrl: uniphier: support 4bit-width pin-mux register capability
On LD4 SoC or later, the pin-mux registers are 8bit wide, while 4bit
wide on sLD3 SoC.  Support it for the sLD3 pinctrl driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:10:11 +09:00
Chen-Yu Tsai
ca7628a911 sunxi: Enable USB gadget support for Sinlinx SinA33
Sinlinx SinA33 has a USB OTG port, but VBUS is controlled manually from
a jumper pad.

Enable OTG in gadget mode, as well as the download gadget and related
functions.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-18 14:39:16 +02:00
Chen-Yu Tsai
28de49be57 sunxi: Enable USB host support for Sinlinx SinA33
Sinlinx SinA33 has 1 USB host port. Enable EHCI_HCD support for it.
Also enable USB mass storage support so we can access USB sticks.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-18 14:39:16 +02:00
Chen-Yu Tsai
01cf4a1af2 sunxi: Add mmc0 card detect pin for Sinlinx SinA33
Sinlinx SinA33 uses PB4 for mmc0 card detect.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-18 14:39:16 +02:00
Jelle van der Waa
348df5b92c sunxi: Add defconfig and dts for the NanoPi NEO
The NanoPi NEO is a simple h3 board with 512MB RAM, ethernet, one usb
and one usb OTG connector.

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-18 14:39:16 +02:00
Hans de Goede
7c22e26ec5 sunxi: musb: Re-init musb controller on repeated probe calls
With sunxi-musb musb_lowlevel_init() can fail when a charger; or no cable
is plugged into the otg port.

To avoid leaking the struct musb allocated by musb_init_controller()
on repeated musb_usb_probe() calls, we were caching its result.
But musb_init_controller() does more, such as calling sunxi_musb_init()
which enables the clocks.

Not calling sunxi_musb_init() causes the musb controller to stop working
after a "usb reset" since that calls musb_usb_remove() which disables the
clocks.

This commit fixes this by removing the caching of the struct returned
from musb_init_controller(), it replaces this by free-ing the allocated
memory in musb_usb_remove() and calling musb_usb_remove() on
musb_usb_probe() errors to ensure proper cleanup.

While at it also make musb_usb_probe() and musb_usb_remove() static.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-18 14:39:16 +02:00
Chen-Yu Tsai
57075a472a sunxi: musb: Power off OTG port VBUS when disabled
The Linux kernel musb driver expects VBUS to be off while initializing
musb. Having it on results in a repeating string of warnings, followed
by an unusable peripheral. The peripheral is only usable after
physically removing the OTG adapter, letting musb reset its state.

This partially reverts commit c9f8947e66 ("sunxi: usb-phy: Never
power off the usb ports")

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-09-17 14:37:40 +02:00
Hans de Goede
253e62bf4b sunxi: axp2xx: disable ldoio0/1 at boot
When cold-booting the ldoio0/1 regulators are always off / the
gpios are always at tristate. But when re-booting from android these
are sometimes on. Disable them at axp_init time (iow as early as possible)
to remove this difference between a cold boot and a reboot.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-09-17 14:37:39 +02:00
Simon Glass
371244cb19 Makefile: Give a build error if ad-hoc CONFIG options are added
New CONFIG options should be added via Kconfig. To help prevent new ad-hoc
CONFIGs from being added, give a build error when these are detected.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2016-09-16 17:27:24 -04:00
Simon Glass
eed921d923 Kconfig: Add a whitelist of ad-hoc CONFIG options
Add a list of ad-hoc CONFIG options that don't use Kconfig. This can be used
to check that new ones are not being added.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:24 -04:00
Simon Glass
696a91f2b0 Convert CONFIG_SPL_YMODEM_SUPPORT to Kconfig
Convert CONFIG_SPL_YMODEM_SUPPORT to Kconfig

Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:23 -04:00
Simon Glass
02e69a5db1 Convert CONFIG_SPL_WATCHDOG_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:23 -04:00
Simon Glass
f575cafb3b Convert CONFIG_SPL_USB_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:22 -04:00
Simon Glass
16e30e36bf Convert CONFIG_SPL_USB_HOST_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:22 -04:00
Simon Glass
972fc62151 Convert CONFIG_SPL_USBETH_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:21 -04:00
Simon Glass
f35ed9edf3 Convert CONFIG_SPL_SPI_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:21 -04:00
Simon Glass
e404ade42d Convert CONFIG_SPL_SPI_FLASH_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:20 -04:00
Simon Glass
e00f76cee9 Convert CONFIG_SPL_SERIAL_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:19 -04:00
Simon Glass
d1c44bd6cc Convert CONFIG_SPL_SATA_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:18 -04:00
Simon Glass
2253797d28 Convert CONFIG_SPL_POWER_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:18 -04:00
Simon Glass
98632b1fa7 Remove CONFIG_SPL_PINCTRL_SUPPORT
This option is not used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:17 -04:00
Simon Glass
fef718cee2 Convert CONFIG_SPL_ONENAND_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:17 -04:00
Simon Glass
7ace858bf1 Convert CONFIG_SPL_NOR_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:16 -04:00
Simon Glass
dce63c4928 Convert CONFIG_SPL_NET_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:15 -04:00
Simon Glass
8c24f9fcfd Convert CONFIG_SPL_NET_VCI_STRING to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NET_VCI_STRING

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:15 -04:00
Simon Glass
d6b9bd8923 Convert CONFIG_SPL_NAND_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:14 -04:00
Simon Glass
2fa0850877 Convert CONFIG_SPL_MUSB_NEW_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:14 -04:00
Simon Glass
95689da5a7 Convert CONFIG_SPL_MTD_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:13 -04:00
Simon Glass
989e1ced53 Convert CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:13 -04:00
Simon Glass
1fdf7c64ed Convert CONFIG_SPL_MMC_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:13 -04:00