At present driver model supports the IRQ uclass but there is no way to
request a particular interrupt for a driver.
Add a mechanism, similar to clock and reset, to read the interrupts
required by a device from the device tree and to request those interrupts.
U-Boot itself does not have interrupt-driven handlers, so just provide a
means to read and clear an interrupt. This can be useful to handle
peripherals which must use an interrupt to determine when data is
available, for example.
Bring over the basic binding file as well, from Linux v5.4. Note that the
older binding is not supported in U-Boot; the newer 'special form' must be
used.
Add a simple test of the new functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Allow this driver to be used in TPL by setting up the interrupt type
correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add an IRQ type to each driver and use irq_first_device_type() to find
and probe the correct one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There can be different types of interrupt controllers in a system and some
drivers may need to distinguish between these. In general this can be
handled using the device tree by adding the interrupt information to
device nodes.
However on x86 devices we have interrupt controllers which are not tied
to any particular device and not really used in U-Boot. These still need
to be inited, so a convenient method is to give each controller a type
and allow a particular controller type to be probed.
Add support for this in sandbox along with a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove the new bland line at EOF of test/dm/irq.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This config is not actually used here and in U-Boot it seems better to set
this using the device tree for each individual controller. The monolithic
config of the FSP-S is only necessary if the FSP is actually configuring
something, but here it is not.
The FSP-S does enable/disable the various I2C ports. It might be nice to
handle this using the okay/disabled property of each port, but that can be
considered later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable the Intel clock driver and modify coral's device tree to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
So far we have avoided adding a clock driver for Intel devices. But the
Designware I2C driver needs a different clock (133MHz) on Intel devices
than on others (166MHz). Add a simple driver that provides this
information.
This driver can be expanded later as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Now that we have uclass_first_device_drvdata(), use it from the I2C driver
to reduce code duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Now that we have uclass_first_device_drvdata(), use it from syscon to
reduce code duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is sometimes useful to find a device in a uclass using only its driver
data. The driver data often indicates the 'subtype' of the device, e,g,
via its compatible string.
Add a function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we have uclass_foreach_dev() which requires that uclass_get()
be called beforehand to find the uclass. This is good if we suspect that
that function might fail, but often we know that the uclass is available.
Add a new helper which does this uclass_get() automatically, so that only
the uclass ID is needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
move its driver to a common location within arch/x86.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This partially reverts changes by commit 2cc393f32f
("video: make BPP and ANSI configs optional") since it
caused issues with other boards (missing LCD console
output on pinebook, x86 platform or sandbox). Enable
all disabled options again and opt out of not supported
color depth in board defconfigs.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Vagrant Cascadian <vagrant@debian.org>
- add dfu support to dwc2 for bcm2835
- enable DFU for RPi4
- Fix RPi4 memory map to include the genet device
- add driver for the genet ethernet device
- enable network support in RPi4 config
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl43/6QSHG1icnVnZ2Vy
QHN1c2UuY29tAAoJEC9tfk32wqh+Fq0P/1vCbkiRgOtOIMPh/b7qWUVweTdgwcbf
9v8Qa2IKc0FYgjYjIMjihfbvF7R0vGaOUX13yKDV/3v42cpLkOxBauCYasiXznI+
9hBwKfOFPzLpSz3SJ+LRn0XhHSAZ1jcT19pgaPmA5Pry6l7JEai4M3JFeYeJRWOt
N1EFqxqqeAQ+eXdQWXTKh6AiFEia7aL4OVcU5HY9BMyDW8H13gvNejoeSXNKLupM
GGHJfG/TRKHP5UJoqH+I9XFdkUKfN4e1oWpxl7nA5HpvRfFgO+AQm9OgM2xumnGp
+4kS4T5FexCrcQ37m5fG9+LSxk2PB8+P0kmfImaO54lUdAtjB+iqg4RUB7eN/vLH
37S13AB7T8OTjbe8tlLCjGDXQ/8xU+NDZQsE9GnRmaj2UbK57hJPW6kTRgwK4BEZ
l0Rr9RrHlhrBvywHMII11fhH+wVO0R29GFvRZSSscRqvKq61FF//r8hNQX7xtErf
+OIEgIcEt9bbLyq7LJQ+2xRdQj4UgSv5/poaaoWX+uY4+yUElbiPpTJLN2oslZ8x
liUKigWmTgF8G1ukalyA1u3xj0kyfl4QCxoJpNqoaHg9sel0S5igGE0dLzKXUKSw
1A7BCT0rO/FhoMxc7P4kHjpIKlw6Tatw1wJY3g8VzRgEsXlTawNszadO1jswBmHV
9XFk+iH6f/rg
=Sv9b
-----END PGP SIGNATURE-----
Merge tag 'rpi-next-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- DFU support file operations lager then the default max size
- add dfu support to dwc2 for bcm2835
- enable DFU for RPi4
- Fix RPi4 memory map to include the genet device
- add driver for the genet ethernet device
- enable network support in RPi4 config
- Various minor fixes for x86
- Switch to ACPI mode on Intel edison
- Support run-time configuration for NS16550 driver
- Update coreboot and slimbootloader serial drivers to use NS16550
run-time configuration
- ICH SPI driver fixes to hardware sequencing erase case
- Move ITSS from Apollo Lake to a more generic location
- Intel GPIO driver bug fixes
- Move to vs2017-win2016 platform build host for Azure pipelines
Inside Kconfig we must not use the CONFIG_ prefix with the imply statement.
Fixes: 28e3c39e53 ("board: freescale: ls1012a2g5rdb: enable network
support on ls1012a2g5rdb")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Updates the secure boot headers offsets of Kernel and other
firmware images for SD and NOR boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Updates the secure boot headers offsets of Kernel and other
firmware images for SD and QSPI boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Updates the secure boot headers offsets of Kernel and other
firmware images for SD and XSPI boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Updates the secure boot headers offsets of Kernel and other
firmware images used by esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Updates the secure boot headers offsets of Kernel and other
firmware images for SD and QSPI boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The default reserved memory for CMA is high memory. If LPAE is enabled,
highmem pages are non-remapped and can not be used with
dma_alloc_coherent. This patch will reserve low memory for CMA and fix
the issue on LS1021A.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1021A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1012A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
leaves U-Boot with not enough memory to load i2c driver
before relocate, causing it to hang.
Change the default value of CONFIG_SYS_MALLOC_F_LEN
for below SoCs,
- LS1012A
- LS1021A
- LS1043A
- LS1046A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This adds DM_FLAG_PRE_RELOC flag to probe i2c driver
before relocation
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix below SPL build error when DM_I2C is enabled,
- arch/arm/cpu/armv8/built-in.o: In function `board_init_f:
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74: undefined reference to `i2c_init_all'
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:(.text.board_init_f+0x30):
relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol
`i2c_init_all'
make[2]: *** [spl/u-boot-spl] Error 1
make[1]: *** [spl/u-boot-spl] Error 2
make: *** [sub-make] Error 2
arch/arm/cpu/armv8/fsl-layerscape/spl.c: In function 'board_init_f':
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:2: warning: implicit
declaration of function 'i2c_init_all'; did you mean 'misc_init_r'?
[-Wimplicit-function-declaration]`
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable FSPI controller support. So, flash environment can now be used
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add support of "qixis_reset emmc" command for lx2160a based platforms
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Sync the interrupt properties with the ones from Linux. Also use the
constants provided by the dt-bindings header. Please note, that there
are actual changes/fixes in the irq flags. U-Boot won't use the
interrupt properties anyway. It's just to be consistent with the Linux
device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Also align the fspi node with the kernel one.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Azure is moving to remove the vs2015-win2012r2 platform build host. The
two suggested new platforms to use are vs2017-win2016 and windows-2019.
For now, move up to vs2017-win2016.
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Fix the following in intel_gpio_get_value():
* The value of the register is contained in the variable 'reg', not in
'mode'. The variable 'mode' contains only the configuration whether
the gpio is currently an input or an output.
* The correct bitmasks for the input and output value are
PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE.
Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and
PAD_CFG0_TX_STATE_BIT.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32().
Otherwise this bit cannot be cleared again after it has been set once.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The function pcr_clrsetbits32() expects a device with a P2SB parent
device. In intel_gpio_direction_output() and intel_gpio_set_value()
the device 'dev' is passed to pcr_clrsetbits32(), which is a
gpio-controller with a device 'pinctrl' as parent. This does not match
the expectations of pcr_clrsetbits32(). But the 'pinctrl' device has a
P2SB as parent.
Pass the 'pinctrl' device instead of the 'dev' device to
pcr_clrsetbits32().
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
remove the apl-prefix of the implemented functions/structures/...
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a Kconfig option to support enabling/disabling the inclusion of
the ITSS driver depending on the platform.
Atuomatically select the ITSS driver when building for Apollo Lake.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/patch/1232761/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
move it to a common location within arch/x86.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: conditionally build itss.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The watchdog timer value was never updated in the hardware by this
driver, so the watchdog triggered on some random stale value that
was left in the hardware. The TI SPRUH37C says, quote:
20.4.3.9 Modifying Timer Count/Load Values and Prescaler Setting
...
After a write access, the load register value and prescaler ratio
registers are updated immediately, but new values are considered
only after the next consecutive counter overflow or after a new
trigger command (the WDT_WTGR register).
This means at least one trigger must happen. The driver probably
depended on someone calling it's .reset() callback, however that
is not guaranteed e.g. if the WDT operates without servicing.
Add this missing trigger.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The timeout parameter of omap3_wdt_start() is in miliseconds, while
GET_WLDR_VAL() expects parameter in seconds. Fix this so the WDT
driver is actually usable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
