Added new CONFIG options for the three type of MAC-PHY interconnect and
applied them all relevant board config files
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30
clock cycles, so it's been mostly working. But we had no guarantee, and at
slower bitrates, it's just over a microsecond (over 1000 clock cycles). This
enforces a 2 microsecond gap between assertion and deassertion.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
100Mbs ethernet does not work on sh7763 chips due to the wrong value being
used in the GECMR register. Following diff fixes the problem
Signed-off-by: Simon Munton <simon@nidoran.m5data.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Driver for Dave DNET ethernet controller (used on Dave/DENX
QongEVB-LITE board).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Modified mii_init to support boards with PHYs that are not set to
autonegotiate, but still want to use u-boot's mii commands to probe
the smi bus. Such PHYs will not set the Autonegotiate-done bit.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Redo how pointers are managed to get rid of ugly casts and strict pointer
aliasing issues that are highlighted by gcc 4.3.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
No point in having a Blackfin-specific define "CONFIG_BFIN_MAC_RMII" that
does exactly the same thing as common "CONFIG_RMII".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather then defining our own DEBUGF(), just use the common debug().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather than having the on-chip MAC hardcoded to phy address 1 and a speed
of 2.5mhz, use these as defaults if the board doesn't specify otherwise.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Cleanup and rewrite the MII/PHY related functions so that we can reuse the
existing common linux/miiphy.h code and hook into the `mii` command.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather than hardcoding MDCDIV to 24 (which is correct for ~125mhz SCLK),
use the real algorithm so it gets set correctly regardless of SCLK.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds support for searching through available PHY-addresses in
the macb-driver. This is needed for the ATEVK1100 evaluation board,
where the PHY-address will be initialized to either 1 or 7.
This patch adds a config option, CONFIG_MACB_SEARCH_PHY, which when
enabled tells the driver to search for the PHY address.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adjusts the LED control so that interrupt lines are not reading LEDs
and effectively causing indefinite interrupts to the controller.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
sh_eth used old network API. This patch changed new API.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch changes the reg_read/_write to smc911x_reg_read/_write
and defines then as weak so that they can be overridden by board
specific version.
This will be used by the upcoming VCTH board support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch tries to ensure that phy interrupt pin
won't be asserted after booting. We experienced
following issues with current 88E1121R phy init:
Marvell 88E1121R phy can be hardware-configured
to share MDC/MDIO and interrupt pins for both ports
P0 and P1 (e.g. as configured on socrates board).
Port 0 interrupt pin will be shared by both ports
in such configuration. After booting Linux and
configuring eth0 interface, port 0 phy interrupts
are enabled. After rebooting without proper eth0
interface shutdown port 0 phy interrupts remain
enabled so any change on port 0 (link status, etc.)
cause assertion of the interrupt. Now booting Linux
and configuring eth1 interface will cause permanent
phy interrupt storm as the registered phy 1 interrupt
handler doesn't acknowledge phy 0 interrupts. This
of course should be fixed in Linux driver too.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
All CF platforms' mii.c are consolidated into one
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Also changed path in all linker scripts that reference this driver
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Patch to fix buffer allocation size and alignment. Buffer needs to be u32 aligned and
PKTSIZE_ALIGN bytes long.
Acked-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Currently VSC8601 doesn't link with 10/100M partners if the
EEPROM/Strapping is not set up.
Setting the auto-neg register fixes this.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
get_prom function was used __attriute__ , but it is not enable.
ax88796.o does not do link besides ne2000.o. When ld is carried
out, get_prom function of ax88796.c is ignored.
This problem is a thing by specifications of ld.
I checked and test this patch on SuperH and MIPS.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Fix TBI PHY accesses to use the proper offset in CPU register space. The
previous code would incorrectly access the TBI PHY by reading/writing to CPU
register space at the same location as would be used to access external PHYs.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
The RSK7203 board has the SMSC9118 wired up 'incorrectly'.
Byte-swapping is necessary, and so poor performance is inevitable.
This problem cannot evade by the swap function of CHIP, this can
evade by software Byte-swapping.
And this has problem by FIFO access only. pkt_data_pull/pkt_data_push
functions necessary to solve this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Modified board_eth_init() functions of boards that have this FEC in addition
to other Ethernet controllers.
Affected boards:
bc3450
icecube
mvbc_p
o2dnt
pm520
total5200
tq5200
Removed initialization of controller from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Affected boards:
hidden_dragon
MPC8544DS
MPC8610HPCN
R2DPLUS
TB0229
Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
