Commit graph

11290 commits

Author SHA1 Message Date
Marek Behún
80af1a9ef6 arm64: mvebu: Add basic support for the Turris Mox board
This adds basic support for the Turris Mox board from CZ.NIC, which is
currently being crowdfunded on Indiegogo.

Turris Mox is as modular router based on the Armada 3720 SOC (same as
EspressoBin).

The basic module can be extended by different modules. The device tree
binary for the kernel can be dependent on which modules are connected,
and in what order. Because of this, the board specific code creates
in U-Boot a variable called module_topology, which carries this
information.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Tom Rini
9a66328a37 Merge git://git.denx.de/u-boot-tegra 2018-05-11 15:22:36 -04:00
Tom Rini
57a72d0560 SPDX: Correct SPDX tags from recent xilinx merge
Correct the SPDX tag format.

Fixes: 3b52847a45 ("Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-11 14:54:57 -04:00
Tom Rini
3b52847a45 Xilinx changes for v2018.07
microblaze:
 - Align defconfig
 
 zynq:
 - Rework fpga initialization and cpuinfo handling
 
 zynqmp:
 - Add ZynqMP R5 support
 - Wire and enable watchdog on zcu100-revC
 - Setup MMU map for DDR at run time
 - Show board info based on DT and cleanup IDENT_STRING
 
 zynqmp tools:
 - Add read partition support
 - Add initial support for Xilinx bif format for boot.bin generation
 
 mmc:
 - Fix get_timer usage on 64bit cpus
 - Add support for SD3.0 UHS mode
 
 nand-zynq:
 - Add support for 16bit buswidth
 - Use address cycles from onfi params
 
 scsi:
 - convert ceva sata to UCLASS_AHCI
 
 timer:
 - Add Cadence TTC for ZynqMP r5
 
 watchdog:
 - Minor cadence driver cleanup
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Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07

microblaze:
- Align defconfig

zynq:
- Rework fpga initialization and cpuinfo handling

zynqmp:
- Add ZynqMP R5 support
- Wire and enable watchdog on zcu100-revC
- Setup MMU map for DDR at run time
- Show board info based on DT and cleanup IDENT_STRING

zynqmp tools:
- Add read partition support
- Add initial support for Xilinx bif format for boot.bin generation

mmc:
- Fix get_timer usage on 64bit cpus
- Add support for SD3.0 UHS mode

nand-zynq:
- Add support for 16bit buswidth
- Use address cycles from onfi params

scsi:
- convert ceva sata to UCLASS_AHCI

timer:
- Add Cadence TTC for ZynqMP r5

watchdog:
- Minor cadence driver cleanup
2018-05-11 11:45:28 -04:00
Tom Rini
c590e62d3b Merge git://git.denx.de/u-boot-fsl-qoriq 2018-05-11 07:09:21 -04:00
Siva Durga Prasad Paladugu
d1f4e39d58 mmc: zynq_sdhci: Add support for SD3.0
This patch adds support of SD3.0 for ZynqMP.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 11:13:51 +02:00
Michal Simek
1d6c54ecb3 arm: zynqmp: Add ZynqMP minimal R5 support
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot.
This patch is adding minimal support to get U-Boot boot.
U-Boot on R5 runs out of DDR with default configuration that's why
DDR needs to be partitioned if there is something else running on arm64.
Console is done via Cadence uart driver and the first Cadence Triple
Timer Counter is used for time.

This configuration with uart1 was tested on zcu100-revC.

U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200)

Model: Xilinx ZynqMP R5
DRAM:  512 MiB
WARNING: Caches not enabled
MMC:
In:    serial@ff010000
Out:   serial@ff010000
Err:   serial@ff010000
Net:   Net Initialization Skipped
No ethernet found.
ZynqMP r5>

There are two ways how to run this on ZynqMP.
1. Run from ZynqMP arm64
tftpb 20000000 u-boot-r5.elf
setenv autostart no && bootelf -p 20000000
cpu 4 disable && cpu 4 release 10000000 lockstep
or
cpu 4 disable && cpu 4 release 10000000 split

2. Load via jtag when directly to R5

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:38:23 +02:00
Michal Simek
0478b0b9b6 arm64: zynqmp: Simplify boot_target variable composition
Call calloc for space allocation only at one location and include if/else
to sprintf. This will simplify run time device adding based on id aliases.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-05-11 09:23:43 +02:00
Nitin Jain
0678941ae5 arm64: zynqmp: Setup MMU map for DDR at run time
This patch fills the MMU map for DDR at run time based on information read
from Device Tree or automatically detected from static configuration.

The patch is needed because for systems which has for example 1GB of memory
but MMU map is 2GB there could be spurious accesses which was seen in past
when mapping is not fitting with actual memory installed.

Signed-off-by: Nitin Jain <nitin.jain@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
4490e013ee arm64: zynqmp: Wire watchdog internals
Enable watchdog in full U-Boot.

Similar changes were done by:
"arm: zynq: Wire watchdog internals"
(sha1: e6cc3b25d7)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
e00656b2a9 arm64: zynqmp: Reset FPD Watchdog on zcu100
Low level configuration didn't reset FPD Watchdog that's why accessing
it caused u-boot hang.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Siva Durga Prasad Paladugu
04ab29ab25 arm64: zynqmp: Add new defconfig for zc1275 revB
This patch enables support zc1275 revB board. It has
SD added compared to revA. The same configuration will
work for RevC boards aswell.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
0b4b82ad14 arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO
Now that showing silicon version is part of the CPU
info display, let's remove checkboard().

Note that the generic show_board_info() will still
show the DT 'model' property. For instance:

U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)

CPU:   Zynq 7z045
Silicon: v1.0
Model: Zynq ZC706 Development Board
I2C:   ready

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>,
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

mini configuration doesn't need to show this information.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Michal Simek
4aba5fb857 arm: zynq: Rework FPGA initialization
This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.

Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-11 09:23:43 +02:00
Tom Rini
f739fcd831 SPDX: Convert a few files that were missed before
As part of the main conversion a few files were missed.  These files had
additional whitespace after the '*' and before the SPDX tag and my
previous regex was too strict.  This time I did a grep for all SPDX tags
and then filtered out anything that matched the correct styles.

Fixes: 83d290c56f ("SPDX: Convert all of our single license tags to Linux Kernel style")
Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-10 20:38:35 -04:00
Fabio Estevam
53deb24dda board/freescale: Remove invalid fsl email addresses
These fsl email addresses are no longer valid and they do not have a
correspondent nxp.com entry.

Remove all invalid fsl email addresses and mark the boards as orphan.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-05-10 20:38:33 -04:00
Fabio Estevam
ba74491e24 p1022ds: Change Timur's email address
timur@freescale.com is not a valid email for quite some time, so change
it to Timur's updated email.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Timur Tabi <timur@tabi.org>
2018-05-10 20:38:33 -04:00
Lukasz Majewski
2dbd5cd966 bootcount: display5: spl: Extend DISPLAY5 board SPL to support bootcount checking
This patch is necessary for providing basic bootcount checking in the case
of using "falcon" boot mode in that board.

It forces u-boot proper boot, when we exceed the number of errors.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2018-05-10 20:38:32 -04:00
Marcel Ziswiler
71cb3d7c78 apalis_t30: fix optional pcie port reset for reliable pcie operation
Allow optionally bringing up the Apalis type specific 4 lane PCIe port
as well as the PCIe switch as found on the Apalis Evaluation board. In
order to avoid violating the PCIe reset timing do this by overriding the
tegra_pcie_board_port_reset() function. Note however that both the
Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe
port are also left disabled in the device tree by default.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:30 -07:00
Marcel Ziswiler
b4f9010428 apalis_t30: fix pcie port 0 and 1 pin muxing
Fix optional Apalis type specific 4 lane PCIe port 0 and Apalis PCIe
port 1 pin muxing.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:30 -07:00
Marcel Ziswiler
f1333417e8 apalis-tk1: fix pcie reset for reliable gigabit ethernet operation
It turns out that the current PCIe reset implementation in the PCIe
board init function is not quite working reliably due to PCIe reset
timing violations. Fix this by overriding the
tegra_pcie_board_port_reset() function.

Also allow optionally bringing up the PCIe switch as found on the Apalis
Evaluation board. Note however that the Apalis PCIe port is also left
disabled in the device tree by default.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-05-10 16:34:21 -07:00
Tom Rini
e8f80a5a58 Merge git://git.denx.de/u-boot-sunxi 2018-05-09 12:58:06 -04:00
Ashish Kumar
7d3a532d5d armv8: ls1088: Update 1900MT/s DDR timing to bring consistency
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Ashish Kumar
11d5f7d895 armv8: ls1088aqds: Enable mdio commands on u-boot prompt
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-05-09 09:17:51 -05:00
Mario Six
9a519dfe8a ihs_mdio: Make DM-compatible
Make the ihs_mdio driver DM-compatible, while retaining the old
functionality for not-yet-converted boards.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08 18:50:23 -04:00
Mario Six
9139ac9d49 ihs_mdio: Encapsulate register access
To prepare for DM conversion, encapsulate all register accesses in
function calls.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-05-08 18:50:22 -04:00
Eugen Hristev
528a42a795 board: sama5d27_som1_ek: Fix the USB vbus power
According to the REVB schematic, fix the USB vbus power enable pin.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Eugen Hristev
23dd6015ce board: sama5d2_ptc_ek: adjust the smc timings of nand
To fix the issue of write the rootfs.ubi, adjust the smc timings
configuration of the nand controller.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Ludovic Desroches
8ee54672df gpio: atmel_pio4: give a full configuration when muxing pins
When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:36 -04:00
Ludovic Desroches
9ab66d0d20 board: atmel: sama5d2_ptc_ek: update pin configuration for NAND
The drive strength has to be set to medium for the NAND data lines.
With a low drive, we can get some data corruption.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:35 -04:00
Neil Armstrong
f0f3762cb7 ARM: meson: rename GXBB to GX
Taking into account the Amlogic Family name starts with GX, including
the GXBB, GXL and GXM SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Tom Rini
4549e789c1 SPDX: Convert all of our multiple license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have multiple licenses (in
these cases, dual license) declared in the SPDX-License-Identifier tag.
In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
as per the Linux Kernel style document.  Note that parenthesis are
allowed so when they were used before we continue to use them.

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 10:24:31 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Jagan Teki
f3df7758b5 board: sunxi: sun8i-v40: Add Bananapi M2 Berry support
Banana Pi BPI-M2 Berry is a quad-core mini single board computer
built with Allwinner V40 SoC. It features
- Quad Core ARM Cortex A7 CPU V40
- 1GB of RAM .
- microSD/SATA port..
- onboard WiFi and BT
- 4 USB A 2.0 ports
- 1 USB OTG port
- 1 HDMI port
- 1 audio jack
- DC power port

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-07 11:33:19 +05:30
Keerthy
ebf48500df board: ti: am43: Fix DCDC3 voltage for epos-evm
A common voltage of 1.35V was being programmed for all am43 board
versions. EPOS-EVM Needs 1.20V for LPDDR2.

Fixes: fc69d47262 (“board: ti: AM43XX: Add ddr voltage rail configuration”)
Reported-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-06 13:35:40 -04:00
Trevor Woerner
1f154a6318 README.sandbox: small typos
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2018-05-06 13:35:40 -04:00
Tom Rini
9f881a590f Merge git://git.denx.de/u-boot-sh 2018-05-03 09:20:02 -04:00
Marek Vasut
699e831e15 ARM: rmobile: Contain CONFIG_ARCH_RMOBILE_BOARD_STRING
Pull the symbol from the boards and zap struct rmobile_sysinfo as they
are rather useless. The entire purpose of that whole machinery was to
print board name in the CONFIG_ARCH_RMOBILE_BOARD_STRING. Do that in a
far simpler and more contained manner.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 11:51:56 +02:00
Marek Vasut
3ce88cd7e1 ARM: rmobile: Fix CONFIG_RMOBILE_BOARD_STRING
Rename CONFIG_RMOBILE_BOARD_STRING to CONFIG_ARCH_RMOBILE_BOARD_STRING
to make things consistent, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-02 11:42:05 +02:00
Tom Rini
8b4a610af9 Merge git://git.denx.de/u-boot-mmc 2018-05-01 22:38:18 -04:00
Fabio Estevam
08ae21af96 MAINTAINERS: Switch nxp.com domain
freescale.com domain is no longer reachable, so switch the
maintainers' emails to nxp.com domain instead.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-05-01 22:38:10 -04:00
Jaehoon Chung
4f0a8bf669 samsung: board: init the s2mps11 pmic during booting time
Exynos5422 board has s2mps11 pmic.
If CONFIG_PMIC_S2MPS11 is enabled, it can initialize PMIC and Regulators
during booting time.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-05-02 10:57:43 +09:00
Chen-Yu Tsai
e9392b373a sunxi: Add Libre Computer Board ALL-H3-CC H5 ver.
This patch adds a device tree file for the H5 version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe2754412 ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and
has 4Gb DDR3 chips instead of 2Gb ones.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Chen-Yu Tsai
ad34951708 sunxi: Add Libre Computer Board ALL-H3-CC H2+ ver.
This patch adds a device tree file for the H2+ version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit afe2754412 ("sunxi: Add support for Libre Computer Board
ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and
has only two 2Gb DDR3 chips instead of four.

The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-01 10:15:58 +05:30
Tom Rini
b25f8e2112 Merge git://git.denx.de/u-boot-imx 2018-04-30 07:14:05 -04:00
Alex Kiernan
d4bb3b3762 spl: ti: Avoid serial calls when serial support is disabled
If CONFIG_SPL_SERIAL_SUPPORT is not set, then the build will fail:

board/ti/am335x/built-in.o: In function `spl_start_uboot':
board/ti/am335x/board.c:247: undefined reference to `serial_tstc'
board/ti/am335x/board.c:247: undefined reference to `serial_getc'

Avoid the calls to the serial functions in that case.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-04-28 18:32:23 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Marek Vasut
fe537802f1 ARM: rmobile: Fix PMIC address on E2 Silk
The PMIC is at 0x5a, fix the address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26 13:56:57 +02:00
Marek Vasut
bb6d2ff2ac ARM: rmobile: Update E2 Alt
The E2 Alt port was broken since some time. This patch updates
the E2 Alt port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26 13:54:39 +02:00
Marek Vasut
49aefe300a ARM: rmobile: Update M2-N Gose
The M2-N Gose port was broken since some time. This patch updates
the M2-N Gose port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-26 13:54:39 +02:00