Commit graph

9306 commits

Author SHA1 Message Date
Marek Vasut
ddfda552e7 configs: sandbox64: Enable PCI register multi-entry support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
PCI register multi-entry support. This fixes ut_dm_dm_test_pci_bus_to_phys
test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
eaa5b5d7d2 configs: sandbox64: Enable clock CCF driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
CCF and Sandbox CCF drivers. This fixes ut_dm_dm_test_clk_ccf test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
5d5d7e225d configs: sandbox64: Enable video 12x22 font support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
12x22 font support. This fixes ut_dm_dm_test_video_text_12x22 test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
539485fd9e configs: sandbox64: Enable video 16bpp and 24bpp support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
16bpp and 24bpp video support. This fixes ut_dm_dm_test_video_bmp16
and ut_dm_dm_test_video_bmp24 tests .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
d54c44b474 configs: sandbox64: Enable PINCTRL_SINGLE driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
PINCTRL single driver. This fixes ut_dm_dm_test_pinctrl_single test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
09c0b2e712 configs: sandbox64: Enable BUTTON_ADC driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
BUTTON ADC driver. This fixes ut_dm_dm_test_button_keys_adc test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
226ddc0dcc configs: sandbox64: Enable MC34708 driver
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
MC34708 PMIC driver. This fixes ut_dm_dm_test_power_pmic_mc34708_get test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
49147a0b0d configs: sandbox64: Increase console record size to 0x6000
Align the sandbox64 defconfig with sandbox defconfig. Increase the
console record size. This fixes ut_bootstd_bootflow_cmd_scan_e .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:27 -06:00
Marek Vasut
ff547a6bc2 configs: sandbox64: Enable SF bootdev
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
SPI NOT bootdev. This fixes ut_bootstd_bootdev_test_cmd_hunt test .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-20 15:55:26 -06:00
Jonas Karlman
e34efcf51d rockchip: rk3566-anbernic-rgxx3: Rename defconfig to include SoC name
Rename defconfig to include SoC name, use similar pattern as other
RK356x boards: <soc>-<name>.dts -> <name>-<soc>_defconfig

Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-18 10:25:03 -04:00
Tom Rini
2d8e7ac320 ARM: tegra: Changes for v2023.10-rc1
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
 has some other minor enhancements, such as enabling the poweroff command
 on several Tegra210 and Tegra186 boards.
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Merge tag 'tegra-for-2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-tegra

ARM: tegra: Changes for v2023.10-rc1

This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
2023-08-18 10:05:04 -04:00
Patrick Delaunay
284b08fb51 board: stm32mp1: add splash screen with stmicroelectronics logo
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on STMicroelectronics boards.

With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the
address indicated by splashimage and centered with "splashpos=m,m".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:35:55 +02:00
Andy Yan
bb38db086c rockchip: rk3568: Add EmbedFire Lubancat 2 support
LubanCat2 is a rk3568 based SBC from EmbedFire.

Specification:
- Rockchip rk3568
- LPDDR4/4X 1/2/4/8 GB
- TF scard slot
- eMMC 8/32/64/128 GB
- Gigabit ethernet x 2
- HDMI out
- USB 2.0 Host x 1
- USB 2.0 Type-C OTG x 1
- USB 3.0 Host x 1
- Mini PCIE interface for WIFI/BT module
- M.2 key for 2280 NVME
- 40 pin header

The dts file is sync from linux mainline.

Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12 10:17:59 +08:00
Peter Robinson
080030f276 rockchip: dts: rk3328: Add rng details to u-boot.dtsi
Add the rk3328 rng details to the u-boot.dtsi and
enable the RNG on the Rock64 to be able to provide
a random seed via UEFI.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
(Fix typo message)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12 10:13:14 +08:00
Peter Robinson
a13a7a0b45 config: rock64: enable efuse for stable mac addr
Enable the rockchip efuse driver on the Rock64 to
provide a stable ethernet address on the device.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12 10:13:06 +08:00
Shengyu Qu
7d79bed00c configs: starfive: Enable environment in SPI flash support
On Starfive Visionfive 2, the u-boot environment settings are saved to
on-board SPI flash. Enable relative configs by default and set offset
and size according to upstream linux dts.

Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-10 10:58:07 +08:00
Minda Chen
0665621386 configs: riscv: starfive: Add VF2 PCIe USB3 XHCI support
Add XHCI_PCI to enable usb3-host functions.
Also add usb command and keyboard config.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-10 10:58:01 +08:00
Simon Glass
cfa5934979 x86: Enable useful options for qemu-86
This build can be used to boot 32-bit standard-distro builds. Enable some
more options, so that all possible EFI UUIDs are decoded, we can search
memory for tables, support the full set of standard-boot features, have
full logging along with debug UART and can boot from CDROM media.

This mirrors a similar patch for qemu-x86_64

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Drop the unknown option from defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-09 23:31:12 +08:00
Simon Glass
1fa64e155d Revert "x86: Switch QEMU over to use the bochs driver"
Unfortunately the bochs driver does not currently work with distros.
It causes a hang between grub menu selection and the OS displaying
something.

Preliminary investigation shows that GRUB does not jump to the kernel
at all.

This reproduces reliably.

This reverts commit b8956425d5.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64
[Slightly modify the commit message about preliminary investigation]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-09 23:31:11 +08:00
Abdellatif El Khlifi
13f3470adc arm_ffa: efi: corstone1000: enable MM communication
turn on EFI MM communication

On Corstone-1000 platform MM communication between u-boot
and the secure world (Optee) is done using the FF-A bus.

Changes made are generated using savedefconfig.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
2023-08-08 10:23:32 -04:00
Abdellatif El Khlifi
a09852d862 arm_ffa: introduce sandbox FF-A support
Emulate Secure World's FF-A ABIs and allow testing U-Boot FF-A support

Features of the sandbox FF-A support:

- Introduce an FF-A emulator
- Introduce an FF-A device driver for FF-A comms with emulated Secure World
- Provides test methods allowing to read the status of the inspected ABIs

The sandbox FF-A emulator supports only 64-bit direct messaging.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-08-08 10:22:03 -04:00
Tom Rini
df8967435a configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-08-07 15:17:12 -04:00
Marcel Ziswiler
7d1a10659f board: toradex: add verdin am62 support
This adds initial support for the Toradex Verdin AM62 Quad 1GB WB IT
V1.0A module and subsequent V1.1 launch configuration SKUs. They are
strapped to boot from their on-module eMMC. U-Boot supports booting
from the on-module eMMC only, DFU support is disabled for now due to
missing AM62x USB support.

The device trees were taken straight from Linux v6.5-rc1.

Boot sequence is:
SYSFW ---> R5 SPL (both in tiboot3.bin) ---> ATF (TF-A) ---> OP-TEE
  ---> A53 SPL (part of tispl.bin) ---> U-boot proper (u-boot.img)

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-08-04 15:03:42 -04:00
Mathew McBride
02a85922bf board: traverse: ten64: adopt standard boot defaults
With the previous updates to the device tree, Ten64
can use Standard Boot 'out of the box'.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-08-03 09:40:50 -04:00
Mathew McBride
6af6677f01 board: ten64: disable watchdog autostart
The watchdog driver was previously enabled but not used
until U-Boot's fsl-ls1088a.dtsi was updated to describe them.

Some Linux distributions (e.g Debian 11) do not engage the
SP805 watchdogs, causing unexpected resets after boot.

To conserve the user experience, turn off the autostart,
and we will provide a mechanism to turn them on at boot
via env vars.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-08-03 09:40:50 -04:00
Mathew McBride
3c052f9b22 configs: ten64: enable NVME_PCI
This restores NVMe functionality after PCI(e) NVMe support
was split out from the NVMe driver.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-08-03 09:40:50 -04:00
Weijie Gao
bc4adc97cf board: mediatek: add MT7988 reference boards
This patch adds general board files based on MT7988 SoCs.

MT7988 uses one mmc controller for booting from both SD and eMMC,
and the pins of mmc controller booting from SD are also shared with
one of spi controllers.
So two configs are need for these boot types:

1. mt7988_rfb_defconfig - SPI-NOR, SPI-NAND and eMMC
2. mt7988_sd_rfb_defconfig - SPI-NAND and SD

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2023-08-03 09:40:50 -04:00
Heinrich Schuchardt
cd24d0722a riscv: sifive: initialize PCI on Unmatched
The Unmatched board is typically booted from NVMe which requires PCI.
When dropping to a console PCI is not initialized yet. 'pci enum' has to be
called.

Change the configuration to call  pci_init() in board_init_r().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-08-02 11:02:33 +08:00
Minda Chen
493c03f820 configs: starfive-jh7110: Add CONFIG_RTL8169
Add PCIe device rtl8169 net adapter driver support.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Mason Huo
cb2750e10b configs: starfive-jh7110: Add support for PCIe host driver
Add PCIe host driver and nvme driver in configure file.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-02 11:02:32 +08:00
Tom Rini
aaeaef2536 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- i2c-gpio: Correctly handle new {sda, scl}-gpios bindings (Chris)
- mvebu: x240: Use i2c-gpio instead of built in controller (Chris)
2023-08-01 10:17:23 -04:00
Jonas Karlman
1f54f71b18 board: rockchip: Add Radxa E25 Carrier Board
Radxa E25 is a network application carrier board for the Radxa CM3I SoM
with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key,
USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header.

Features tested on a Radxa E25 v1.4:
- SD-card boot
- eMMC boot
- USB host
- PCIe/Ethernet adapters is detected
- SATA

Device tree is imported from linux next-20230728.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
2023-07-31 20:34:32 +08:00
Jagan Teki
b6fd3c63f4 configs: rockchip: Enable USB2PHY for RK3328 boards
Enable USB2PHY for all RK3328 boards.

=> usb start
starting USB...
Bus usb@ff5c0000: USB EHCI 1.00
Bus usb@ff5d0000: USB OHCI 1.0
Bus usb@ff600000: generic_phy_get_bulk : no phys property
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@ff580000: USB DWC2
scanning bus usb@ff5c0000 for devices... 2 USB Device(s) found
scanning bus usb@ff5d0000 for devices... 1 USB Device(s) found
scanning bus usb@ff600000 for devices... 2 USB Device(s) found
scanning bus usb@ff580000 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Mass Storage (480 Mb/s, 500mA)
       TS-RDF5A Transcend 000000000009

  1  Hub (12 Mb/s, 0mA)
      U-Boot Root Hub

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 224mA)
       SanDisk Dual Drive 040130e3ee554b7078843f4eb331646

  1  Hub (480 Mb/s, 0mA)
  |   U-Boot Root Hub
  |
  +-2  Human Interface (12 Mb/s, 98mA)
       Logitech USB Receiver

=> dm tree -s
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 syscon        1  [ + ]   syscon                |-- syscon@ff450000
 phy           0  [ + ]   rockchip_usb2phy      |   `-- usb2phy@100
 clk           2  [ + ]   rockchip_usb2phy_clo  |       |-- usb480m_phy
 phy           1  [ + ]   rockchip_usb2phy_por  |       |-- otg-port
 phy           2  [ + ]   rockchip_usb2phy_por  |       `-- host-port
 sysinfo       0  [ + ]   sysinfo_smbios        |-- smbios
 usb           3  [ + ]   dwc2_usb              |-- usb@ff580000
 usb_hub       3  [ + ]   usb_hub               |   `-- usb_hub
 usb_dev_ge    0  [ + ]   usb_dev_generic_drv   |       `-- generic_bus_3_dev_2
 usb           0  [ + ]   ehci_generic          |-- usb@ff5c0000
 usb_hub       0  [ + ]   usb_hub               |   `-- usb_hub
 usb_mass_s    0  [ + ]   usb_mass_storage      |       `-- usb_mass_storage
 blk           2  [ + ]   usb_storage_blk       |           |-- usb_mass_storage.lun0
 partition     4  [ + ]   blk_partition         |           |   |-- usb_mass_storage.lun0:1
 partition     5  [ + ]   blk_partition         |           |   `-- usb_mass_storage.lun0:2
 bootdev       3  [   ]   usb_bootdev           |           `-- usb_mass_storage.lun0.bootdev
 usb           1  [ + ]   ohci_generic          `-- usb@ff5d0000
 usb_hub       1  [ + ]   usb_hub                   `-- usb_hub

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
5d334b70cc configs: Enable DWC3 USB 3.0 on RK3328 boards
Enable USB 3.0 in all RK3328 boards.

=> usb start
starting USB...
Bus usb@ff5c0000: ehci_generic usb@ff5c0000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@ff5d0000: USB OHCI 1.0
Bus usb@ff600000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@ff580000: 1 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (12 Mb/s, 0mA)
      U-Boot Root Hub

  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 224mA)
       SanDisk Dual Drive 040130e3ee554b7078843f4eb331646

  1  Hub (480 Mb/s, 0mA)
      U-Boot Root Hub

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Jagan Teki
559911ff2e configs: Drop unused XHCI_DWC3 for RK3328 boards
Driver support for rk3328 is not supported so drop this
unused XHCI_DWC3.

Cc: Tianling Shen <cnsztl@gmail.com>
Cc: David Bauer <mail@david-bauer.net>
Cc: Loic Devulder <ldevulder@suse.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Banglang Huang <banglang.huang@foxmail.com>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 20:33:18 +08:00
Chris Packham
5c1c6b7306 arm: mvebu: x240: Use i2c-gpio instead of built in controller
There is an Errata with the built-in I2C controller where various I2C
hardware errors cause a complete lockup of the CPU (which eventually
results in an watchdog reset).

Put the I2C MPP pins into GPIO mode and use the i2c-gpio driver instead.
This uses a bit-banged implementation of an I2C controller and avoids
triggering the Errata.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-07-31 13:50:57 +02:00
Eugen Hristev
b8fc65473a board: rockchip: add Radxa ROCK5A Rk3588 board
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.

There are tree variants depending on the DRAM size : 4G, 8G and 16G.

Specifications:

     Rockchip Rk3588S SoC
     4x ARM Cortex-A76, 4x ARM Cortex-A55
     4/8/16GB memory LPDDR4x
     Mali G610MC4 GPU
     MIPI CSI 2 multiple lanes connector
     4-lane MIPI DSI connector
     Audio – 3.5mm earphone jack
     eMMC module connector
     uSD slot (up to 128GB)
     2x USB 2.0, 2x USB 3.0
     2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
     Gigabit Ethernet RJ45 with optional PoE support
     40-pin IO header including UART, SPI, I2C and 5V DC power in
     USB PD over USB Type-C
     Size: 85mm x 56mm (Raspberry Pi 4 form factor)

Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a")

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
747f9f2663 rockchip: rk3588-rock-5b: Fix SPI Flash alias
The commit fd6e425be2 ("rockchip: rk3588-rock-5b: Enable boot from SPI
NOR flash") enabled SPI flash support by adding a spi0 alias.

Correct this by adding spi0-spi5 aliases in rk3588s-u-boot.dtsi and
SF_DEFAULT_BUS=5 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled
support for parsing and auto discovery of parameters, SFDP.

Fixes: fd6e425be2 ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
52f6b96d27 rockchip: rk3568-rock-3a: Fix SPI Flash alias
The commit 64f79f88a7 ("rockchip: rk3568-rock-3a: Enable boot from SPI
NOR flash") enabled SPI flash support by overriding the spi0 alias.

Correct this by adding a new spi4 alias in rk356x-u-boot.dtsi and
SF_DEFAULT_BUS=4 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled
support for parsing and auto discovery of parameters, SFDP.

Fixes: 64f79f88a7 ("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
ee75f16868 rockchip: rk3399-roc-pc: Fix SPL max size and SPI flash payload offset
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB

Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.

Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash
image, u-boot-rockchip-spi.bin.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
263f81d3a5 rockchip: rk3399-pinephone-pro: Fix SPL max size and SPI flash payload offset
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB

Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.

Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash
image, u-boot-rockchip-spi.bin.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
cc11d5c4ba rockchip: rk3399-pinebook-pro: Fix SPL max size and SPI flash payload offset
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB

Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.

Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash
image, u-boot-rockchip-spi.bin.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
ada6328738 rockchip: rk3399-rockpro64: Fix SPL max size and SPI flash payload offset
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB

Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.

Also remove CONFIG_LTO=y now that there is sufficient space for SPL in
SPI flash, and to fix a build issue reported by Peter Robinson.

Fixes: 5713135ecc ("rockchip: rockpro64: Build u-boot-rockchip-spi.bin")
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 17:34:43 +08:00
Jonas Karlman
6855fa625c board: rockchip: Add Pine64 SOQuartz on CM4-IO
The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi
CM4 form factor. Therefore, it can slot into the official Raspberry Pi
CM4 IO carrier board. Add this configuration to U-Boot.

Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:36 +08:00
Jonas Karlman
d0026e5908 board: rockchip: Add Pine64 SOQuartz on Blade
The Pine64 SOQuartz Blade board is a carrier board for the SOQuartz
CM4-compatible compute module. It features PoE, an M.2 slot, an SD card
slot, HDMI, USB, serial and ethernet.

Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- PCIe/NVMe
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:35 +08:00
Jonas Karlman
651492bfb2 board: rockchip: Add Pine64 SOQuartz on Model A
The Pine64 SOQuartz Model A board is a carrier board for the SOQuartz
CM4-compatible compute module. It exposes PCIe, ethernet, USB, HDMI,
CSI, DSI, eDP and a 40 pin GPIO header, and is powered by 12V DC.

Features tested with a SOQuartz 4GB v1.1 2022-07-11:
- SD-card boot
- eMMC boot
- PCIe/NVMe/AHCI
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:35 +08:00
Jonas Karlman
f52452bbea board: rockchip: Add Pine64 Quartz64-B Board
The Pine64 Quartz64 Model B is a credit-card sized single-board
computer based on the Rockchip RK3566 SoC. The board features an M.2
PCIe slot, USB3, USB2, eMMC, SD, ethernet, HDMI, analog audio out, a
40 pin GPIO header and a DSI and CSI port, as well as on-board Wi-Fi.

Features tested on a Quartz64-B 4GB v1.4 2022-06-06:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:35 +08:00
Jonas Karlman
9c1b5d163e board: rockchip: Add Pine64 Quartz64-A Board
The Pine64 Quartz64 Model A is a single-board computer based on the
Rockchip RK3566 SoC. The board features USB3, SATA, PCIe, HDMI, USB2.0,
CSI, DSI, eDP, eMMC, SD, and an e-paper parallel port, as well as a
20 pin GPIO header.

Features tested on a Quartz64-A 8GB v2.0 2021-04-27:
- SD-card boot
- eMMC boot
- PCIe/NVMe/AHCI
- USB host

Device tree is imported from linux v6.4.

Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:41:35 +08:00
Jonas Karlman
f8a2d1c108 rockchip: rk3568: Use dwc3-generic driver
Change RK3568 devices to use the newer dwc3-generic driver instead of
the old xhci-dwc3 driver for USB 3.0 support.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:40:38 +08:00
Alper Nebi Yasak
42cb8f0112 rockchip: chromebook_speedy: Enable sound
Commit ec107f04b6 ("rockchip: chromebook_minnie: Enable sound") and
commit 2d0c01b8f0 ("sound: rockchip: Add sound support for jerry")
enable audio support for chromebook_minnie and chromebook_jerry. Enable
it for chromebook_speedy as well, but put the non-upstream sound node
in the board -u-boot.dtsi instead.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-31 14:40:13 +08:00