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vexpress64: support the Juno Development Platform

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The Juno Development Platform is a physical Versatile Express
device with some differences from the emulated semihosting
models. The main difference is that the system is split in
a SoC and an FPGA where the SoC hosts the serial ports at
totally different adresses.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij 2015-01-23 14:41:10 +01:00 committed by Tom Rini
parent f91afc4d00
commit ffc103732c
5 changed files with 45 additions and 1 deletions
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4
arch/arm/Kconfig
View file

@ -736,6 +736,10 @@ config TARGET_VEXPRESS64_BASE_FVP
select ARM64 select ARM64
select SEMIHOSTING select SEMIHOSTING
config TARGET_VEXPRESS64_JUNO
bool "Support Versatile Express Juno Development Platform"
select ARM64
config TARGET_LS2085A_EMU config TARGET_LS2085A_EMU
bool "Support ls2085a_emu" bool "Support ls2085a_emu"
select ARM64 select ARM64

13
board/armltd/vexpress64/Kconfig
View file

@ -23,3 +23,16 @@ config SYS_CONFIG_NAME
default "vexpress_aemv8a" default "vexpress_aemv8a"
endif endif
if TARGET_VEXPRESS64_JUNO
config SYS_BOARD
default "vexpress64"
config SYS_VENDOR
default "armltd"
config SYS_CONFIG_NAME
default "vexpress_aemv8a"
endif

5
board/armltd/vexpress64/MAINTAINERS
View file

@ -9,3 +9,8 @@ VEXPRESS_AEMV8A_SEMI BOARD
M: Linus Walleij <linus.walleij@linaro.org> M: Linus Walleij <linus.walleij@linaro.org>
S: Maintained S: Maintained
F: configs/vexpress_aemv8a_semi_defconfig F: configs/vexpress_aemv8a_semi_defconfig
JUNO DEVELOPMENT PLATFORM BOARD
M: Linus Walleij <linus.walleij@linaro.org>
S: Maintained
F: configs/vexpress_aemv8a_juno_defconfig

5
configs/vexpress_aemv8a_juno_defconfig Normal file
View file

@ -0,0 +1,5 @@
# ARM Ltd. Juno Board Reference Design
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS64_JUNO=y
CONFIG_DEFAULT_DEVICE_TREE="vexpress64"
CONFIG_SHOW_BOOT_PROGRESS=y

19
include/configs/vexpress_aemv8a.h
View file

@ -21,7 +21,8 @@
#define CONFIG_REMAKE_ELF #define CONFIG_REMAKE_ELF
#ifndef CONFIG_TARGET_VEXPRESS64_BASE_FVP #if !defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && \
!defined(CONFIG_TARGET_VEXPRESS64_JUNO)
/* Base FVP and Juno not using GICv3 yet */ /* Base FVP and Juno not using GICv3 yet */
#define CONFIG_GICV3 #define CONFIG_GICV3
#endif #endif
@ -44,6 +45,9 @@
/* ATF loads u-boot here for BASE_FVP model */ /* ATF loads u-boot here for BASE_FVP model */
#define CONFIG_SYS_TEXT_BASE 0x88000000 #define CONFIG_SYS_TEXT_BASE 0x88000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
#elif CONFIG_TARGET_VEXPRESS64_JUNO
#define CONFIG_SYS_TEXT_BASE 0xe0000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#else #else
#define CONFIG_SYS_TEXT_BASE 0x80000000 #define CONFIG_SYS_TEXT_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
@ -88,10 +92,15 @@
#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
#define V2M_UART0 0x7ff80000
#define V2M_UART1 0x7ff70000
#else /* Not Juno */
#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
#endif
#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
@ -122,6 +131,9 @@
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
#define GICD_BASE (0x2f000000) #define GICD_BASE (0x2f000000)
#define GICC_BASE (0x2c000000) #define GICC_BASE (0x2c000000)
#elif CONFIG_TARGET_VEXPRESS64_JUNO
#define GICD_BASE (0x2C010000)
#define GICC_BASE (0x2C02f000)
#else #else
#define GICD_BASE (0x2C001000) #define GICD_BASE (0x2C001000)
#define GICC_BASE (0x2C002000) #define GICC_BASE (0x2C002000)
@ -140,7 +152,11 @@
/* PL011 Serial Configuration */ /* PL011 Serial Configuration */
#define CONFIG_PL011_SERIAL #define CONFIG_PL011_SERIAL
#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
#define CONFIG_PL011_CLOCK 7273800
#else
#define CONFIG_PL011_CLOCK 24000000 #define CONFIG_PL011_CLOCK 24000000
#endif
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1} (void *)CONFIG_SYS_SERIAL1}
#define CONFIG_CONS_INDEX 0 #define CONFIG_CONS_INDEX 0
@ -161,6 +177,7 @@
#define CONFIG_CMD_ENV #define CONFIG_CMD_ENV
#define CONFIG_CMD_FLASH #define CONFIG_CMD_FLASH
#define CONFIG_CMD_IMI #define CONFIG_CMD_IMI
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_MEMORY #define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MII #define CONFIG_CMD_MII
#define CONFIG_CMD_NET #define CONFIG_CMD_NET