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mips: octeon: octeon_ebb7304: Add board specific QLM init code
This patch adds the board specific QLM/DLM init code to the Octeon 3 EBB7304 board. The configuration of each port is read from the environment exactly as done in the 2013 U-Boot version to keep the board and it's configuration compatible. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Aaron Williams
Daniel Schwierzeck
parent
827edf1818
commit
f9fa8b8948
1 changed files with 730 additions and 2 deletions
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@ -3,20 +3,32 @@
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* Copyright (C) 2020 Stefan Roese <sr@denx.de>
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdt_support.h>
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#include <ram.h>
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#include <asm/gpio.h>
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#include <mach/octeon_ddr.h>
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#include <mach/cvmx-qlm.h>
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#include <mach/octeon_qlm.h>
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#include <mach/octeon_fdt.h>
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#include <mach/cvmx-helper.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-util.h>
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#include <mach/cvmx-bgxx-defs.h>
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#include "board_ddr.h"
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#define MAX_MIX_ENV_VARS 4
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#define EBB7304_DEF_DRAM_FREQ 800
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static struct ddr_conf board_ddr_conf[] = {
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OCTEON_EBB7304_DDR_CONFIGURATION
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OCTEON_EBB7304_DDR_CONFIGURATION
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};
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static int no_phy[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
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struct ddr_conf *octeon_ddr_conf_table_get(int *count, int *def_ddr_freq)
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{
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*count = ARRAY_SIZE(board_ddr_conf);
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@ -24,3 +36,719 @@ struct ddr_conf *octeon_ddr_conf_table_get(int *count, int *def_ddr_freq)
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return board_ddr_conf;
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}
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/*
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* parse_env_var: Parse the environment variable ("bgx_for_mix%d") to
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* extract the lmac it is set to.
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*
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* index: Index of environment variable to parse.
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* environment variable.
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* env_bgx: Updated with the bgx of the lmac in the environment
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* variable.
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* env_lmac: Updated with the index of lmac in the environment
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* variable.
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*
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* returns: Zero on success, error otherwise.
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*/
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static int parse_env_var(int index, int *env_bgx, int *env_lmac)
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{
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char env_var[20];
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ulong xipd_port;
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sprintf(env_var, "bgx_for_mix%d", index);
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xipd_port = env_get_ulong(env_var, 0, 0xffff);
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if (xipd_port != 0xffff) {
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int xiface;
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struct cvmx_xiface xi;
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struct cvmx_xport xp;
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/*
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* The environemt variable is set to the xipd port. Convert the
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* xipd port to numa node, bgx, and lmac.
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*/
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xiface = cvmx_helper_get_interface_num(xipd_port);
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xi = cvmx_helper_xiface_to_node_interface(xiface);
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xp = cvmx_helper_ipd_port_to_xport(xipd_port);
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*env_bgx = xi.interface;
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*env_lmac = cvmx_helper_get_interface_index_num(xp.port);
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return 0;
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}
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return -1;
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}
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/*
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* get_lmac_fdt_node: Search the device tree for the node corresponding to
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* a given bgx lmac.
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*
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* fdt: Pointer to flat device tree
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* search_node: Numa node of the lmac to search for.
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* search_bgx: Bgx of the lmac to search for.
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* search_lmac: Lmac index to search for.
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* compat: Compatible string to search for.
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* returns: The device tree node of the lmac if found,
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* or -1 otherwise.
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*/
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static int get_lmac_fdt_node(const void *fdt, int search_node, int search_bgx, int search_lmac,
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const char *compat)
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{
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int node;
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const fdt32_t *reg;
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u64 addr;
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int fdt_node = -1;
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int fdt_bgx = -1;
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int fdt_lmac = -1;
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int len;
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int parent;
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/* Iterate through all bgx ports */
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node = -1;
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while ((node = fdt_node_offset_by_compatible((void *)fdt, node,
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compat)) >= 0) {
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/* Get the node and bgx from the physical address */
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parent = fdt_parent_offset(fdt, node);
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reg = fdt_getprop(fdt, parent, "reg", &len);
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if (parent < 0 || !reg)
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continue;
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addr = fdt_translate_address((void *)fdt, parent, reg);
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fdt_node = (addr >> 36) & 0x7;
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fdt_bgx = (addr >> 24) & 0xf;
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/* Get the lmac index from the reg property */
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reg = fdt_getprop(fdt, node, "reg", &len);
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if (reg)
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fdt_lmac = *reg;
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/* Check for a match */
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if (search_node == fdt_node && search_bgx == fdt_bgx &&
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search_lmac == fdt_lmac)
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return node;
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}
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return -1;
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}
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/*
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* get_mix_fdt_node: Search the device tree for the node corresponding to
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* a given mix.
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*
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* fdt: Pointer to flat device tree
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* search_node: Mix numa node to search for.
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* search_index: Mix index to search for.
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*
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* returns: The device tree node of the lmac if found,
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* or -1 otherwise.
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*/
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static int get_mix_fdt_node(const void *fdt, int search_node, int search_index)
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{
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int node;
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/* Iterate through all the mix fdt nodes */
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node = -1;
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while ((node = fdt_node_offset_by_compatible((void *)fdt, node,
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"cavium,octeon-7890-mix")) >= 0) {
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int parent;
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int len;
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const char *name;
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int mix_numa_node;
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const fdt32_t *reg;
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int mix_index = -1;
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u64 addr;
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/* Get the numa node of the mix from the parent node name */
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parent = fdt_parent_offset(fdt, node);
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if (parent < 0 ||
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((name = fdt_get_name(fdt, parent, &len)) == NULL) ||
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((name = strchr(name, '@')) == NULL))
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continue;
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name++;
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mix_numa_node = simple_strtol(name, NULL, 0) ? 1 : 0;
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/* Get the mix index from the reg property */
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reg = fdt_getprop(fdt, node, "reg", &len);
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if (reg) {
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addr = fdt_translate_address((void *)fdt, parent, reg);
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mix_index = (addr >> 11) & 1;
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}
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/* Check for a match */
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if (mix_numa_node == search_node && mix_index == search_index)
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return node;
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}
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return -1;
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}
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/*
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* fdt_fix_mix: Fix the mix nodes in the device tree. Only the mix nodes
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* configured by the user will be preserved. All other mix
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* nodes will be trimmed.
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*
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* fdt: Pointer to flat device tree
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*
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* returns: Zero on success, error otherwise.
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*/
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static int fdt_fix_mix(const void *fdt)
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{
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int node;
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int next_node;
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int len;
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int i;
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/* Parse all the mix port environment variables */
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for (i = 0; i < MAX_MIX_ENV_VARS; i++) {
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int env_node = 0;
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int env_bgx = -1;
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int env_lmac = -1;
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int lmac_fdt_node = -1;
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int mix_fdt_node = -1;
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int lmac_phandle;
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char *compat;
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/* Get the lmac for this environment variable */
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if (parse_env_var(i, &env_bgx, &env_lmac))
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continue;
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/* Get the fdt node for this lmac and add a phandle to it */
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compat = "cavium,octeon-7890-bgx-port";
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lmac_fdt_node = get_lmac_fdt_node(fdt, env_node, env_bgx,
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env_lmac, compat);
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if (lmac_fdt_node < 0) {
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/* Must check for the xcv compatible string too */
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compat = "cavium,octeon-7360-xcv";
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lmac_fdt_node = get_lmac_fdt_node(fdt, env_node,
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env_bgx, env_lmac,
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compat);
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if (lmac_fdt_node < 0) {
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printf("WARNING: Failed to get lmac fdt node for %d%d%d\n",
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env_node, env_bgx, env_lmac);
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continue;
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}
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}
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lmac_phandle = fdt_alloc_phandle((void *)fdt);
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fdt_set_phandle((void *)fdt, lmac_fdt_node, lmac_phandle);
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/* Get the fdt mix node corresponding to this lmac */
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mix_fdt_node = get_mix_fdt_node(fdt, env_node, env_lmac);
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if (mix_fdt_node < 0)
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continue;
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/* Point the mix to the lmac */
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fdt_getprop(fdt, mix_fdt_node, "cavium,mac-handle", &len);
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fdt_setprop_inplace((void *)fdt, mix_fdt_node,
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"cavium,mac-handle", &lmac_phandle, len);
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}
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/* Trim unused mix'es from the device tree */
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for (node = fdt_next_node(fdt, -1, NULL); node >= 0; node = next_node) {
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const char *compat;
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const fdt32_t *reg;
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next_node = fdt_next_node(fdt, node, NULL);
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compat = fdt_getprop(fdt, node, "compatible", &len);
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if (compat) {
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if (strcmp(compat, "cavium,octeon-7890-mix"))
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continue;
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reg = fdt_getprop(fdt, node, "cavium,mac-handle", &len);
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if (reg) {
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if (*reg == 0xffff)
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fdt_nop_node((void *)fdt, node);
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}
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}
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}
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return 0;
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}
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static void kill_fdt_phy(void *fdt, int offset, void *arg)
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{
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int len, phy_offset;
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const fdt32_t *php;
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u32 phandle;
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php = fdt_getprop(fdt, offset, "phy-handle", &len);
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if (php && len == sizeof(*php)) {
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phandle = fdt32_to_cpu(*php);
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fdt_nop_property(fdt, offset, "phy-handle");
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phy_offset = fdt_node_offset_by_phandle(fdt, phandle);
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if (phy_offset > 0)
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fdt_nop_node(fdt, phy_offset);
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}
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}
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void __fixup_xcv(void)
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{
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unsigned long bgx = env_get_ulong("bgx_for_rgmii", 10,
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(unsigned long)-1);
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char fdt_key[16];
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int i;
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debug("%s: BGX %d\n", __func__, (int)bgx);
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for (i = 0; i < 3; i++) {
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snprintf(fdt_key, sizeof(fdt_key),
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bgx == i ? "%d,xcv" : "%d,not-xcv", i);
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debug("%s: trimming bgx %lu with key %s\n",
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__func__, bgx, fdt_key);
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octeon_fdt_patch_rename((void *)gd->fdt_blob, fdt_key,
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"cavium,xcv-trim", true, NULL, NULL);
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}
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}
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/* QLM0 - QLM6 */
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void __fixup_fdt(void)
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{
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int qlm;
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int speed = 0;
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for (qlm = 0; qlm < 7; qlm++) {
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enum cvmx_qlm_mode mode;
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char fdt_key[16];
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const char *type_str = "none";
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mode = cvmx_qlm_get_mode(qlm);
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switch (mode) {
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case CVMX_QLM_MODE_SGMII:
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case CVMX_QLM_MODE_RGMII_SGMII:
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case CVMX_QLM_MODE_RGMII_SGMII_1X1:
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type_str = "sgmii";
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break;
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case CVMX_QLM_MODE_XAUI:
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case CVMX_QLM_MODE_RGMII_XAUI:
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speed = (cvmx_qlm_get_gbaud_mhz(qlm) * 8 / 10) * 4;
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if (speed == 10000)
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type_str = "xaui";
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else
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type_str = "dxaui";
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break;
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case CVMX_QLM_MODE_RXAUI:
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case CVMX_QLM_MODE_RGMII_RXAUI:
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type_str = "rxaui";
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break;
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case CVMX_QLM_MODE_XLAUI:
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case CVMX_QLM_MODE_RGMII_XLAUI:
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type_str = "xlaui";
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break;
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case CVMX_QLM_MODE_XFI:
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case CVMX_QLM_MODE_RGMII_XFI:
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case CVMX_QLM_MODE_RGMII_XFI_1X1:
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type_str = "xfi";
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break;
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case CVMX_QLM_MODE_10G_KR:
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case CVMX_QLM_MODE_RGMII_10G_KR:
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type_str = "10G_KR";
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break;
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case CVMX_QLM_MODE_40G_KR4:
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case CVMX_QLM_MODE_RGMII_40G_KR4:
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type_str = "40G_KR4";
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break;
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case CVMX_QLM_MODE_SATA_2X1:
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type_str = "sata";
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break;
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case CVMX_QLM_MODE_SGMII_2X1:
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case CVMX_QLM_MODE_XFI_1X2:
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case CVMX_QLM_MODE_10G_KR_1X2:
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case CVMX_QLM_MODE_RXAUI_1X2:
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case CVMX_QLM_MODE_MIXED: // special for DLM5 & DLM6
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{
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cvmx_bgxx_cmrx_config_t cmr_config;
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cvmx_bgxx_spux_br_pmd_control_t pmd_control;
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int mux = cvmx_qlm_mux_interface(2);
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if (mux == 2) { // only dlm6
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cmr_config.u64 = csr_rd(CVMX_BGXX_CMRX_CONFIG(2, 2));
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pmd_control.u64 =
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csr_rd(CVMX_BGXX_SPUX_BR_PMD_CONTROL(2, 2));
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} else {
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if (qlm == 5) {
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cmr_config.u64 =
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csr_rd(CVMX_BGXX_CMRX_CONFIG(0, 2));
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pmd_control.u64 =
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csr_rd(CVMX_BGXX_SPUX_BR_PMD_CONTROL(0, 2));
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} else {
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cmr_config.u64 =
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csr_rd(CVMX_BGXX_CMRX_CONFIG(2, 2));
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pmd_control.u64 =
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csr_rd(CVMX_BGXX_SPUX_BR_PMD_CONTROL(2, 2));
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}
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}
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switch (cmr_config.s.lmac_type) {
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case 0:
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type_str = "sgmii";
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break;
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case 1:
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type_str = "xaui";
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break;
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case 2:
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type_str = "rxaui";
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break;
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case 3:
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if (pmd_control.s.train_en)
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type_str = "10G_KR";
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else
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type_str = "xfi";
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break;
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case 4:
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if (pmd_control.s.train_en)
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type_str = "40G_KR4";
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else
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type_str = "xlaui";
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break;
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default:
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type_str = "none";
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break;
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}
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break;
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}
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default:
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type_str = "none";
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break;
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}
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sprintf(fdt_key, "%d,%s", qlm, type_str);
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debug("Patching qlm %d for %s for mode %d%s\n", qlm, fdt_key, mode,
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no_phy[qlm] ? ", removing PHY" : "");
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octeon_fdt_patch_rename((void *)gd->fdt_blob, fdt_key, NULL, true,
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no_phy[qlm] ? kill_fdt_phy : NULL, NULL);
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}
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}
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int board_fix_fdt(void)
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{
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__fixup_fdt();
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__fixup_xcv();
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/* Fix the mix ports */
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fdt_fix_mix(gd->fdt_blob);
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return 0;
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}
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/*
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* Here is the description of the parameters that are passed to QLM
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* configuration:
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*
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* param0 : The QLM to configure
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* param1 : Speed to configure the QLM at
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* param2 : Mode the QLM to configure
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* param3 : 1 = RC, 0 = EP
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* param4 : 0 = GEN1, 1 = GEN2, 2 = GEN3
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* param5 : ref clock select, 0 = 100Mhz, 1 = 125MHz, 2 = 156MHz
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* param6 : ref clock input to use:
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* 0 - external reference (QLMx_REF_CLK)
|
||||
* 1 = common clock 0 (QLMC_REF_CLK0)
|
||||
* 2 = common_clock 1 (QLMC_REF_CLK1)
|
||||
*/
|
||||
static void board_configure_qlms(void)
|
||||
{
|
||||
int speed[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
int mode[8] = { -1, -1, -1, -1, -1, -1, -1, -1 };
|
||||
int pcie_rc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
int pcie_gen[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
int ref_clock_sel[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
int ref_clock_input[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
struct gpio_desc desc;
|
||||
int rbgx, rqlm;
|
||||
char env_var[16];
|
||||
int qlm;
|
||||
int ret;
|
||||
|
||||
/* RGMII PHY reset GPIO */
|
||||
ret = dm_gpio_lookup_name("gpio-controllerA27", &desc);
|
||||
if (ret)
|
||||
debug("gpio ret=%d\n", ret);
|
||||
ret = dm_gpio_request(&desc, "rgmii_phy_reset");
|
||||
if (ret)
|
||||
debug("gpio_request ret=%d\n", ret);
|
||||
ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
|
||||
if (ret)
|
||||
debug("gpio dir ret=%d\n", ret);
|
||||
|
||||
/* Put RGMII PHY in reset */
|
||||
dm_gpio_set_value(&desc, 0);
|
||||
|
||||
octeon_init_qlm(0);
|
||||
|
||||
rbgx = env_get_ulong("bgx_for_rgmii", 10, (unsigned long)-1);
|
||||
switch (rbgx) {
|
||||
case 0:
|
||||
rqlm = 2;
|
||||
break;
|
||||
case 1:
|
||||
rqlm = 3;
|
||||
break;
|
||||
case 2:
|
||||
rqlm = 5;
|
||||
break;
|
||||
default:
|
||||
rqlm = -1;
|
||||
break;
|
||||
}
|
||||
|
||||
for (qlm = 0; qlm < 7; qlm++) {
|
||||
const char *mode_str;
|
||||
char spd_env[16];
|
||||
|
||||
mode[qlm] = CVMX_QLM_MODE_DISABLED;
|
||||
sprintf(env_var, "qlm%d_mode", qlm);
|
||||
mode_str = env_get(env_var);
|
||||
if (!mode_str)
|
||||
continue;
|
||||
|
||||
if (qlm == 4 && mode[4] != -1 &&
|
||||
mode[4] != CVMX_QLM_MODE_SATA_2X1) {
|
||||
printf("Error: DLM 4 can only be configured for SATA\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
if (strstr(mode_str, ",no_phy"))
|
||||
no_phy[qlm] = 1;
|
||||
|
||||
if (!strncmp(mode_str, "sgmii", 5)) {
|
||||
bool rgmii = false;
|
||||
|
||||
speed[qlm] = 1250;
|
||||
if (rqlm == qlm && qlm < 5) {
|
||||
mode[qlm] = CVMX_QLM_MODE_RGMII_SGMII;
|
||||
rgmii = true;
|
||||
} else if (qlm == 6 || qlm == 5) {
|
||||
if (rqlm == qlm && qlm == 5) {
|
||||
mode[qlm] = CVMX_QLM_MODE_RGMII_SGMII_1X1;
|
||||
rgmii = true;
|
||||
} else if (rqlm == 5 && qlm == 6 &&
|
||||
mode[5] != CVMX_QLM_MODE_RGMII_SGMII_1X1) {
|
||||
mode[qlm] = CVMX_QLM_MODE_RGMII_SGMII_2X1;
|
||||
rgmii = true;
|
||||
} else {
|
||||
mode[qlm] = CVMX_QLM_MODE_SGMII_2X1;
|
||||
}
|
||||
} else {
|
||||
mode[qlm] = CVMX_QLM_MODE_SGMII;
|
||||
}
|
||||
ref_clock_sel[qlm] = 2;
|
||||
|
||||
if (qlm == 5 || qlm == 6)
|
||||
ref_clock_input[qlm] = 2; // use QLMC_REF_CLK1
|
||||
|
||||
if (no_phy[qlm]) {
|
||||
int i;
|
||||
int start = 0, stop = 2;
|
||||
|
||||
rbgx = 0;
|
||||
switch (qlm) {
|
||||
case 3:
|
||||
rbgx = 1;
|
||||
case 2:
|
||||
for (i = 0; i < 4; i++) {
|
||||
printf("Ignoring PHY for interface: %d, port: %d\n",
|
||||
rbgx, i);
|
||||
cvmx_helper_set_port_force_link_up(rbgx, i, true);
|
||||
}
|
||||
break;
|
||||
case 6:
|
||||
start = 2;
|
||||
stop = 4;
|
||||
case 5:
|
||||
for (i = start; i < stop; i++) {
|
||||
printf("Ignoring PHY for interface: %d, port: %d\n",
|
||||
2, i);
|
||||
cvmx_helper_set_port_force_link_up(2, i, true);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
printf("SGMII not supported for QLM/DLM %d\n",
|
||||
qlm);
|
||||
break;
|
||||
}
|
||||
}
|
||||
printf("QLM %d: SGMII%s\n",
|
||||
qlm, rgmii ? ", RGMII" : "");
|
||||
} else if (!strncmp(mode_str, "xaui", 4)) {
|
||||
speed[qlm] = 3125;
|
||||
mode[qlm] = CVMX_QLM_MODE_XAUI;
|
||||
ref_clock_sel[qlm] = 2;
|
||||
if (qlm == 5 || qlm == 6)
|
||||
ref_clock_input[qlm] = 2; // use QLMC_REF_CLK1
|
||||
printf("QLM %d: XAUI\n", qlm);
|
||||
} else if (!strncmp(mode_str, "dxaui", 5)) {
|
||||
speed[qlm] = 6250;
|
||||
mode[qlm] = CVMX_QLM_MODE_XAUI;
|
||||
ref_clock_sel[qlm] = 2;
|
||||
if (qlm == 5 || qlm == 6)
|
||||
ref_clock_input[qlm] = 2; // use QLMC_REF_CLK1
|
||||
printf("QLM %d: DXAUI\n", qlm);
|
||||
} else if (!strncmp(mode_str, "rxaui", 5)) {
|
||||
bool rgmii = false;
|
||||
|
||||
speed[qlm] = 6250;
|
||||
if (qlm == 5 || qlm == 6) {
|
||||
if (rqlm == qlm && qlm == 5) {
|
||||
mode[qlm] = CVMX_QLM_MODE_RGMII_RXAUI;
|
||||
rgmii = true;
|
||||
} else {
|
||||
mode[qlm] = CVMX_QLM_MODE_RXAUI_1X2;
|
||||
}
|
||||
} else {
|
||||
mode[qlm] = CVMX_QLM_MODE_RXAUI;
|
||||
}
|
||||
ref_clock_sel[qlm] = 2;
|
||||
if (qlm == 5 || qlm == 6)
|
||||
ref_clock_input[qlm] = 2; // use QLMC_REF_CLK1
|
||||
printf("QLM %d: RXAUI%s\n",
|
||||
qlm, rgmii ? ", rgmii" : "");
|
||||
} else if (!strncmp(mode_str, "xlaui", 5)) {
|
||||
speed[qlm] = 103125;
|
||||
mode[qlm] = CVMX_QLM_MODE_XLAUI;
|
||||
ref_clock_sel[qlm] = 2;
|
||||
if (qlm == 5 || qlm == 6)
|
||||
ref_clock_input[qlm] = 2; // use QLMC_REF_CLK1
|
||||
sprintf(spd_env, "qlm%d_speed", qlm);
|
||||
if (env_get(spd_env)) {
|
||||
int spd = env_get_ulong(spd_env, 0, 8);
|
||||
|
||||
if (spd)
|
||||
speed[qlm] = spd;
|
||||
else
|
||||
speed[qlm] = 103125;
|
||||
}
|
||||
printf("QLM %d: XLAUI\n", qlm);
|
||||
} else if (!strncmp(mode_str, "xfi", 3)) {
|
||||
bool rgmii = false;
|
||||
|
||||
speed[qlm] = 103125;
|
||||
if (rqlm == qlm) {
|
||||
mode[qlm] = CVMX_QLM_MODE_RGMII_XFI;
|
||||
rgmii = true;
|
||||
} else if (qlm == 5 || qlm == 6) {
|
||||
mode[qlm] = CVMX_QLM_MODE_XFI_1X2;
|
||||
} else {
|
||||
mode[qlm] = CVMX_QLM_MODE_XFI;
|
||||
}
|
||||
ref_clock_sel[qlm] = 2;
|
||||
if (qlm == 5 || qlm == 6)
|
||||
ref_clock_input[qlm] = 2; // use QLMC_REF_CLK1
|
||||
printf("QLM %d: XFI%s\n", qlm, rgmii ? ", RGMII" : "");
|
||||
} else if (!strncmp(mode_str, "10G_KR", 6)) {
|
||||
speed[qlm] = 103125;
|
||||
if (rqlm == qlm && qlm == 5)
|
||||
mode[qlm] = CVMX_QLM_MODE_RGMII_10G_KR;
|
||||
else if (qlm == 5 || qlm == 6)
|
||||
mode[qlm] = CVMX_QLM_MODE_10G_KR_1X2;
|
||||
else
|
||||
mode[qlm] = CVMX_QLM_MODE_10G_KR;
|
||||
ref_clock_sel[qlm] = 2;
|
||||
if (qlm == 5 || qlm == 6)
|
||||
ref_clock_input[qlm] = 2; // use QLMC_REF_CLK1
|
||||
printf("QLM %d: 10G_KR\n", qlm);
|
||||
} else if (!strncmp(mode_str, "40G_KR4", 7)) {
|
||||
speed[qlm] = 103125;
|
||||
mode[qlm] = CVMX_QLM_MODE_40G_KR4;
|
||||
ref_clock_sel[qlm] = 2;
|
||||
if (qlm == 5 || qlm == 6)
|
||||
ref_clock_input[qlm] = 2; // use QLMC_REF_CLK1
|
||||
printf("QLM %d: 40G_KR4\n", qlm);
|
||||
} else if (!strcmp(mode_str, "pcie")) {
|
||||
char *pmode;
|
||||
int lanes = 0;
|
||||
|
||||
sprintf(env_var, "pcie%d_mode", qlm);
|
||||
pmode = env_get(env_var);
|
||||
if (pmode && !strcmp(pmode, "ep"))
|
||||
pcie_rc[qlm] = 0;
|
||||
else
|
||||
pcie_rc[qlm] = 1;
|
||||
sprintf(env_var, "pcie%d_gen", qlm);
|
||||
pcie_gen[qlm] = env_get_ulong(env_var, 0, 3);
|
||||
sprintf(env_var, "pcie%d_lanes", qlm);
|
||||
lanes = env_get_ulong(env_var, 0, 8);
|
||||
if (lanes == 8) {
|
||||
mode[qlm] = CVMX_QLM_MODE_PCIE_1X8;
|
||||
} else if (qlm == 5 || qlm == 6) {
|
||||
if (lanes != 2) {
|
||||
printf("QLM%d: Invalid lanes selected, defaulting to 2 lanes\n",
|
||||
qlm);
|
||||
}
|
||||
mode[qlm] = CVMX_QLM_MODE_PCIE_1X2;
|
||||
ref_clock_input[qlm] = 1; // use QLMC_REF_CLK0
|
||||
} else {
|
||||
mode[qlm] = CVMX_QLM_MODE_PCIE;
|
||||
}
|
||||
ref_clock_sel[qlm] = 0;
|
||||
printf("QLM %d: PCIe gen%d %s, x%d lanes\n",
|
||||
qlm, pcie_gen[qlm] + 1,
|
||||
pcie_rc[qlm] ? "root complex" : "endpoint",
|
||||
lanes);
|
||||
} else if (!strcmp(mode_str, "sata")) {
|
||||
mode[qlm] = CVMX_QLM_MODE_SATA_2X1;
|
||||
ref_clock_sel[qlm] = 0;
|
||||
ref_clock_input[qlm] = 1;
|
||||
sprintf(spd_env, "qlm%d_speed", qlm);
|
||||
if (env_get(spd_env)) {
|
||||
int spd = env_get_ulong(spd_env, 0, 8);
|
||||
|
||||
if (spd == 1500 || spd == 3000 || spd == 3000)
|
||||
speed[qlm] = spd;
|
||||
else
|
||||
speed[qlm] = 6000;
|
||||
} else {
|
||||
speed[qlm] = 6000;
|
||||
}
|
||||
} else {
|
||||
printf("QLM %d: disabled\n", qlm);
|
||||
}
|
||||
}
|
||||
|
||||
for (qlm = 0; qlm < 7; qlm++) {
|
||||
int rc;
|
||||
|
||||
if (mode[qlm] == -1)
|
||||
continue;
|
||||
|
||||
debug("Configuring qlm%d with speed(%d), mode(%d), RC(%d), Gen(%d), REF_CLK(%d), CLK_SOURCE(%d)\n",
|
||||
qlm, speed[qlm], mode[qlm], pcie_rc[qlm],
|
||||
pcie_gen[qlm] + 1,
|
||||
ref_clock_sel[qlm], ref_clock_input[qlm]);
|
||||
rc = octeon_configure_qlm(qlm, speed[qlm], mode[qlm],
|
||||
pcie_rc[qlm], pcie_gen[qlm],
|
||||
ref_clock_sel[qlm],
|
||||
ref_clock_input[qlm]);
|
||||
|
||||
if (speed[qlm] == 6250) {
|
||||
if (mode[qlm] == CVMX_QLM_MODE_RXAUI) {
|
||||
octeon_qlm_tune_v3(0, qlm, speed[qlm], 0x12,
|
||||
0xa0, -1, -1);
|
||||
} else {
|
||||
octeon_qlm_tune_v3(0, qlm, speed[qlm], 0xa,
|
||||
0xa0, -1, -1);
|
||||
}
|
||||
} else if (speed[qlm] == 103125) {
|
||||
octeon_qlm_tune_v3(0, qlm, speed[qlm], 0xd, 0xd0,
|
||||
-1, -1);
|
||||
}
|
||||
|
||||
if (qlm == 4 && rc != 0)
|
||||
/*
|
||||
* There is a bug with SATA with 73xx. Until it's
|
||||
* fixed we need to strip it from the device tree.
|
||||
*/
|
||||
octeon_fdt_patch_rename((void *)gd->fdt_blob, "4,none",
|
||||
NULL, true, NULL, NULL);
|
||||
}
|
||||
|
||||
dm_gpio_set_value(&desc, 0); /* Put RGMII PHY in reset */
|
||||
mdelay(10);
|
||||
dm_gpio_set_value(&desc, 1); /* Take RGMII PHY out of reset */
|
||||
}
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
board_configure_qlms();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue