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sunxi: dram: Add a helper function 'mctl_get_number_of_lanes'
It is going to be useful in more than one place. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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2 changed files with 16 additions and 14 deletions
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@ -152,23 +152,28 @@ static void mctl_enable_dll0(u32 phase)
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udelay(22);
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}
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/* Get the number of DDR byte lanes */
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static u32 mctl_get_number_of_lanes(void)
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{
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struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
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if ((readl(&dram->dcr) & DRAM_DCR_BUS_WIDTH_MASK) ==
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DRAM_DCR_BUS_WIDTH(DRAM_DCR_BUS_WIDTH_32BIT))
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return 4;
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else
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return 2;
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}
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/*
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* Note: This differs from pm/standby in that it checks the bus width
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*/
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static void mctl_enable_dllx(u32 phase)
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{
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struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
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u32 i, n, bus_width;
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u32 i, number_of_lanes;
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bus_width = readl(&dram->dcr);
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number_of_lanes = mctl_get_number_of_lanes();
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if ((bus_width & DRAM_DCR_BUS_WIDTH_MASK) ==
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DRAM_DCR_BUS_WIDTH(DRAM_DCR_BUS_WIDTH_32BIT))
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n = DRAM_DCR_NR_DLLCR_32BIT;
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else
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n = DRAM_DCR_NR_DLLCR_16BIT;
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for (i = 1; i < n; i++) {
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for (i = 1; i <= number_of_lanes; i++) {
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clrsetbits_le32(&dram->dllcr[i], 0xf << 14,
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(phase & 0xf) << 14);
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clrsetbits_le32(&dram->dllcr[i], DRAM_DLLCR_NRESET,
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@ -177,12 +182,12 @@ static void mctl_enable_dllx(u32 phase)
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}
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udelay(2);
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for (i = 1; i < n; i++)
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for (i = 1; i <= number_of_lanes; i++)
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clrbits_le32(&dram->dllcr[i], DRAM_DLLCR_NRESET |
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DRAM_DLLCR_DISABLE);
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udelay(22);
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for (i = 1; i < n; i++)
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for (i = 1; i <= number_of_lanes; i++)
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clrsetbits_le32(&dram->dllcr[i], DRAM_DLLCR_DISABLE,
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DRAM_DLLCR_NRESET);
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udelay(22);
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@ -122,9 +122,6 @@ struct dram_para {
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#define DRAM_DCR_BUS_WIDTH_32BIT 0x3
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#define DRAM_DCR_BUS_WIDTH_16BIT 0x1
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#define DRAM_DCR_BUS_WIDTH_8BIT 0x0
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#define DRAM_DCR_NR_DLLCR_32BIT 5
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#define DRAM_DCR_NR_DLLCR_16BIT 3
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#define DRAM_DCR_NR_DLLCR_8BIT 2
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#define DRAM_DCR_RANK_SEL(n) (((n) & 0x3) << 10)
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#define DRAM_DCR_RANK_SEL_MASK DRAM_DCR_CMD_RANK(0x3)
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#define DRAM_DCR_CMD_RANK_ALL (0x1 << 12)
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