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https://github.com/AsahiLinux/u-boot
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AT91SAM9XE: add embedded flash support
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
This commit is contained in:
Reinhard Meyer
parent
c7260d1539
commit
d88bebe16d
4 changed files with 364 additions and 0 deletions
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@ -34,6 +34,7 @@ COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o
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COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o
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COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o
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COBJS-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o
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COBJS-$(CONFIG_AT91_EFLASH) += eflash.o
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COBJS-$(CONFIG_AT91_LED) += led.o
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COBJS-y += clock.o
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COBJS-y += cpu.o
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271
arch/arm/cpu/arm926ejs/at91/eflash.c
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271
arch/arm/cpu/arm926ejs/at91/eflash.c
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@ -0,0 +1,271 @@
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/*
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* (C) Copyright 2010
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* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* this driver supports the enhanced embedded flash in the Atmel
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* AT91SAM9XE devices with the following geometry:
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*
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* AT91SAM9XE128: 1 plane of 8 regions of 32 pages (total 256 pages)
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* AT91SAM9XE256: 1 plane of 16 regions of 32 pages (total 512 pages)
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* AT91SAM9XE512: 1 plane of 32 regions of 32 pages (total 1024 pages)
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* (the exact geometry is read from the flash at runtime, so any
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* future devices should already be covered)
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*
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* Regions can be write/erase protected.
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* Whole (!) pages can be individually written with erase on the fly.
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* Writing partial pages will corrupt the rest of the page.
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*
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* The flash is presented to u-boot with each region being a sector,
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* having the following effects:
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* Each sector can be hardware protected (protect on/off).
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* Each page in a sector can be rewritten anytime.
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* Since pages are erased when written, the "erase" does nothing.
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* The first "CONFIG_EFLASH_PROTSECTORS" cannot be unprotected
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* by u-Boot commands.
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*
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* Note: Redundant environment will not work in this flash since
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* it does use partial page writes. Make sure the environent spans
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* whole pages!
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*/
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/*
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* optional TODOs (nice to have features):
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*
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* make the driver coexist with other NOR flash drivers
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* (use an index into flash_info[], requires work
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* in those other drivers, too)
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* Make the erase command fill the sectors with 0xff
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* (if the flashes grow larger in the future and
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* someone puts a jffs2 into them)
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* do a read-modify-write for partially programmed pages
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/io.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_eefc.h>
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#include <asm/arch/at91_dbu.h>
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/* checks to detect configuration errors */
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#if CONFIG_SYS_MAX_FLASH_BANKS!=1
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#error eflash: this driver can only handle 1 bank
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#endif
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/* global structure */
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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static u32 pagesize;
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unsigned long flash_init (void)
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{
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at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
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at91_dbu_t *dbu = (at91_dbu_t *) 0xfffff200;
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u32 id, size, nplanes, planesize, nlocks;
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u32 addr, i, tmp=0;
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debug("eflash: init\n");
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flash_info[0].flash_id = FLASH_UNKNOWN;
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/* check if its an AT91ARM9XE SoC */
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if ((readl(&dbu->cidr) & AT91_DBU_CID_ARCH_MASK) != AT91_DBU_CID_ARCH_9XExx) {
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puts("eflash: not an AT91SAM9XE\n");
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return 0;
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}
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/* now query the eflash for its structure */
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writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GETD, &eefc->fcr);
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while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
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;
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id = readl(&eefc->frr); /* word 0 */
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size = readl(&eefc->frr); /* word 1 */
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pagesize = readl(&eefc->frr); /* word 2 */
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nplanes = readl(&eefc->frr); /* word 3 */
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planesize = readl(&eefc->frr); /* word 4 */
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debug("id=%08x size=%u pagesize=%u planes=%u planesize=%u\n",
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id, size, pagesize, nplanes, planesize);
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for (i=1; i<nplanes; i++) {
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tmp = readl(&eefc->frr); /* words 5..4+nplanes-1 */
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};
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nlocks = readl(&eefc->frr); /* word 4+nplanes */
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debug("nlocks=%u\n", nlocks);
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/* since we are going to use the lock regions as sectors, check count */
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if (nlocks > CONFIG_SYS_MAX_FLASH_SECT) {
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printf("eflash: number of lock regions(%u) "\
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"> CONFIG_SYS_MAX_FLASH_SECT. reducing...\n",
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nlocks);
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nlocks = CONFIG_SYS_MAX_FLASH_SECT;
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}
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flash_info[0].size = size;
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flash_info[0].sector_count = nlocks;
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flash_info[0].flash_id = id;
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addr = AT91SAM9XE_FLASH_BASE;
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for (i=0; i<nlocks; i++) {
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tmp = readl(&eefc->frr); /* words 4+nplanes+1.. */
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flash_info[0].start[i] = addr;
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flash_info[0].protect[i] = 0;
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addr += tmp;
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};
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/* now read the protection information for all regions */
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writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GLB, &eefc->fcr);
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while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
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;
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for (i=0; i<flash_info[0].sector_count; i++) {
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if (i%32 == 0)
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tmp = readl(&eefc->frr);
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flash_info[0].protect[i] = (tmp >> (i%32)) & 1;
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#if defined(CONFIG_EFLASH_PROTSECTORS)
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if (i < CONFIG_EFLASH_PROTSECTORS)
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flash_info[0].protect[i] = 1;
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#endif
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}
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return size;
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}
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void flash_print_info (flash_info_t *info)
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{
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int i;
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puts("AT91SAM9XE embedded flash\n Size: ");
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print_size(info->size, " in ");
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printf("%d Sectors\n", info->sector_count);
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printf(" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf("\n ");
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printf(" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " "
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);
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}
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printf ("\n");
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return;
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}
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int flash_real_protect (flash_info_t *info, long sector, int prot)
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{
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at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
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u32 pagenum = (info->start[sector]-AT91SAM9XE_FLASH_BASE)/pagesize;
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u32 i, tmp=0;
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debug("protect sector=%ld prot=%d\n", sector, prot);
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#if defined(CONFIG_EFLASH_PROTSECTORS)
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if (sector < CONFIG_EFLASH_PROTSECTORS) {
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if (!prot) {
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printf("eflash: sector %lu cannot be unprotected\n",
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sector);
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}
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return 1; /* return anyway, caller does not care for result */
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}
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#endif
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if (prot) {
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writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_SLB |
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(pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr);
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} else {
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writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_CLB |
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(pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr);
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}
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while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
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;
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/* now re-read the protection information for all regions */
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writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GLB, &eefc->fcr);
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while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
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;
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for (i=0; i<info->sector_count; i++) {
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if (i%32 == 0)
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tmp = readl(&eefc->frr);
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info->protect[i] = (tmp >> (i%32)) & 1;
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}
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return 0;
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}
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static u32 erase_write_page (u32 pagenum)
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{
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at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
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debug("erase+write page=%u\n", pagenum);
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/* give erase and write page command */
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writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_EWP |
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(pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr);
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while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
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;
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/* return status */
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return readl(&eefc->fsr)
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& (AT91_EEFC_FSR_FCMDE | AT91_EEFC_FSR_FLOCKE);
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}
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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debug("erase first=%d last=%d\n", s_first, s_last);
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puts("this flash does not need and support erasing!\n");
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return 0;
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}
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/*
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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*/
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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u32 pagenum;
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u32 *src32, *dst32;
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u32 i;
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debug("write src=%08lx addr=%08lx cnt=%lx\n",
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(ulong)src, addr, cnt);
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/* REQUIRE addr to be on a page start, abort if not */
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if (addr % pagesize) {
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printf ("eflash: start %08lx is not on page start\n"\
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" write aborted\n", addr);
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return 1;
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}
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/* now start copying data */
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pagenum = (addr-AT91SAM9XE_FLASH_BASE)/pagesize;
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src32 = (u32 *) src;
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dst32 = (u32 *) addr;
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while (cnt > 0) {
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i = pagesize / 4;
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/* fill page buffer */
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while (i--)
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*dst32++ = *src32++;
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/* write page */
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if (erase_write_page(pagenum))
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return 1;
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pagenum++;
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if (cnt > pagesize)
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cnt -= pagesize;
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else
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cnt = 0;
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}
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return 0;
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}
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41
arch/arm/include/asm/arch-at91/at91_dbu.h
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41
arch/arm/include/asm/arch-at91/at91_dbu.h
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@ -0,0 +1,41 @@
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/*
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* Copyright (C) 2010
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* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
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*
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* Debug Unit
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* Based on AT91SAM9XE datasheet
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_DBU_H
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#define AT91_DBU_H
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#ifndef __ASSEMBLY__
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typedef struct at91_dbu {
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u32 cr; /* Control Register WO */
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u32 mr; /* Mode Register RW */
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u32 ier; /* Interrupt Enable Register WO */
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u32 idr; /* Interrupt Disable Register WO */
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u32 imr; /* Interrupt Mask Register RO */
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u32 sr; /* Status Register RO */
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u32 rhr; /* Receive Holding Register RO */
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u32 thr; /* Transmit Holding Register WO */
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u32 brgr; /* Baud Rate Generator Register RW */
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u32 res1[7];/* 0x0024 - 0x003C Reserved */
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u32 cidr; /* Chip ID Register RO */
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u32 exid; /* Chip ID Extension Register RO */
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u32 fnr; /* Force NTRST Register RW */
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} at91_dbu_t;
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#endif /* __ASSEMBLY__ */
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#define AT91_DBU_CID_ARCH_MASK 0x0ff00000
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#define AT91_DBU_CID_ARCH_9xx 0x01900000
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#define AT91_DBU_CID_ARCH_9XExx 0x02900000
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#endif
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51
arch/arm/include/asm/arch-at91/at91_eefc.h
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51
arch/arm/include/asm/arch-at91/at91_eefc.h
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@ -0,0 +1,51 @@
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/*
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* Copyright (C) 2010
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* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
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*
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* Enhanced Embedded Flash Controller
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* Based on AT91SAM9XE datasheet
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_EEFC_H
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#define AT91_EEFC_H
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#ifndef __ASSEMBLY__
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typedef struct at91_eefc {
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u32 fmr; /* Flash Mode Register RW */
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u32 fcr; /* Flash Command Register WO */
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u32 fsr; /* Flash Status Register RO */
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u32 frr; /* Flash Result Register RO */
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} at91_eefc_t;
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#endif /* __ASSEMBLY__ */
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#define AT91_EEFC_FMR_FWS_MASK 0x00000f00
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#define AT91_EEFC_FMR_FRDY_BIT 0x00000001
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#define AT91_EEFC_FCR_KEY 0x5a000000
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#define AT91_EEFC_FCR_FARG_MASK 0x00ffff00
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#define AT91_EEFC_FCR_FARG_SHIFT 8
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#define AT91_EEFC_FCR_FCMD_GETD 0x0
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#define AT91_EEFC_FCR_FCMD_WP 0x1
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#define AT91_EEFC_FCR_FCMD_WPL 0x2
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#define AT91_EEFC_FCR_FCMD_EWP 0x3
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#define AT91_EEFC_FCR_FCMD_EWPL 0x4
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#define AT91_EEFC_FCR_FCMD_EA 0x5
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#define AT91_EEFC_FCR_FCMD_SLB 0x8
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#define AT91_EEFC_FCR_FCMD_CLB 0x9
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#define AT91_EEFC_FCR_FCMD_GLB 0xA
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#define AT91_EEFC_FCR_FCMD_SGPB 0xB
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#define AT91_EEFC_FCR_FCMD_CGPB 0xC
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#define AT91_EEFC_FCR_FCMD_GGPB 0xD
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#define AT91_EEFC_FSR_FRDY 1
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#define AT91_EEFC_FSR_FCMDE 2
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#define AT91_EEFC_FSR_FLOCKE 4
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#endif
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