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AT91: add RTT and GPBR based RTC
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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4 changed files with 182 additions and 0 deletions
45
arch/arm/include/asm/arch-at91/at91_gpbr.h
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arch/arm/include/asm/arch-at91/at91_gpbr.h
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/*
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* Copyright (C) 2010
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* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
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*
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* General Purpose Backup Registers
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* Based on AT91SAM9XE datasheet
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_GPBR_H
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#define AT91_GPBR_H
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/*
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* The Atmel AT91SAM9 series has a small resource of 4 nonvolatile
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* 32 Bit registers (buffered by the Vbu power).
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*
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* Please consider carefully before using this resource for tasks
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* that do not really need nonvolatile registers. Maybe you can
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* store information in EEPROM or FLASH instead.
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*
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* However, if you use a GPBR please document its use here and
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* reference the define in your code!
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*
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* known typical uses of the GPBRs:
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* GPBR[0]: offset for RTT timekeeping (u-boot, kernel)
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* GPBR[1]: unused
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* GPBR[2]: unused
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* GPBR[3]: bootcount (u-boot)
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*/
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#define AT91_GPBR_INDEX_TIMEOFF 0
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#define AT91_GPBR_INDEX_BOOTCOUNT 3
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#ifndef __ASSEMBLY__
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typedef struct at91_gpbr {
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u32 reg[4];
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} at91_gpbr_t;
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#endif /* __ASSEMBLY__ */
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#endif
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36
arch/arm/include/asm/arch-at91/at91_rtt.h
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arch/arm/include/asm/arch-at91/at91_rtt.h
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/*
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* Copyright (C) 2010
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* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
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*
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* Real-time Timer
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* Based on AT91SAM9XE datasheet
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_RTT_H
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#define AT91_RTT_H
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#ifndef __ASSEMBLY__
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typedef struct at91_rtt {
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u32 mr; /* Mode Register RW 0x00008000 */
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u32 ar; /* Alarm Register RW 0xFFFFFFFF */
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u32 vr; /* Value Register RO 0x00000000 */
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u32 sr; /* Status Register RO 0x00000000 */
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} at91_rtt_t;
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#endif /* __ASSEMBLY__ */
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#define AT91_RTT_MR_RTPRES 0x0000ffff
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#define AT91_RTT_MR_ALMIEN 0x00010000
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#define AT91_RTT_RTTINCIEN 0x00020000
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#define AT91_RTT_RTTRST 0x00040000
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#define AT91_RTT_SR_ALMS 0x00000001
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#define AT91_RTT_SR_RTTINC 0x00000002
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#endif
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@ -27,6 +27,7 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)librtc.a
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COBJS-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o
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COBJS-$(CONFIG_RTC_BFIN) += bfin_rtc.o
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COBJS-y += date.o
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COBJS-$(CONFIG_RTC_DS12887) += ds12887.o
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100
drivers/rtc/at91sam9_rtt.c
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drivers/rtc/at91sam9_rtt.c
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/*
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* (C) Copyright 2010
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* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Date & Time support for the internal Real-time Timer
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* of AT91SAM9260 and compatibles.
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* Compatible with the LinuX rtc driver workaround:
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* The RTT cannot be written to, but only reset.
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* The actual time is the sum of RTT and one of
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* the four GPBR registers.
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*
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* The at91sam9260 has 4 GPBR (0-3).
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* For their typical use see at91_gpbr.h !
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*
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* make sure u-boot and kernel use the same GPBR !
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*/
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#include <asm/errno.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/io.h>
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#include <asm/arch/at91_rtt.h>
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#include <asm/arch/at91_gpbr.h>
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#if defined(CONFIG_CMD_DATE)
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int rtc_get (struct rtc_time *tmp)
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{
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at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
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at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
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ulong tim;
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ulong tim2;
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ulong off;
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do {
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tim = readl(&rtt->vr);
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tim2 = readl(&rtt->vr);
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} while (tim!=tim2);
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off = readl(&gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
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/* off==0 means time is invalid, but we ignore that */
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to_tm (tim+off, tmp);
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return 0;
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}
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int rtc_set (struct rtc_time *tmp)
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{
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at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
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at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
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ulong tim;
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tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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/* clear alarm, set prescaler to 32768, clear counter */
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writel(32768+AT91_RTT_RTTRST, &rtt->mr);
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writel(~0, &rtt->ar);
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writel(tim, &gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
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/* wait for counter clear to happen, takes less than a 1/32768th second */
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while (readl(&rtt->vr) != 0)
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;
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return 0;
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}
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void rtc_reset (void)
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{
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at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
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at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
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/* clear alarm, set prescaler to 32768, clear counter */
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writel(32768+AT91_RTT_RTTRST, &rtt->mr);
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writel(~0, &rtt->ar);
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writel(0, &gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
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/* wait for counter clear to happen, takes less than a 1/32768th second */
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while (readl(&rtt->vr) != 0)
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;
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}
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#endif
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